Chih-Wei Liu

Chih-Wei Liu, Kuo-Chiang Chang, Ming-Hsun Chuang, Ching-Hao Lin: 10-ms 18-Band Quasi-ANSI S1.11 1/3-Octave Filter Bank for Digital Hearing Aids. IEEE Trans. on Circuits and Systems 60-I(3): 638-649 (2013)

Cheng-Yu Chou, Chih-Wei Liu, Kuo-Yu Tseng, Chien-Wei Cheng, Fang-Sun Lu: Challenges of system virtualization. APNOMS 2012: 1-5

Ya-Ting Chang, Kuo-Chiang Chang, Yu-Ting Kuo, Chih-Wei Liu: Complexity-effective auditory compensation with a controllable filter for digital hearing aids. ASP-DAC 2012: 557-558

Shin-Kai Chen, Sheng-Yun Wu, Yu-Kai Yen, Chih-Wei Liu: Early Stage Codesign of Multi-PE SIMD Engine: A Case Study on Object Detection. ICPP Workshops 2012: 553-560

Shih-Hao Ou, Che-Wei Yeh, Tay-Jyi Lin, Chih-Wei Liu: A smart stream controller for efficient implementation of streaming applications on the heterogeneous multicore processor. ISCAS 2012: 1335-1338

Kuo-Chiang Chang, Yu-Wen Chen, Yu-Ting Kuo, Chih-Wei Liu: A low power hearing aid computing platform using lightweight processing elements. ISCAS 2012: 2785-2788

Yu-Ting Kuo, Tay-Jyi Lin, Chih-Wei Liu: Complexity-Aware Quantization and Lightweight VLSI Implementation of FIR Filters. EURASIP J. Adv. Sig. Proc. 2011 (2011)

Yu-Ting Kuo, Tay-Jyi Lin, Yueh-Tai Li, Chih-Wei Liu: Design and Implementation of Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids. IEEE Trans. on Circuits and Systems 57-I(7): 1684-1696 (2010)

Tay-Jyi Lin, Pi-Chen Hsiao, Chi-Hung Lin, Shu-Chang Kuo, Chou-Kun Lin, Yu-Ting Kuo, Chih-Wei Liu, Yuan-Hua Chu: Collaborative voltage scaling with online STA and variable-latency datapath. ACM Great Lakes Symposium on VLSI 2010: 347-352

Kuo-Chiang Chang, Yu-Ting Kuo, Tay-Jyi Lin, Chih-Wei Liu: Complexity-effective dynamic range compression for digital hearing aids. ISCAS 2010: 2378-2381

Shih-Hao Ou, Yen-Cheng Lin, Tay-Jyi Lin, Chih-Wei Liu: Improving energy efficiency of functional units by exploiting their data-dependent latency. ISCAS 2010: 4165-4168

Yu-Ting Kuo, Tay-Jyi Lin, Yueh-Tai Li, Chou-Kun Lin, Chih-Wei Liu: Ultra low-power ANSI S1.11 filter bank for digital hearing aids. ASP-DAC 2009: 115-116

Shin-Kai Chen, Tay-Jyi Lin, Chih-Wei Liu: Parallel object detection on multicore platforms. SiPS 2009: 075-080

Tay-Jyi Lin, Shin-Kai Chen, Yu-Ting Kuo, Chih-Wei Liu, Pi-Chen Hsiao: Design and Implementation of a High-Performance and Complexity-Effective VLIW DSP for Multimedia Applications. Signal Processing Systems 51(3): 209-223 (2008)

Shih-Hao Ou, Tay-Jyi Lin, Xiang Sheng Deng, Zhi Hong Zhuo, Chih-Wei Liu: Multithreaded coprocessor interface for multi-core multimedia SoC. ASP-DAC 2008: 115-116

Yu-Ting Kuo, Tay-Jyi Lin, Wei-Han Chang, Yueh-Tai Li, Chih-Wei Liu, Shuenn-Tsong Young: Complexity-effective auditory compensation for digital hearing aids. ISCAS 2008: 1472-1475

Shih-Hao Ou, Yi Cho, Tay-Jyi Lin, Chih-Wei Liu: Improving datapathutilization of programmable DSP with composite functional units. ISCAS 2008: 3438-3441

Chih-Wei Liu, Chung-Chin Lu: A View of Gaussian Elimination Applied to Early Stopped Berklekamp-Massey Algorithm. IEEE Transactions on Communications 55(5): 1089-1089 (2007)

Chih-Wei Liu, Chung-Chin Lu: A View of Gaussian Elimination Applied to Early-Stopped Berlekamp-Massey Algorithm. IEEE Transactions on Communications 55(6): 1131-1143 (2007)

Yen-Chin Liao, Chien-Ching Lin, Hsie-Chia Chang, Chih-Wei Liu: Self-Compensation Technique for Simplified Belief-Propagation Algorithm. IEEE Transactions on Signal Processing 55(6-2): 3061-3072 (2007)

Li-Chun Lin, Shih-Hao Ou, Tay-Jyi Lin, Siang-Den Deng, Chih-Wei Liu: Single-Issue 1500MIPS Embedded DSP with Ultra Compact Codes. ASP-DAC 2007: 110-111

Shin-Kai Chen, Bing-Shiun Wang, Tay-Jyi Lin, Chih-Wei Liu: Rapid C to FPGA Prototyping with Multithreaded Emulation Engine. ISCAS 2007: 409-412

Pi-Chen Hsiao, Tay-Jyi Lin, Chih-Wei Liu, Chein-Wei Jen: Latency-Tolerant Virtual Cluster Architecture for VLIW DSP. ISCAS 2007: 3506-3509

Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chih-Wei Jen: A Compact DSP Core with Static Floating-Point Arithmetic. VLSI Signal Processing 42(2): 127-138 (2006)

Shih-Hao Ou, Tay-Jyi Lin, Chao-Wei Huang, Yu-Ting Kuo, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen: A 52mW 1200MIPS compact DSP for multi-core media SoC. ASP-DAC 2006: 118-119

Cheng-Fa Tsai, Chih-Wei Liu: KIDBSCAN: A New Efficient Data Clustering Algorithm. ICAISC 2006: 702-711

Yu-Ting Kuo, Tay-Jyi Lin, Yi Cho, Chih-Wei Liu, Chein-Wei Jen: Programmable FIR filter with adder-based computing engine. ISCAS 2006

Yen-Chin Liao, Hsie-Chia Chang, Chih-Wei Liu: Carry Estimation for Two's Complement Fixed-Width Multipliers. SiPS 2006: 345-350

Tay-Jyi Lin, Chie-Min Chao, Chia-Hsien Liu, Pi-Chen Hsiao, Shin-Kai Chen, Li-Chun Lin, Chih-Wei Liu, Chein-Wei Jen: A unified processor architecture for RISC & VLIW DSP. ACM Great Lakes Symposium on VLSI 2005: 50-55

Yu-Ting Kuo, Tay-Jyi Lin, Chih-Wei Liu, Chein-Wei Jen: Architecture for area-efficient 2-D transform in H.264/AVC. ICME 2005: 1126-1129

Wei-Sheng Huang, Tay-Jyi Lin, Shih-Hao Ou, Chih-Wei Liu, Chein-Wei Jen: Pipelining technique for energy-aware datapaths. ISCAS (2) 2005: 1218-1221

Chia-Hsien Liu, Tay-Jyi Lin, Chie-Min Chao, Pi-Chen Hsiao, Li-Chun Lin, Shin-Kai Chen, Chao-Wei Huang, Chih-Wei Liu, Chein-Wei Jen: Hierarchical instruction encoding for VLIW digital signal processors. ISCAS (4) 2005: 3503-3506

Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen: A compact DSP core with static floating-point unit & its microcode generation. ACM Great Lakes Symposium on VLSI 2004: 57-60

Hung-Yueh Lin, Tay-Jyi Lin, Chie-Min Chao, Yen-Chin Liao, Chih-Wei Liu, Chein-Wei Jen: Static floating-point unit with implicit exponent tracking for embedded DSP. ISCAS (2) 2004: 821-824

Yung-Chung Wang, Chih-Wei Liu, Chung-Chin Lu: Loss behavior in space priority queue with batch Markovian arrival process - discrete-time case. Perform. Eval. 41(4): 269-293 (2000)

Chih-Wei Liu, Kuo-Tai Huang, Chung-Chin Lu: A Systolic Array Implementation of the Feng-Rao Algorithm. IEEE Trans. Computers 48(7): 690-706 (1999)