| 2013 | ||
|---|---|---|
| j2 | Kyoung-Hwan Lim, Deokjin Joo, Taewhan Kim: An Optimal Allocation Algorithm of Adjustable Delay Buffers and Practical Extensions for Clock Skew Optimization in Multiple Power Mode Designs. IEEE Trans. on CAD of Integrated Circuits and Systems 32(3): 392-405 (2013) | |
| 2011 | ||
| c2 | Kyoung-Hwan Lim, Taewhan Kim: An optimal algorithm for allocation, placement, and delay assignment of adjustable delay buffers for clock skew minimization in multi-voltage mode designs. ASP-DAC 2011: 503-508 | |
| 2009 | ||
| j1 | Kyoung-Hwan Lim, YongHwan Kim, Taewhan Kim: Interconnect and communication synthesis for distributed register-file microarchitecture. IET Computers & Digital Techniques 3(2): 162-174 (2009) | |
| 2007 | ||
| c1 | Kyoung-Hwan Lim, YongHwan Kim, Taewhan Kim: Interconnect and Communication Synthesis for Distributed Register-File Microarchitecture. DAC 2007: 765-770 | |
| 1 | Deokjin Joo | |
| 2 | Taewhan Kim | |
| 3 | YongHwan Kim |
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