| 2013 | ||
|---|---|---|
| j8 | Camille Leroux, Alexandre J. Raymond, Gabi Sarkis, Warren J. Gross: A Semi-Parallel Successive-Cancellation Decoder for Polar Codes. IEEE Transactions on Signal Processing 61(2): 289-299 (2013) | |
| 2012 | ||
| j7 | Camille Leroux, Alexandre J. Raymond, Gabi Sarkis, Ido Tal, Alexander Vardy, Warren J. Gross: Hardware Implementation of Successive-Cancellation Decoders for Polar Codes. Signal Processing Systems 69(3): 305-315 (2012) | |
| 2011 | ||
| j6 | Camille Leroux, Christophe Jégo, Patrick Adde, Deepak Gupta, Michel Jézéquel: Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture. Signal Processing Systems 64(1): 17-29 (2011) | |
| c3 | Camille Leroux, Ido Tal, Alexander Vardy, Warren J. Gross: Hardware architectures for successive cancellation decoding of polar codes. ICASSP 2011: 1665-1668 | |
| i2 | Camille Leroux, Alexandre J. Raymond, Gabi Sarkis, Ido Tal, Alexander Vardy, Warren J. Gross: Hardware Implementation of Successive Cancellation Decoders for Polar Codes. CoRR abs/1111.4362 (2011) | |
| 2010 | ||
| j5 | Camille Leroux, Saied Hemati, Shie Mannor, Warren J. Gross: Stochastic Chase Decoding of Reed-Solomon Codes. IEEE Communications Letters 14(9): 863-865 (2010) | |
| j4 | Kevin Cushon, Camille Leroux, Saied Hemati, Shie Mannor, Warren J. Gross: A Min-Sum Iterative Decoder Based on Pulsewidth Message Encoding. IEEE Trans. on Circuits and Systems 57-II(11): 893-897 (2010) | |
| i1 | Camille Leroux, Ido Tal, Alexander Vardy, Warren J. Gross: Hardware architectures for Successive Cancellation Decoding of Polar Codes. CoRR abs/1011.2919 (2010) | |
| 2009 | ||
| j3 | Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel: High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping. Signal Processing Systems 57(3): 349-361 (2009) | |
| 2008 | ||
| j2 | Raphaël Le Bidan, Camille Leroux, Christophe Jégo, Patrick Adde, Ramesh Pyndiah: Reed-Solomon Turbo Product Codes for Optical Communications: From Code Optimization to Decoder Design. EURASIP J. Wireless Comm. and Networking 2008 (2008) | |
| c2 | Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel, Deepak Gupta: A highly parallel Turbo Product Code decoder without interleaving resource. SiPS 2008: 1-6 | |
| 2007 | ||
| j1 | Christophe Jégo, Patrick Adde, Camille Leroux: Architecture de turbo-décodeur en blocs entièrement parallèle pour la transmission de données au-delà du Gbit/s. Annales des Télécommunications 62(1-2): 214-239 (2007) | |
| c1 | Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel: Towards Gb/s turbo decoding of product code onto an FPGA device. ISCAS 2007: 909-912 | |
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