| 2012 | ||
|---|---|---|
| j11 | Mi Jeong Song, Jeong-Gun Lee, Jong-Myeon Park, Sungjoo Lee: Triggering navigators for innovative system design: The case of lab-on-a-chip technology. Expert Syst. Appl. 39(16): 12451-12459 (2012) | |
| c16 | Seung-Joon Lee, Deok-Young Lee, Young Woong Ko, Jeong-Gun Lee: Asynchronous Circuit Design on an FPGA: MIPS Processor Case Study. ICHIT (2) 2012: 480-487 | |
| c15 | Byung Ki Kim, Jeong-Gun Lee, Seon Woo Lee, Young Woong Ko: Low Latency Scheduling on Multi BOOST Environment. ICHIT (2) 2012: 720-724 | |
| 2011 | ||
| c14 | Ho Min Jung, Won Vien Park, Wan Yeon Lee, Jeong-Gun Lee, Young Woong Ko: Data Deduplication System for Supporting Multi-mode. ACIIDS (1) 2011: 78-87 | |
| c13 | Ho Min Jung, Sung Woon Kang, Jin Kim, Wan Yeon Lee, Jeong-Gun Lee, Young Woong Ko: Energy Efficient File Transfer Mechanism Using Deduplication Scheme. ICHIT (1) 2011: 421-428 | |
| c12 | Byung Ki Kim, Jae Hyeok Jang, Kyung Woo Hur, Jeong-Gun Lee, Young Woong Ko: Monitoring and Feedback Tools for Realtime Workloads for Xen Virtual Machine. ICITCS 2011: 151-161 | |
| 2010 | ||
| j10 | Jeong-Gun Lee, Wook Shin, Suk-Jin Kim, Eun-Gu Jung: A Performance/Energy Analysis and Optimization of Multi-Core Architectures with Voltage Scaling Techniques. IEICE Transactions 93-A(6): 1215-1225 (2010) | |
| 2009 | ||
| j9 | Sanghoon Kwak, Jeong-Gun Lee, Eun-Gu Jung, Dongsoo Har, Milos D. Ercegovac, Jeong-A. Lee: Exploration of Power-Delay Trade-Offs with Heterogeneous Adders by Integer Linear Programming. Journal of Circuits, Systems, and Computers 18(4): 787-800 (2009) | |
| c11 | Jeong-Gun Lee, Eun-Gu Jung, Wook Shin: An Asymptotic Performance/Energy Analysis and Optimization of Multi-core Architectures. ICDCN 2009: 85-90 | |
| 2008 | ||
| c10 | Jeong-Gun Lee, Eun-Gu Jung: Embedding High-Performance Synchronous Routers to Asynchronous Network on Chip. CDES 2008: 124-128 | |
| 2007 | ||
| j8 | Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Son Jhang, Jeong-A. Lee, Dong-Soo Har: Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions. VLSI Signal Processing 46(2-3): 133-151 (2007) | |
| c9 | Jeong-Gun Lee, Jeong-A. Lee, Byeong-Seok Lee, Milos D. Ercegovac: A Design Method for Heterogeneous Adders. ICESS 2007: 121-132 | |
| c8 | Daniel Greenfield, Arnab Banerjee, Jeong-Gun Lee, Simon W. Moore: Implications of Rent's Rule for NoC Design and Its Fault-Tolerance. NOCS 2007: 283-294 | |
| 2005 | ||
| j7 | Wook Shin, Jeong-Gun Lee, Hong Kook Kim, Kouichi Sakurai: Procedural Constraints in the Extended RBAC and the Coloured Petri Net Modeling. IEICE Transactions 88-A(1): 327-330 (2005) | |
| j6 | Jeong-Gun Lee, Suk-Jin Kim, Jeong-A. Lee, Kiseon Kim: A Low Latency Asynchronous FIFO Combining a Wave Pipeline with a Handshake Scheme. IEICE Transactions 88-A(4): 1031-1037 (2005) | |
| j5 | Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Sun Jhang, Dong-Soo Har: Differential Value Encoding for Delay Insensitive Handshake Protocol. IEICE Transactions 88-D(7): 1437-1444 (2005) | |
| j4 | Suk-Jin Kim, Jeong-Gun Lee, Kiseon Kim: Low Latency Four-Flop Synchronizer with the Handshake Interface. IEICE Transactions 88-D(7): 1460-1463 (2005) | |
| j3 | Jeong-Gun Lee, Jeong-A. Lee, Suk-Jin Kim, Kiseon Kim: Design of a Mutated Adder and Its Optimization Using ILP Formulation. IEICE Transactions 88-D(7): 1506-1508 (2005) | |
| j2 | Eun-Gu Jung, Jeong-Gun Lee, Sanghoon Kwak, Kyoung-Son Jhang, Jeong-A. Lee, Dong-Soo Har: Asynchronous Multiple-Issue On-Chip Bus with In-Order/Out-of-Order Completion. IEICE Transactions 88-C(12): 2395-2399 (2005) | |
| j1 | Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee: Instruction level redundant number computations for fast data intensive processing in asynchronous processors. Journal of Systems Architecture 51(3): 151-164 (2005) | |
| c7 | Eun-Gu Jung, Jeong-Gun Lee, Sanghoon Kwak, Kyoung-Sun Jhang, Jeong-A. Lee, Dong-Soo Har: High performance asynchronous on-chip bus with multiple issue and out-of-order/in-order completion. ACM Great Lakes Symposium on VLSI 2005: 152-155 | |
| 2004 | ||
| c6 | Jeong-Gun Lee, Euiseok Kim, Jeong-A. Lee, Eunok Paek: Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization. Asia-Pacific Computer Systems Architecture Conference 2004: 582-595 | |
| 2003 | ||
| c5 | Euiseok Kim, Dong-Ik Lee, Hiroshi Saito, Hiroshi Nakamura, Jeong-Gun Lee, Takashi Nanya: Performance optimization of synchronous control units for datapaths with variable delay arithmetic units. ASP-DAC 2003: 816-819 | |
| c4 | Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya: Distributed Synchronous Control Units for Dataflow Graphs under Allocation of Telescopic Arithmetic Units. DATE 2003: 10276-10281 | |
| 2001 | ||
| c3 | Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee: Building a Distributed Asynchronous Control Unit through Automatic Derivation of Hierarchically Decomposed AFSMs from a CDFG. ARVLSI 2001: 2-15 | |
| c2 | Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee: Imprecise data computation for high performance asynchronous processors. ASP-DAC 2001: 261-266 | |
| 2000 | ||
| c1 | Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee: Automatic Process-Oriented Control Circuit Generation for Asynchronous High-Level Synthesis. ASYNC 2000: 104-113 | |
Colors in the list of coauthors
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