Konrad K. Lai
List of publications from the DBLP Bibliography Server - FAQ
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 | 2006 | |
|---|---|---|
| j5 |      | Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan, Konrad Lai: Scalable Load and Store Processing in Latency-Tolerant Processors. IEEE Micro 26(1): 30-39 (2006) |
| 2005 | ||
| j4 | | Ayose Falcón, Jared Stark, Alex Ramírez, Konrad K. Lai, Mateo Valero: Better Branch Prediction Through Prophet/Critic Hybrids. IEEE Micro 25(1): 80-89 (2005) |
| c14 | | Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan, Konrad K. Lai: Scalable Load and Store Processing in Latency Tolerant Processors. ISCA 2005: 446-457 |
| c13 | | |
| c12 | | Saisanthosh Balakrishnan, Ravi Rajwar, Michael Upton, Konrad K. Lai: The Impact of Performance Asymmetry in Emerging Multicore Architectures. ISCA 2005: 506-517 |
| 2004 | ||
| j3 | | Lu Peng, Jih-Kwon Peir, Konrad Lai: A New Address-Free Memory Hierarchy Layer for Zero-Cycle Load. J. Instruction-Level Parallelism 6 (2004) |
| c11 | | Lu Peng, Jih-Kwon Peir, Konrad Lai: Signature Buffer: Bridging Performance Gap between Registers and Caches. HPCA 2004: 164-175 |
| c10 | | Srikanth T. Srinivasan, Haitham Akkary, Tom Holman, Konrad Lai: A Minimal Dual-Core Speculative Multi-Threading Architecture. ICCD 2004: 360-367 |
| c9 | | Ayose Falcón, Jared Stark, Alex Ramírez, Konrad Lai, Mateo Valero: Prophet/Critic Hybrid Branch Prediction. ISCA 2004: 250-263 |
| 2003 | ||
| j2 | | Lu Peng, Jih-Kwon Peir, Qianrong Ma, Konrad Lai: Address-free memory access based on program syntax correlation of loads and stores. IEEE Trans. VLSI Syst. 11(3): 314-324 (2003) |
| c8 | | Shih-Lien Lu, Konrad Lai: Implementation of HW$im - A Real-Time Configurable Cache Simulator. FPL 2003: 638-647 |
| c7 | | Haitham Akkary, Srikanth T. Srinivasan, Konrad Lai: Recycling waste: exploiting wrong-path execution to improve branch prediction. ICS 2003: 12-21 |
| 2002 | ||
| c6 | | Jih-Kwon Peir, Shih-Chang Lai, Shih-Lien Lu, Jared Stark, Konrad Lai: Bloom filtering cache misses for accurate data speculation and prefetching. ICS 2002: 189-198 |
| c5 | | Steven Hsu, Shih-Lien Lu, Shih-Chang Lai, Ram Krishnamurthy, Konrad Lai: Dynamic addressing memory arrays with physical locality. MICRO 2002: 161-170 |
| 2001 | ||
| c4 |  | Qianrong Ma, Jih-Kwon Peir, Lu Peng, Konrad Lai: Symbolic Cache: Fast Memory Access Based on Program Syntax Correlation of Loads and Stores. ICCD 2001: 54-61 |
| c3 | | Byung-Kwon Chung, Jinsuo Zhang, Jih-Kwon Peir, Shih-Chang Lai, Konrad Lai: Direct load: dependence-linked dataflow resolution of load address and cache coordinate. MICRO 2001: 76-87 |
| 1983 | ||
| j1 | | George W. Cox, William M. Corwin, Konrad K. Lai, Fred J. Pollack: Interprocess Communication and Processor Dispatching on the Intel 432. ACM Trans. Comput. Syst. 1(1): 45-66 (1983) |
| 1982 | ||
| c2 | | Fred J. Pollack, George W. Cox, Dan W. Hammerstrom, Kevin C. Kahn, Konrad K. Lai, Justin R. Rattner: Supporting Ada Memory Management in the iAPX-432. ASPLOS 1982: 117-131 |
| 1981 | ||
| c1 | | George W. Cox, William M. Corwin, Konrad K. Lai, Fred J. Pollack: A Unified Model and Implementation for Interprocess Communication in a Multiprocessor Environment. SOSP 1981: 125-126 |
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