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 | 1999 | |
|---|---|---|
| c1 |      | Pak K. Chan, Mark J. Boyd, Sezer Gören, K. Klenk, V. Kodavati, R. Kundu, M. Margolese, J. Sun, K. Suzuki, E. Thorne, X. Wang, J. Xu, M. Zhu: Reducing Compilation Time of Zhong's FPGA-Based SAT Solver. FCCM 1999: 308-309 |
| 1 | Mark J. Boyd | |
| 2 | Pak K. Chan | |
| 3 | Sezer Gören | |
| 4 | K. Klenk | |
| 5 | V. Kodavati | |
| 6 | M. Margolese | |
| 7 | J. Sun | |
| 8 | K. Suzuki | |
| 9 | E. Thorne | |
| 10 | X. Wang | |
| 11 | J. Xu | |
| 12 | M. Zhu |
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