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Arun Kundu
2010 – today
- 2011
[j2]Andrew A. Kennings, Kristofer Vorwerk, Arun Kundu, Val Pevzner, Andy Fox: FPGA technology mapping with encoded libraries and staged priority cuts. TRETS 4(4): 35 (2011)- 2010
- [j1]Kristofer Vorwerk, Andrew A. Kennings, Val Pevzner, Arun Kundu, Madhu Raman, Julien Dunoyer, Yaun-shung Hsu: Power minimisation during field programmable gate array placement. IET Computers & Digital Techniques 4(3): 170-183 (2010)
- [c4]Andrew A. Kennings, Alan Mishchenko, Kristofer Vorwerk, Val Pevzner, Arun Kundu: Efficient FPGA Resynthesis Using Precomputed LUT Structures. FPL 2010: 532-537
2000 – 2009
- 2009
- [c3]Andrew A. Kennings, Kristofer Vorwerk, Arun Kundu, Val Pevzner, Andy Fox: FPGA technology mapping with encoded libraries andstaged priority cuts. FPGA 2009: 143-150
- 2008
- [c2]Kristofer Vorwerk, Madhu Raman, Julien Dunoyer, Yaun-Chung Hsu, Arun Kundu, Andrew A. Kennings: A technique for minimizing power during FPGA placement. FPL 2008: 233-238
1990 – 1999
- 1999
- [c1]Sinan Kaptanoglu, Greg Bakker, Arun Kundu, Ivan Corneillet, Ben Ting: A New High Density and Very Low Cost Reprogrammable FPGA Architecture. FPGA 1999: 3-12
Coauthor Index
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last updated on 2012-11-04 02:59 CET by the dblp team