Tim Kiszely

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	2012
c1		Brian Miller, Derek Brasili, Tim Kiszely, Rob Kuhn, Rahul Mehrotra, Manan Salvi, Mandar Kulkarni, Anand Varadharajan, Shi-Huang Yin, William Lin, Adam Hughes, Bill Stysiack, Vasu Kandadi, Ilan Pragaspathi, Dan Hartman, David Carlson, Vishnu Yalala, Thucydides Xanthopoulos, Scott Meninger, Ethan Crain, Mark Spaeth, Akin Aina, Suresh Balasubramanian, Joe Vulih, Pragati Tiwary, David Lin, Richard Kessler, Bruce Fishbein, Anil Jain: A 32-core RISC microprocessor with network accelerators, power management and testability features. ISSCC 2012: 58-60

Coauthor Index

1	Akin Aina	[c1]
2	Suresh Balasubramanian	[c1]
3	Derek Brasili	[c1]
4	David Carlson	[c1]
5	Ethan Crain	[c1]
6	Bruce Fishbein	[c1]
7	Dan Hartman	[c1]
8	Adam Hughes	[c1]
9	Anil Jain	[c1]
10	Vasu Kandadi	[c1]
11	Richard Kessler	[c1]
12	Rob Kuhn	[c1]
13	Mandar Kulkarni	[c1]
14	David Lin	[c1]
15	William Lin	[c1]
16	Rahul Mehrotra	[c1]
17	Scott Meninger	[c1]
18	Brian Miller	[c1]
19	Ilan Pragaspathi	[c1]
20	Manan Salvi	[c1]
21	Mark Spaeth	[c1]
22	Bill Stysiack	[c1]
23	Pragati Tiwary	[c1]
24	Anand Varadharajan	[c1]
25	Joe Vulih	[c1]
26	Thucydides Xanthopoulos	[c1]
27	Vishnu Yalala	[c1]
28	Shi-Huang Yin	[c1]

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