Zhigang Jiang

Zhigang Jiang, Jinlong Yuan, Enmin Feng: Robust identification and its properties of nonlinear bilevel multi-stage dynamic system. Applied Mathematics and Computation 219(12): 6979-6985 (2013)

Zhigang Jiang, Hua Zhang, Wei Yan, Min Zhou, Gongfa Li: A method for evaluating environmental performance of machining systems. Int. J. Computer Integrated Manufacturing 25(6): 488-495 (2012)

Shianling Wu, Laung-Terng Wang, Xiaoqing Wen, Zhigang Jiang, Lang Tan, Yu Zhang, Yu Hu, Wen-Ben Jone, Michael S. Hsiao, James Chien-Mo Li, Jiun-Lang Huang, Lizhen Yu: Using Launch-on-Capture for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains. IEEE Trans. on CAD of Integrated Circuits and Systems 30(3): 455-463 (2011)

Gongfa Li, Jianyi Kong, Guozhang Jiang, Hua Zhang, Zhigang Jiang, Gang Zhao, Liangxi Xie: Energy Efficiency Evaluation for Iron and Steel High Energy Consumption Enterprise. ISIA 2010: 684-690

Laung-Terng Wang, Nur A. Touba, Zhigang Jiang, Shianling Wu, Jiun-Lang Huang, James Chien-Mo Li: CSER: BISER-based concurrent soft-error resilience. VTS 2010: 153-158

Zhigang Jiang, Sandeep K. Gupta: Threshold Testing: Improving Yield for Nanoscale VLSI. IEEE Trans. on CAD of Integrated Circuits and Systems 28(12): 1883-1895 (2009)

Laung-Terng Wang, Xiaoqing Wen, Shianling Wu, Zhigang Wang, Zhigang Jiang, Boryau Sheu, Xinli Gu: VirtualScan: Test Compression Technology Using Combinational Logic and One-Pass ATPG. IEEE Design & Test of Computers 25(2): 122-130 (2008)

Shianling Wu, Laung-Terng Wang, Zhigang Jiang, Jiayong Song, Boryau Sheu, Xiaoqing Wen, Michael S. Hsiao, James Chien-Mo Li, Jiun-Lang Huang, Ravi Apte: On Optimizing Fault Coverage, Pattern Count, and ATPG Run Time Using a Hybrid Single-Capture Scheme for Testing Scan Designs. DFT 2008: 143-151

Hiroshi Furukawa, Xiaoqing Wen, Laung-Terng Wang, Boryau Sheu, Zhigang Jiang, Shianling Wu: A Novel and Practical Control Scheme for Inter-Clock At-Speed Testing. ITC 2006: 1-10

Zhigang Jiang, Sandeep K. Gupta: Threshold testing: Covering bridging and other realistic faults. Asian Test Symposium 2005: 390-397

Shianling Wu, Laung-Terng Wang, Jin Woo Cho, Zhigang Jiang, Boryau Sheu: Test compression and logic BIST at your fingertips. ITC 2005: 2

Md. Saffat Quasem, Zhigang Jiang, Sandeep K. Gupta: Benefits of a SoC-Specific Test Methodology. IEEE Design & Test of Computers 20(3): 68-77 (2003)

Zhigang Jiang, Sandeep K. Gupta: A Test Generation Approach for Systems-on-Chip that Use Intellectual Property Cores. Asian Test Symposium 2003: 278-283

Zhigang Jiang, Sandeep K. Gupta: An ATPG for Threshold Testing: Obtaining Acceptable Yield in Future Processes. ITC 2002: 824-833