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Yu-Tsao Hsing

2010 – today

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2010
[j3]
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  dblp key:
  - journals/dt/HsingDCW10
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Yu-Tsao Hsing, Li-Ming Denq, Chao-Hsun Chen, Cheng-Wen Wu: Economic Analysis of the HOY Wireless Test Methodology. IEEE Design & Test of Computers 27(3): 20-30 (2010)
[j2]
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  dblp key:
  - journals/tcad/LoHDW10
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Chih-Yen Lo, Yu-Tsao Hsing, Li-Ming Denq, Cheng-Wen Wu: SOC Test Architecture and Method for 3-D ICs. IEEE Trans. on CAD of Integrated Circuits and Systems 29(10): 1645-1649 (2010)

2000 – 2009

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2009
[j1]
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  - journals/dt/DenqHW09
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Li-Ming Denq, Yu-Tsao Hsing, Cheng-Wen Wu: Hybrid BIST Scheme for Multiple Heterogeneous Embedded Memories. IEEE Design & Test of Computers 26(2): 64-73 (2009)
[c4]
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  - conf/vts/ChenHHW09
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Te-Hsuan Chen, Yu-Ying Hsiao, Yu-Tsao Hsing, Cheng-Wen Wu: An Adaptive-Rate Error Correction Scheme for NAND Flash Memory. VTS 2009: 53-58
2007
[c3]
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  - conf/vts/HsingHYW07
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Yu-Tsao Hsing, Chun-Chieh Huang, Jen-Chieh Yeh, Cheng-Wen Wu: SDRAM Delay Fault Modeling and Performance Testing. VTS 2007: 53-58
2006
[c2]
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  - conf/mtdt/HsuHYW06
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Mu-Hsien Hsu, Yu-Tsao Hsing, Jen-Chieh Yeh, Cheng-Wen Wu: Fault-Pattern Oriented Defect Diagnosis for Flash Memory. MTDT 2006: 3-8
2004
[c1]
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  - conf/dft/HsingWWHW04
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Yu-Tsao Hsing, Chih-Wea Wang, Ching-Wei Wu, Chih-Tsun Huang, Cheng-Wen Wu: Failure Factor Based Yield Enhancement for SRAM Designs. DFT 2004: 20-28

Coauthor Index

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