Kei Hiraki

Hidetsugu Irie, Takefumi Miyoshi, Goki Honjo, Kei Hiraki, Tsutomu Yoshinaga: Using Cacheline Reuse Characteristics for Prefetcher Throttling. IEICE Transactions 95-D(12): 2928-2938 (2012)

Yasuo Ishii, Mary Inaba, Kei Hiraki: Unified memory optimizing architecture: memory subsystem control with a unified predictor. ICS 2012: 267-278

Hisanobu Tomari, Kei Hiraki: Abstract: Impact of Integer Instructions in Floating Point Applications. SC Companion 2012: 1347-1348

Hisanobu Tomari, Kei Hiraki: Poster: The Impact of Integer Instructions in Floating Point Applications. SC Companion 2012: 1349

Yasuo Ishii, Mary Inaba, Kei Hiraki: Access Map Pattern Matching for High Performance Data Cache Prefetch. J. Instruction-Level Parallelism 13 (2011)

Junichiro Makino, Hiroshi Daisaka, Toshiyuki Fukushige, Yutaka Sugawara, Mary Inaba, Kei Hiraki: The performance of GRAPE-DR for dense matrix operations. Procedia CS 4: 888-897 (2011)

Hidetsugu Irie, Takefumi Miyoshi, Goki Honjo, Kei Hiraki, Tsutomu Yoshinaga: CCCPO: Robust Prefetcher Optimization Technique Based on Cache Convection. ICNC 2011: 127-133

Kei Hiraki: SIGMA-1. Encyclopedia of Parallel Computing 2011: 1812-1819

Simon Portegies Zwart, Derek Groen, Tomoaki Ishiyama, Keigo Nitadori, Junichiro Makino, Cees de Laat, Steve McMillan, Kei Hiraki, Stefan Harfst, Paola Grosso: Simulating the Universe on an Intercontinental Grid. IEEE Computer 43(8): 63-70 (2010)

Hisanobu Tomari, Mary Inaba, Kei Hiraki: Compressing Floating-Point Number Stream for Numerical Applications. ICNC 2010: 112-119

Simon Portegies Zwart, Tomoaki Ishiyama, Derek Groen, Keigo Nitadori, Junichiro Makino, Cees de Laat, Stephen L. W. McMillan, Kei Hiraki, Stefan Harfst, Paola Grosso: Simulating the universe on an intercontinental grid of supercomputers. CoRR abs/1001.0773 (2010)

Yasuo Ishii, Mary Inaba, Kei Hiraki: Access map pattern matching for data cache prefetch. ICS 2009: 499-500

Naoki Tanida, Mary Inaba, Kei Hiraki, Takeshi Yoshino: Hardware Accelerator for Full-Text Search (HAFTS) with Succinct Data Structure. ReConFig 2009: 155-160

Kenichi Koizumi, Mary Inaba, Kei Hiraki, Yasuo Ishii, Takefumi Miyoshi, Kazuki Yoshizoe: Triple Line-Based Playout for Go - An Accelerator for Monte Carlo Go. ReConFig 2009: 161-166

Hiroshige Hayashizaki, Yutaka Sugawara, Mary Inaba, Kei Hiraki: MCAMP: communication optimization on massively parallel machines with hierarchical scratch-pad memory. PACT 2008: 102-111

Yasuhiro Ito, Yutaka Sugawara, Mary Inaba, Kei Hiraki: CVC: The C to RTL compiler for callback-based verification model. FPL 2008: 499-502

Yutaka Sugawara, Takeshi Yoshino, Hiroshi Tezuka, Mary Inaba, Kei Hiraki: Effect of Packet Shuffler on Parallel TCP Stream Network. ICN 2008: 180-185

Yutaka Sugawara, Takeshi Yoshino, Hiroshi Tezuka, Mary Inaba, Kei Hiraki: Effect of Parallel TCP Stream Equalizer on Real Long Fat-pipe Network. NCA 2008: 279-282

Takeshi Yoshino, Yutaka Sugawara, Katsushi Inagami, Junji Tamatsukuri, Mary Inaba, Kei Hiraki: Performance optimization of TCP/IP over 10 gigabit ethernet by precise instrumentation. SC 2008: 11

Yutaka Sugawara, Mary Inaba, Kei Hiraki: Flow Balancing Hardware for Parallel TCP Streams on Long Fat Pipe Network. FGCN (1) 2007: 391-396

Kei Hiraki: GRAPE-DR Project: a combination of peta-scale computing and high-speed networking. FPT 2007

Yousuke Nakamura, Kei Hiraki: Heterogeneous Functional Units for High Speed Fault-Tolerant Execution Stage. PRDC 2007: 260-263

Junichiro Makino, Kei Hiraki, Mary Inaba: GRAPE-DR: 2-Pflops massively-parallel computer with 512-core, 512-Gflops processor chips for scientific computing. SC 2007: 18

Yuu Shibata, Kei Hiraki: Applying recent techniques for retro games: in the case of undo function. Advances in Computer Entertainment Technology 2006: 21

Mary Inaba, Kei Hiraki: Network Processing Hardware. AINTEC 2006: 103-112

Rei Odaira, Kei Hiraki: Sentinel PRE: Hoisting beyond Exception Dependency with Dynamic Deoptimization. CGO 2005: 328-338

Yutaka Sugawara, Mary Inaba, Kei Hiraki: High-speed and Memory Efficient TCP Stream Scanning using FPGA. FPL 2005: 45-50

Shoichi Hirasawa, Kei Hiraki: Software SMLP Execution with Side-Effect Slice Exclusion. PDPTA 2005: 832-840

Yutaka Sugawara, Mary Inaba, Kei Hiraki: Over 10Gbps String Matching Mechanism for Multi-stream Packet Scanning Systems. FPL 2004: 484-493

Masamichi Takagi, Kei Hiraki: Inter-reference gap distribution replacement: an improved replacement algorithm for set-associative caches. ICS 2004: 20-30

Makoto Nakamura, Hiroyuki Kamezawa, Junji Tamatsukuri, Mary Inaba, Kei Hiraki, K. Mizuguchi, K. Torii, S. Nakano, Shizuo Yoshita, Ryutaro Kurusu, M. Sakamoto, Y. Furukawa, Takeshi Yanagisawa, Yukichi Ikuta, J. Shitami, Akira Zinzaki: Long Fat Pipe Congestion Control for Multi-Stream Data Transfer. ISPAN 2004: 294-299

Rei Odaira, Kei Hiraki: Partial Value Number Redundancy Elimination. LCPC 2004: 409-423

Shoichi Hirasawa, Kei Hiraki: Utilizing Dynamic Data Value Localities in Internal Variables. PDCAT 2004: 305-309

Hiroyuki Kamezawa, Makoto Nakamura, Junji Tamatsukuri, Nao Aoshima, Mary Inaba, Kei Hiraki: Inter-Layer Coordination for Parallel TCP Streams on Long Fat Pipe Networks. SC 2004: 24

Masamichi Takagi, Kei Hiraki: Compression in Data Caches with Compressible Field Isolation for Recursive Data Structures. Euro-Par 2003: 609-615

Ray Odaira, Kei Hiraki: Selective Optimization of Locks by Runtime Statistics and Just-in-Time Compilation. IPDPS 2003: 135

Masamichi Takagi, Kei Hiraki: Field Array Compression in Data Caches for Dynamically Allocated Recursive Data Structure. ISHPC 2003: 127-145

Kei Hiraki, Mary Inaba, Junji Tamatsukuri, Ryutaro Kurusu, Yukichi Ikuta, Hisashi Koga, Akira Zinzaki: Data Reservoir: A New Approach to Data-Intensive Scientific Computation. ISPAN 2002: 269-274

Yousuke Nakamura, Kei Hiraki: Highly Fault-Tolerant FPGA Processor by Degrading Strategy. PRDC 2002: 75-80

Kei Hiraki, Mary Inaba, Junji Tamatsukuri, Ryutaro Kurusu, Yukichi Ikuta, Hisashi Koga, Akira Zinzaki: Data Reservoir: utilization of multi-gigabit backbone network for data-intensive research. SC 2002: 1-9

Junpei Niwa, Takashi Matsumoto, Kei Hiraki: Comparative study of page-based and segment-based software DSM through compiler optimization. ICS 2000: 284-295

Kiyofumi Tanaka, Takashi Matsumoto, Kei Hiraki: Lightweight Hardware Distributed Shared Memory Supported by Generalized Combining. HPCA 1999: 90-99

Kenji Morimoto, Takashi Matsumoto, Kei Hiraki: Performance Evaluation of the MPI/MBCF with the NAS Parallel Benchmarks. PVM/MPI 1999: 19-26

Shigero Sasaki, Takashi Matsumoto, Kei Hiraki: On the Schedulability Conditions on Partial Time Slots . RTCSA 1999: 166-173

Tatsushi Inagaki, Junpei Niwa, Takashi Matsumoto, Kei Hiraki: Supporting Software Distributed Shared Memory with an Optimizing Compiler. ICPP 1998: 225-

Takashi Matsumoto, Kei Hiraki: MBCF: A Protected and Virtualized High-Speed User-Level Memory-Based Communication Facility. International Conference on Supercomputing 1998: 259-266

Kei Hiraki, Junji Tamatsukuri, Takashi Matsumoto: Speculative Execution Model with Duplication. International Conference on Supercomputing 1998: 321-328

Kenji Morimoto, Takashi Matsumoto, Kei Hiraki: Implementing MPI with the Memory-Based Communication Facilities on the SSS-CORE Operating System. PVM/MPI 1998: 223-230

Hironori Nakajo, Satoshi Ohtani, Takashi Matsumoto, Masadi Kohata, Kei Hiraki, Yukio Kaneda: An I/O Network Architecture of the Distributed Shared-Memory Massively Parallel Computer JUMP-1. International Conference on Supercomputing 1997: 253-260

Yojiro Nobukuni, Takashi Matsumoto, Kei Hiraki: Resource Management Methods for General Purpose Massively Parallel OS SSS-Core. ISHPC 1997: 255-266

Junpei Niwa, Tatsushi Inagaki, Takashi Matsumoto, Kei Hiraki: Efficient Implementation of Software Release Consistency on Asymmetric Distributed Shared Memory. ISPAN 1997: 198-201

Takashi Matsumoto, Tomohiro Kudoh, Katsunobu Nishimura, Kei Hiraki, Hidehiko Tanaka: Distributed Shared Memory Architecture for JUMP-1: A General-Purpose MPP Prototype. ISPAN 1996: 131-137

Tomohiro Kudoh, Hideharu Amano, Takashi Matsumoto, Kei Hiraki, Yulu Yang, Katsunobu Nishimura, Koichi Yoshimura, Yasuhito Fukushima: Hierarchical Bit-Map Directory Schemes on the RDT Interconnection Network for a Massively Parallel Processor JUMP-1. ICPP (1) 1995: 186-193

Hironori Nakajo, Takashi Matsumoto, Masaki Kohata, Hideo Matsuda, Kei Hiraki, Yukio Kaneda: High Performance I/O System of the Distributed Shared-Memory Massively Parallel Computer JUMP-1. Parallel and Distributed Computing and Systems 1995: 470-473

Satoshi Sekiguchi, Kei Hiraki: Automatic Reduction Tree Generation for Fine-Grain Parallel Architectures when Iteration Count is Unknown. LCPC 1994: 487-496

Kei Hiraki, Toshio Shimada, Satoshi Sekiguchi: Empirical Study of Latency Hiding on a Fine-Grain Parallel Processor. International Conference on Supercomputing 1993: 220-229

Takashi Matsumoto, Kei Hiraki: Dynamic Switching of Coherent Cache Protocols and its Effects on Doacross Loops. International Conference on Supercomputing 1993: 328-337

Satoshi Sekiguchi, Toshio Shimada, Kei Hiraki: Sequential description and parallel execution language DFCII dataflow supercomputers. ICS 1991: 57-66

Toshitsugu Yuba, Toshio Shimada, Yoshinori Yamaguchi, Kei Hiraki, Shuichi Sakai: Dataflow computer development in Japan. ICS 1990: 140-147

Yoshinori Yamaguchi, Shuichi Sakai, Kei Hiraki, Yuetsu Kodama: An Architectural Disgn of a Highly Parallel Dataflow Machine. IFIP Congress 1989: 1155-1160

Shuichi Sakai, Yoshinori Yamaguchi, Kei Hiraki, Yuetsu Kodama, Toshitsugu Yuba: An Architecture of a Dataflow Single Chip Processor. ISCA 1989: 46-53

Kei Hiraki, Satoshi Sekiguchi, Toshio Shimada: Efficient vector processing on dataflow supercomputer SIGMA-1. SC 1988: 374-381

Kei Hiraki, Kenji Nishida, Satoshi Sekiguchi, Toshio Shimada: Maintenance Architecture and Its LSI Implementation of a Dataflow Computer with a Large Number of Processors. ICPP 1986: 584-591

Toshio Shimada, Kei Hiraki, Kenji Nishida, Satoshi Sekiguchi: Evaluation of a Prototype Data Flow Processor of the SIGMA-1 for Scientific Computations. ISCA 1986: 226-234

Kei Hiraki, Kenji Nishida, Toshio Shimada: Evaluation of Associative Memory Using Parallel Chained Hashing. IEEE Trans. Computers 33(9): 851-855 (1984)

Toshio Shimada, Kei Hiraki, Kenji Nishida: An Architecture of a Data Flow Machine and Its Evaluation. COMPCON 1984: 486-490

Eiichi Goto, T. Soma, N. Inada, Tetsuo Ida, M. Idesawa, Kei Hiraki, M. Suzuki, Kentaro Shimizu, B. Philipov: Design of a Lisp Machine - FLATS. Symposium on LISP and Functional Programming 1982: 208-215

Eiichi Goto, Tetsuo Ida, Kei Hiraki: FLATS, a Machine for Numerical, Symbolic and Associative Computing. ISCA 1979: 102-110