Ernst Haselsteiner Coauthor index pubzone.org

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DBLP keys2011
c5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Johannes Loinig, Christian Steger, Reinhold Weiss, Ernst Haselsteiner: Idea: Simulation Based Security Requirement Verification for Transaction Level Models. ESSoS 2011: 264-271
2010
c4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Johannes Loinig, Christian Steger, Reinhold Weiss, Ernst Haselsteiner: Fast simulation based testing of anti-tearing mechanisms for small embedded systems. European Test Symposium 2010: 242
c3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Johannes Loinig, Christian Steger, Reinhold Weiss, Ernst Haselsteiner: Towards formal system-level verification of security requirements during hardware/software codesign. SoCC 2010: 388-391
c2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Johannes Loinig, Christian Steger, Reinhold Weiss, Ernst Haselsteiner: Identification and Verification of Security Relevant Functions in Embedded Systems Based on Source Code Annotations and Assertions. WISTP 2010: 316-323
2009
c1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Johannes Loinig, Christian Steger, Reinhold Weiss, Ernst Haselsteiner: Java Card Performance Optimization of Secure Transaction Atomicity Based on Increasing the Class Field Locality. SSIRI 2009: 342-347

Coauthor Index

1Johannes Loinig
[c5] [c4] [c3] [c2] [c1]
2Christian Steger
[c5] [c4] [c3] [c2] [c1]
3Reinhold Weiss (Reinhold Weiß)
[c5] [c4] [c3] [c2] [c1]
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