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Olesya Guz
2010 – today
- 2011
[c5]Vladimir Hahanov, Dong-Won Park, Olesya Guz, Aleksey Priymak: Verification and diagnosis of SoC HDL-code. EWDTS 2011: 72-83
[i2]Vladimir Hahanov, Eugenia Litvinova, Wajeb Gharibi, Olesya Guz: Algebra-Logical Repair Method for FPGA Logic Blocks. CoRR abs/1105.1967 (2011)
[i1]Vladimir Hahanov, Wajeb Gharibi, Olesya Guz: Brain-like infrastructure for embedded SoC diagnosis. CoRR abs/1105.1973 (2011)- 2010
[c4]Vladimir Hahanov, Eugenia Litvinova, Wajeb Gharibi, Olesya Guz: Coverage method for FPGA fault logic blocks by spares. EWDTS 2010: 51-56
[c3]Vladimir Hahanov, Olesya Guz, Ngene Christopher Umerah, Vitaliy Olchovoy: Process models for analyzing associative data structures. EWDTS 2010: 123-127
2000 – 2009
- 2008
[c2]Vladimir Hahanov, Olesya Guz, Natalya Kulbakova, Maxim Davydov: Vector-logical diagnosis method for SOC functionalities. EWDTS 2008: 159-162- 2005
[c1]Stanley Hyduke, Vladimir Hahanov, Volodymyr Obrizan, Olesya Guz: PRUS - Processor Network for Digital Circuit Implementation. DSD 2005: 239-242
Coauthor Index
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last updated on 2012-09-10 15:52 CEST by the dblp team



