Kees G. W. Goossens

Muhammad Aqeel Wahlah, Kees Goossens: TeMNOT: A test methodology for the non-intrusive online testing of FPGA with hardwired network on chip. Microprocessors and Microsystems - Embedded Hardware Design 37(2): 129-146 (2013)

Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens: System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs. DATE 2013: 236-241

Sven Goossens, Benny Akesson, Kees Goossens: Conservative open-page policy for mixed time-criticality memory controllers. DATE 2013: 525-530

Manil Dev Gomony, Benny Akesson, Kees Goossens: Architecture and optimal configuration of a real-time multi-channel memory controller. DATE 2013: 1307-1312

Pengcheng Huang, Orlando Moreira, Kees Goossens, Anca Mariana Molnos: Throughput-constrained voltage and frequency scaling for real-time heterogeneous multiprocessors. SAC 2013: 1517-1524

Jae Young Hur, Todor Stefanov, Stephan Wong, Kees Goossens: Customisation of on-chip network interconnects and experiments in field-programmable gate arrays. IET Computers & Digital Techniques 6(1): 59-68 (2012)

Jae Young Hur, Kees Goossens, Lotfi Mhamdi, Muhammad Aqeel Wahlah: Comparative analysis of soft and hard on-chip interconnects for field-programmable gate arrays. IET Computers & Digital Techniques 6(6): 396-405 (2012)

Max Ferger, Muhammed Al Kadi, Michael Hübner, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Gabriel Marchesan Almeida, José Rodrigo Azambuja, Jürgen Becker: Hardware / Software Virtualization for the Reconfigurable Multicore Platform. CSE 2012: 341-344

Karthik Chandrasekar, Benny Akesson, Kees Goossens: Run-time power-down strategies for real-time SDRAM memory controllers. DAC 2012: 988-993

Manil Dev Gomony, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens: DRAM selection and configuration for real-time mobile systems. DATE 2012: 51-56

Sven Goossens, Tim Kouters, Benny Akesson, Kees Goossens: Memory-map selection for firm real-time SDRAM controllers. DATE 2012: 828-831

Radu Stefan, Anca Mariana Molnos, Jude Angelo Ambrose, Kees Goossens: A TDM NoC supporting QoS, multicast, and fast connection set-up. DATE 2012: 1283-1288

Cor Meenderinck, Anca Mariana Molnos, Kees Goossens: Composable Virtual Memory for an Embedded SoC. DSD 2012: 766-773

Gervin Thomas, Karthik Chandrasekar, Benny Akesson, Ben H. H. Juurlink, Kees Goossens: A Predictor-Based Power-Saving Policy for DRAM Memories. DSD 2012: 882-889

Andrew Nelson, Benny Akesson, Anca Mariana Molnos, Sjoerd te Pas, Kees Goossens: Power versus quality trade-offs for adaptive real-time applications. ESTImedia 2012: 75-84

Arnaldo Azevedo, Bart Vermeulen, Kees Goossens: Architecture and design flow for a debug event distribution interconnect. ICCD 2012: 439-444

Davit Mirzoyan, Benny Akesson, Kees Goossens: Process-variation aware mapping of real-time streaming applications to MPSoCs for improved yield. ISQED 2012: 41-48

Turhan Karadeniz, Lotfi Mhamdi, Kees Goossens, J. J. Garcia-Luna-Aceves: Hardware design and implementation of a Network-on-Chip based load balancing switch fabric. ReConFig 2012: 1-7

Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hübner, Jürgen Becker, Sébastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire: Towards future adaptive multiprocessor systems-on-chip: An innovative approach for flexible architectures. ICSAMOS 2012: 228-235

Kees Goossens, Radu Marculescu: Special Issue on Networks-on-Chips: Design Flows and Case Studies. Design Autom. for Emb. Sys. 15(2): 87-88 (2011)

Andreas Hansson, Kees Goossens: A quantitative evaluation of a Network on Chip design flow for multi-core consumer multimedia applications. Design Autom. for Emb. Sys. 15(2): 159-190 (2011)

Bart Vermeulen, Kees Goossens: Interactive Debug of SoCs with Multiple Clocks. IEEE Design & Test of Computers 28(3): 44-51 (2011)

Radu Stefan, Kees Goossens: A TDM slot allocation flow based on multipath routing in NoCs. Microprocessors and Microsystems - Embedded Hardware Design 35(2): 130-138 (2011)

Andreas Hansson, Marcus Ekerhult, Anca Mariana Molnos, Aleksandar Milutinovic, Andrew Nelson, Jude Angelo Ambrose, Kees Goossens: Design and implementation of an operating system for composable processor sharing. Microprocessors and Microsystems - Embedded Hardware Design 35(2): 246-260 (2011)

Jude Angelo Ambrose, Anca Mariana Molnos, Andrew Nelson, Sorin Cotofana, Kees Goossens, Ben H. H. Juurlink: Composable local memory organisation for streaming applications on embedded MPSoCs. Conf. Computing Frontiers 2011: 23

Benny Akesson, Po-Chun Huang, Fabien Clermidy, Denis Dutoit, Kees Goossens, Yuan-Hao Chang, Tei-Wei Kuo, Pascal Vivet, Drew Wingard: Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends. CODES+ISSS 2011: 3-12

A. Beyranvand Nejad, M. Escudero Martinez, Kees Goossens: An FPGA bridge preserving traffic quality of service for on-chip network-based systems. DATE 2011: 425-430

Benny Akesson, Kees Goossens: Architectures and modeling of predictable memory controllers for improved system integration. DATE 2011: 851-856

Thijs Schenkelaars, Bart Vermeulen, Kees Goossens: Optimal scheduling of switched FlexRay networks. DATE 2011: 926-931

Muhammad Aqeel Wahlah, Kees Goossens: PUMA: Placement Unification with Mapping and Guaranteed Throughput Allocation on an FPGA Using a Hardwired NoC. DSD 2011: 88-96

Karthik Chandrasekar, Benny Akesson, Kees Goossens: Improved Power Modeling of DDR SDRAMs. DSD 2011: 99-108

Andrew Nelson, Orlando Moreira, Anca Mariana Molnos, Sander Stuijk, Ba Thang Nguyen, Kees Goossens: Power Minimisation for Real-Time Dataflow Applications. DSD 2011: 117-124

Muhammad Aqeel Wahlah, Kees Goossens: A Non-Intrusive Online FPGA Test Scheme Using a Hardwired Network on Chip. DSD 2011: 351-359

Ashkan Beyranvand Nejad, Anca Mariana Molnos, Kees G. W. Goossens: A Unified Execution Model for Data-Driven Applications on a Composable MPSoC. DSD 2011: 818-822

Saddek Bensalem, Kees Goossens, Christoph M. Kirsch, Roman Obermaisser, Edward A. Lee, Joseph Sifakis: Time-predictable and composable architectures for dependable embedded systems. EMSOFT 2011: 351-352

Benny Akesson, Williston Hayes Jr., Kees Goossens: Automatic Generation of Efficient Predictable Memory Patterns. RTCSA (1) 2011: 177-184

Firew Siyoum, Benny Akesson, Sander Stuijk, Kees Goossens, Henk Corporaal: Resource-Efficient Real-Time Scheduling Using Credit-Controlled Static-Priority Arbitration. RTCSA (1) 2011: 309-318

Andrew Nelson, Anca Mariana Molnos, Kees Goossens: Composable power management with energy and power budgets per application. ICSAMOS 2011: 396-403

Benny Akesson, Anca Mariana Molnos, Andreas Hansson, Jude Angelo Ambrose, Kees Goossens: Composability and Predictability for Independent Application Development, Verification, and Execution. Multiprocessor System-on-Chip 2011: 25-56

Ardy van den Berg, Pengwei Ren, Erik Jan Marinissen, Georgi Gaydadjiev, Kees Goossens: Bandwidth Analysis of Functional Interconnects Used as Test Access Mechanism. J. Electronic Testing 26(4): 453-464 (2010)

Lotfi Mhamdi, Kees Goossens, Iria Varela Senin: Buffered Crossbar Fabrics Based on Networks on Chip. CNSR 2010: 74-79

Kees Goossens, Andreas Hansson: The aethereal network on chip after ten years: goals, evolution, lessons, and future. DAC 2010: 306-311

Kees G. W. Goossens, Dongrui She, Aleksandar Milutinovic, Anca Mariana Molnos: Composable Dynamic Voltage and Frequency Scaling and Power Management for Dataflow Applications. DSD 2010: 107-114

Andrew Nelson, Andreas Hansson, Henk Corporaal, Kees G. W. Goossens: Conservative application-level performance analysis through simulation of MPSoCs. ESTImedia 2010: 51-60

Erik Larsson, Bart Vermeulen, Kees Goossens: A distributed architecture to check global properties for post-silicon debug. European Test Symposium 2010: 182-187

Bart Vermeulen, Kees Goossens: Obtaining consistent global state dumps to interactively debug systems on chip with multiple clocks. HLDVT 2010: 1-8

Benny Akesson, Williston Hayes Jr., Kees Goossens: Classification and Analysis of Predictable Memory Patterns. RTCSA 2010: 367-376

Radu Stefan, Jason de Windt, Kees G. W. Goossens: On-chip network interfaces supporting automatic burst write creation, posted writes and read prefetch. ICSAMOS 2010: 185-192

Davide Bertozzi, Kees Goossens: Networks on chips [editorial]. IET Computers & Digital Techniques 3(5): 395-397 (2009)

Andreas Hansson, Maarten Wiggers, Arno Moonen, Kees Goossens, Marco Bekooij: Enabling application-level performance guarantees in network-based systems on chip by applying dataflow analysis. IET Computers & Digital Techniques 3(5): 398-412 (2009)

Andreas Hansson, Kees Goossens, Marco Bekooij, Jos Huisken: CoMPSoC: A template for composable and predictable multi-processor system on chips. ACM Trans. Design Autom. Electr. Syst. 14(1) (2009)

Andreas Hansson, Kees Goossens: An on-chip interconnect and protocol stack for multiple communication paradigms and programming models. CODES+ISSS 2009: 99-108

Kees Goossens, Bart Vermeulen, Ashkan Beyranvand Nejad: A high-level debug environment for communication-centric debug. DATE 2009: 202-207

Andreas Hansson, Mahesh Subburaman, Kees Goossens: Aelite: A flit-synchronous Network on Chip with composable and predictable services. DATE 2009: 250-255

Kees Goossens, Lotfi Mhamdi, Iria Varela Senin: Internet-Router Buffered Crossbars Based on Networks on Chip. DSD 2009: 365-374

Anca Mariana Molnos, Kees Goossens: Conservative Dynamic Energy Management for Real-Time Dataflow Applications Mapped on Multiple Processors. DSD 2009: 409-418

Benny Akesson, Andreas Hansson, Kees Goossens: Composable Resource Sharing Based on Latency-Rate Servers. DSD 2009: 547-555

Iria Varela Senin, Lotfi Mhamdi, Kees Goossens: Efficient Multicast Support in Buffered Crossbars using Networks on Chip. GLOBECOM 2009: 1-7

Muhammad Aqeel Wahlah, Kees G. W. Goossens: Modeling reconfiguration in a FPGA with a hardwired network on chip. IPDPS 2009: 1-8

Muhammad Aqeel Wahlah, Kees G. W. Goossens: Composable and Persistent-State Application Swapping on FPGAs Using Hardwired Network on Chip. ReConFig 2009: 380-385

Benny Akesson, Liesbeth Steffens, Kees Goossens: Efficient Service Allocation in Hardware Using Credit-Controlled Static-Priority Arbitration. RTCSA 2009: 59-68

Calin Ciordas, Andreas Hansson, Kees Goossens, Twan Basten: A monitoring-aware network-on-chip design flow. Journal of Systems Architecture - Embedded Systems Design 54(3-4): 397-410 (2008)

Miron Abramovici, Kees Goossens, Bart Vermeulen, Jack Greenbaum, Neal Stollon, Adam Donlin: You can catch more bugs with transaction level honey. CODES+ISSS 2008: 121-124

Ardy van den Berg, Pengwei Ren, Erik Jan Marinissen, Georgi Gaydadjiev, Kees Goossens: Bandwidth Analysis for Reusing Functional Interconnect as Test Access Mechanism. European Test Symposium 2008: 21-26

Bart Vermeulen, Kees Goossens, Siddharth Umrani: Debugging Distributed-Shared-Memory Communication at Multiple Granularities in Networks on Chip. NOCS 2008: 3-12

Kees Goossens, Martijn T. Bennebroek, Jae Young Hur, Muhammad Aqeel Wahlah: Hardwired Networks on Chip in FPGAs to Unify Functional and Con?guration Interconnects. NOCS 2008: 45-54

Andreas Hansson, Maarten Wiggers, Arno Moonen, Kees Goossens, Marco Bekooij: Applying Dataflow Analysis to Dimension Buffers for Guaranteed Performance in Networks on Chip. NOCS 2008: 211-212

Benny Akesson, Liesbeth Steffens, Eelke Strooisma, Kees G. W. Goossens: Real-Time Scheduling Using Credit-Controlled Static-Priority Arbitration. RTCSA 2008: 3-14

Alexandre M. Amory, Kees Goossens, Erik Jan Marinissen, Marcelo Lubaszewski, Fernando Moraes: Wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanism. IET Computers & Digital Techniques 1(3): 197-206 (2007)

Andreas Hansson, Kees Goossens, Andrei Radulescu: Avoiding Message-Dependent Deadlock in Network-Based Systems on Chip. VLSI Design 2007 (2007)

Andreas Hansson, Kees Goossens, Andrei Radulescu: A Unified Approach to Mapping and Routing on a Network-on-Chip for Both Best-Effort and Guaranteed Service Traffic. VLSI Design 2007 (2007)

Andreas Hansson, Martijn Coenen, Kees Goossens: Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip. CODES+ISSS 2007: 149-154

Benny Akesson, Kees Goossens, Markus Ringhofer: Predator: a predictable SDRAM memory controller. CODES+ISSS 2007: 251-256

Jan Willem van den Brand, Calin Ciordas, Kees Goossens, Twan Basten: Congestion-controlled best-effort communication for networks-on-chip. DATE 2007: 948-953

Andreas Hansson, Martijn Coenen, Kees Goossens: Undisrupted quality-of-service during reconfiguration of multiple applications in networks on chip. DATE 2007: 954-959

Bart Vermeulen, Kees Goossens, Remco van Steeden, Martijn T. Bennebroek: Communication-Centric SoC Debug Using Transactions. European Test Symposium 2007: 69-76

Kees Goossens, Bart Vermeulen, Remco van Steeden, Martijn T. Bennebroek: Transaction-Based Communication-Centric Debug. NOCS 2007: 95-106

Andreas Hansson, Kees Goossens: Trade-offs in the Configuration of a Network on Chip for Multiple Use-Cases. NOCS 2007: 233-242

Srinivasan Murali, Martijn Coenen, Andrei Radulescu, Kees Goossens, Giovanni De Micheli: Mapping and configuration methods for multi-use-case networks on chips. ASP-DAC 2006: 146-151

Martijn Coenen, Srinivasan Murali, Andrei Radulescu, Kees Goossens, Giovanni De Micheli: A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control. CODES+ISSS 2006: 130-135

Srinivasan Murali, Martijn Coenen, Andrei Radulescu, Kees Goossens, Giovanni De Micheli: A methodology for mapping multiple use-cases onto networks on chips. DATE 2006: 118-123

Frits Steenhof, Harry Duque, Björn Nilsson, Kees Goossens, Rafael Peset Llopis: Networks on chips for high-end consumer-electronics TV system architectures. DATE Designers' Forum 2006: 148-153

Calin Ciordas, Andreas Hansson, Kees Goossens, Twan Basten: A Monitoring-Aware Network-on-Chip Design Flow. DSD 2006: 97-106

Alexandre M. Amory, Kees Goossens, Erik Jan Marinissen, Marcelo Lubaszewski, Fernando Moraes: Wrapper Design for the Reuse of Networks-on-Chip as Test Access Mechanism. European Test Symposium 2006: 213-218

Calin Ciordas, Kees Goossens, Andrei Radulescu, Twan Basten: NoC monitoring: impact on the design flow. ISCAS 2006

Chris Bartels, Jos Huisken, Kees Goossens, Patrick Groeneveld, Jef L. van Meerbergen: Comparison of An Æthereal Network on Chip and A Traditional Interconnect for A Multi-Processor DVB-T System on Chip. VLSI-SoC 2006: 80-85

Kees Goossens, John Dielissen, Andrei Radulescu: Æthereal Network on Chip: Concepts, Architectures, and Implementations. IEEE Design & Test of Computers 22(5): 414-421 (2005)

Andrei Radulescu, John Dielissen, Santiago González Pestana, Om Prakash Gangwal, Edwin Rijpkema, Paul Wielage, Kees G. W. Goossens: An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration. IEEE Trans. on CAD of Integrated Circuits and Systems 24(1): 4-17 (2005)

Calin Ciordas, Twan Basten, Andrei Radulescu, Kees Goossens, Jef L. van Meerbergen: An event-based monitoring service for networks on chip. ACM Trans. Design Autom. Electr. Syst. 10(4): 702-723 (2005)

Kees Goossens: Formal Methods for Networks on Chips. ACSD 2005: 188-189

Biniam Gebremichael, Frits W. Vaandrager, Miaomiao Zhang, Kees Goossens, Edwin Rijpkema, Andrei Radulescu: Deadlock Prevention in the Æthereal Protocol. CHARME 2005: 345-348

Andreas Hansson, Kees Goossens, Andrei Radulescu: A unified approach to constrained mapping and routing on network-on-chip architectures. CODES+ISSS 2005: 75-80

Kees Goossens, John Dielissen, Om Prakash Gangwal, Santiago González Pestana, Andrei Radulescu, Edwin Rijpkema: A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification. DATE 2005: 1182-1187

Santiago González Pestana, Edwin Rijpkema, Andrei Radulescu, Kees G. W. Goossens, Om Prakash Gangwal: Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach. DATE 2004: 764-769

Andrei Radulescu, John Dielissen, Kees G. W. Goossens, Edwin Rijpkema, Paul Wielage: An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration. DATE 2004: 878-883

Calin Ciordas, Twan Basten, Andrei Radulescu, Kees Goossens, Jef L. van Meerbergen: An event-based network-on-chip monitoring service. HLDVT 2004: 149-154

Edwin Rijpkema, Kees G. W. Goossens, Andrei Radulescu, John Dielissen, Jef L. van Meerbergen, Paul Wielage, E. Waterlander: Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip. DATE 2003: 10350-10355

André Nieuwland, Jeffrey Kang, Om Prakash Gangwal, Ramanathan Sethuraman, Natalino G. Busá, Kees Goossens, Rafael Peset Llopis, Paul E. R. Lippens: C-HEAP: A Heterogeneous Multi-Processor Architecture Template and Scalable and Flexible Protocol for the Design of Embedded Signal Processing Systems. Design Autom. for Emb. Sys. 7(3): 233-270 (2002)

Kees G. W. Goossens, Om Prakash Gangwal: The Cost of Communication Protocols and Coordination Languages in Embedded Systems. COORDINATION 2002: 174-190

Kees G. W. Goossens, Paul Wielage, Ad M. G. Peeters, Jef L. van Meerbergen: Networks on Silicon: Combining Best-Effort and Guaranteed Services. DATE 2002: 423-425

Paul Wielage, Kees G. W. Goossens: Networks on Silicon: Blessing or Nightmare? DSD 2002: 196-200

Kees G. W. Goossens: A protocol and memory manager for on-chip communication. ISCAS (2) 2001: 225-228

Rafael Peset Llopis, Kees G. W. Goossens: The petrol approach to high-level power estimation. ISLPED 1998: 130-132

Kees G. W. Goossens: Reasoning about VHDL using operational and observational semantics. CHARME 1995: 311-327

Kees G. W. Goossens: Stucture and Behaviour in Hardware Verification. HUG 1993: 75-88

Kees G. W. Goossens: Operational Semantics Based on Formal Symbolic Simulation. TPHOLs 1992: 487-506