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Joachim Gerlach
2010 – today
- 2013
[c28]Stefan Müller, Yumin Zhou, Axel G. Braun, Joachim Gerlach, Wolfgang Rosenstiel: Ein template-basierter Ansatz zur automatisierten Generierung von SystemC-Modellen aus IP-XACT-Beschreibungen. MBMV 2013: 209-218- 2011
[c27]Axel G. Braun, Joachim Gerlach, Wolfgang Rosenstiel: SystemC-based Performance Optimization in Embedded System Design: A Synthetic-Aperture-Radar (SAR) Case Study. MBMV 2011: 101-109- 2010
[c26]Matthias Müller, Axel G. Braun, Joachim Gerlach, Wolfgang Rosenstiel, Dennis Nienhüser, Johann Marius Zöllner, Oliver Bringmann: Design of an automotive traffic sign recognition system targeting a multi-core SoC implementation. DATE 2010: 532-537
[c25]Matthias Müller, Joachim Gerlach, Wolfgang Rosenstiel: RTOS-aware modeling of embedded hardware/software systems. ICCD 2010: 179-186
2000 – 2009
- 2009
[c24]Jan-Hendrik Oetjens, Ralph Görgen, Joachim Gerlach, Wolfgang Nebel: An automated flow for integrating hardware IP into the automotive systems engineering process. DATE 2009: 1196-1201
[c23]Djones Lettnin, Pradeep Kumar Nalla, Jörg Behrend, Jürgen Ruf, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel, Volker Schönknecht, Stephan Reitemeyer: Semiformal verification of temporal properties in automotive hardware dependent software. DATE 2009: 1214-1217- 2008
[c22]Jan B. Freuer, Göran Jerke, Joachim Gerlach, Wolfgang Nebel: On the Verification of High-Order Constraint Compliance in IC Design. DATE 2008: 26-31
[c21]Jochen Zimmermann, Oliver Bringmann, Joachim Gerlach, Florian Schaefer, Ulrich Nageldinger: Comprehensive Platform and Component Modeling of Heterogeneous Interconnected Systems (invited). FDL 2008: 227-232
[c20]Matthias Müller, Joachim Gerlach, Wolfgang Rosenstiel: Abstrakte Modellierung von Hardware/Software-Systemen unter Berücksichtigung von RTOS-Funktionalität. MBMV 2008: 21-30- 2007
[c19]Robert Lissel, Joachim Gerlach: Introducing new verification methods into a company's design flow: an industrial user's point of view. DATE 2007: 689-694
[c18]Djones Lettnin, Markus Winterholer, Axel G. Braun, Joachim Gerlach, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel: Coverage Driven Verification applied to Embedded Software. ISVLSI 2007: 159-164
[c17]Djones Lettnin, Pradeep Kumar Nalla, Jürgen Ruf, Roland J. Weiss, Axel G. Braun, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel: Semiformal Verification of Temporal Properties in Embedded Software. MBMV 2007: 19-28
[c16]Axel G. Braun, Joachim Gerlach, Wolfgang Rosenstiel: Eine SystemC-basierte Heuristik zur Performanzoptimierung datenflussorientierter Applikationen. MBMV 2007: 49-58- 2006
[c15]Jan-Hendrik Oetjens, Joachim Gerlach, Wolfgang Rosenstiel: Flexible specification and application of rule-based transformations in an automotive design flow. DATE Designers' Forum 2006: 82-87
[c14]Giovanna Ferrera, Anne-Marie Fouilliart, Joachim Gerlach: Industrial Partners Expectations from the ICODES Methodology. FDL 2006: 311-318- 2005
[c13]Axel G. Braun, Joachim Gerlach, Wolfgang Rosenstiel, Axel Siebenborn, Oliver Bringmann: SystemC-Based Communication and Performance Analysis. FDL 2005: 33-48- 2004
[c12]Djones Lettnin, Axel G. Braun, Martin Bogdan, Joachim Gerlach, Wolfgang Rosenstiel: Synthesis of Embedded SystemC Design: A Case Study of Digital Neural Networks. DATE 2004: 248-255
[c11]Thorsten Schubert, Jürgen Hanisch, Joachim Gerlach, Jens-E. Appell, Wolfgang Nebel: Evaluation of a Refinement-Driven SystemC'-Based Design Flow. DATE 2004: 262-267
[c10]Jan-Hendrik Oetjens, Joachim Gerlach, Wolfgang Rosenstiel: Ein XML-basierter Ansatz zur flexiblen Darstellung und Transformation von Schaltungsbeschreibungen. MBMV 2004: 116-125- 2003
[c9]Axel G. Braun, Thorsten Schubert, Martin Stark, Karsten Haug, Joachim Gerlach, Wolfgang Rosenstiel: Case Study: SystemC-Based Design of an Industrial Exposure Control Unit1. FDL 2003: 627-636
[c8]Axel G. Braun, Jan B. Freuer, Joachim Gerlach, Wolfgang Rosenstiel: Automated Conversion of SystemC Fixed-Point Data Types for Hardware Synthesis. VLSI-SOC 2003: 55-- 2002
[c7]Axel G. Braun, Joachim Gerlach, Wolfgang Rosenstiel: Checking temporal properties in SystemC specifications. HLDVT 2002: 23-27- 2001
[c6]Jürgen Ruf, Dirk W. Hoffmann, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel, Wolfgang Müller: The simulation semantics of systemC. DATE 2001: 64-70- 2000
[c5]Joachim Gerlach, Wolfgang Rosenstiel: A Methodology and Tool for Automated Transformational High-Level Design Space Exploration. ICCD 2000: 545-548
1990 – 1999
- 1999
[c4]Joachim Gerlach, Thilo Klöpfer, Wolfgang Rosenstiel: Algorithmischer Ansatz zur automatisierten Entwurfsraum-Exploration auf hoher Abstraktionsebene. MBMV 1999: 111-120- 1998
[c3]Joachim Gerlach, Wolfgang Rosenstiel: A Scalable Methodology for Cost Estimation in a Transformational High-Level Design Space Exploration Environment. DATE 1998: 226-231
[c2]Joachim Gerlach, Wolfgang Rosenstiel: Eine Umgebung zur transformationalen Entwurfsraum-Exploration. MBMV 1998: 59-66- 1996
[c1]Heinz-Josef Eikerling, Wolfram Hardt, Joachim Gerlach, Wolfgang Rosenstiel: A Methodology for Rapid Analysis and Optimization of Embedded Systems. ECBS 1996: 252-259
Coauthor Index
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last updated on 2013-03-19 17:09 CET by the dblp team



