Please note: This is a beta version of the new dblp website.
You can find the classic dblp view of this page here.
You can find the classic dblp view of this page here.
Pierre-Emmanuel Gaillardon
2010 – today
- 2013
[c14]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli: MIXSyn: An efficient logic synthesis methodology for mixed XOR-AND/OR dominated circuits. ASP-DAC 2013: 133-138
[c13]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli: BDS-MAJ: a BDD-based logic synthesis tool exploiting majority logic decomposition. DAC 2013: 47
[c12]Pierre-Emmanuel Gaillardon, Michele De Marchi, Luca Gaetano Amarù, Shashikanth Bobba, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli: Towards structured ASICs using polarity-tunable Si nanowire transistors. DAC 2013: 123
[c11]Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Shashikanth Bobba, Michele De Marchi, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli: Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs. DATE 2013: 625-630
[c10]Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli: Biconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits. DATE 2013: 1014-1017- 2012
[j2]Perrine Batude, Thomas Ernst, Julien Arcamone, Gregory Arndt, Perceval Coudrain, Pierre-Emmanuel Gaillardon: 3-D Sequential Integration: A Key Enabling Technology for Heterogeneous Co-Integration of New Function With CMOS. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(4): 714-722 (2012)
[c9]Pierre-Emmanuel Gaillardon, Davide Sacchetto, Shashikanth Bobba, Yusuf Leblebici, Giovanni De Micheli: GMS: Generic memristive structure for non-volatile FPGAs. VLSI-SoC 2012: 94-98- 2011
[j1]Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor, Junchen Liu, Maimouna Amadou, Gabriela Nicolescu: Matrix Nanodevice-Based Logic Architectures and Associated Functional Mapping Method. JETC 7(1): 3 (2011)
[c8]Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Paul-Henry Morel, Jean-Philippe Noël, Fabien Clermidy, Ian O'Connor: Can we go towards true 3-D architectures? DAC 2011: 282-283
[c7]Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy, Ian O'Connor: Evaluation of a crossbar multiplexer in a lithography-based nanowire technology. ISCAS 2011: 2930-2933- 2010
[c6]Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Marina Reyboz, Giovanni Beneventi, Fabien Clermidy, Luca Perniola, Ian O'Connor: Phase-change-memory-based storage elements for configurable logic. FPT 2010: 17-20
[c5]Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Giovanni Betti Beneventi, Fabien Clermidy, Luca Perniola: Emerging memory technologies for reconfigurable routing in FPGA architecture. ICECS 2010: 62-65
[c4]Ian O'Connor, Kotb Jabeur, David Navarro, Nataliya Yakymets, Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy: Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics. ICECS 2010: 66-69
2000 – 2009
- 2009
[c3]Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor, Renaud Daviot: Reconfigurable nanoscale logic cells : a comparison study. ICECS 2009: 483-486
[c2]Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor, Junchen Liu, Renaud Daviot: Mapping method of reconfigurable cell matrices based on nanoscale devices using inter-stage fixed interconnection scheme. ICECS 2009: 888-891
[c1]Ian O'Connor, Junchen Liu, Kotb Jabeur, Nataliya Yakymets, Renaud Daviot, David Navarro, Pierre-Emmanuel Gaillardon, Fabien Clermidy, Maimouna Amadou, Gabriela Nicolescu: Emerging Technologies and Nanoscale Computing Fabrics. VLSI-SoC 2009: 1-20
Coauthor Index
data released under the ODC-BY 1.0 license. See also our legal information page
last updated on 2013-05-29 01:53 CEST by the dblp team



