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José A. B. Fortes
2010 – today
- 2013
[c109]Xin Fu, Tao Li, José A. B. Fortes: Reliable Express-Virtual-Channel-based network-on-chip under the impact of technology scaling. ISQED 2013: 719-726- 2012
[c108]Maurício O. Tsugawa, Renato J. O. Figueiredo, José A. B. Fortes, Takahiro Hirofuchi, Hidemoto Nakada, Ryousei Takano: On the use of virtualization technologies to support uninterrupted IT services: A case study with lessons learned from the Great East Japan Earthquake. ICC 2012: 6324-6328
[c107]Selvi Kadirvel, José A. B. Fortes: Grey-Box Approach for Performance Prediction in Map-Reduce Based Platforms. ICCCN 2012: 1-9- 2011
[j43]Jie Han, Hao Chen, Erin Boykin, José A. B. Fortes: Reliability evaluation of logic circuits using probabilistic gate models. Microelectronics Reliability 51(2): 468-476 (2011)
[c106]
[c105]
[c104]Selvi Kadirvel, José A. B. Fortes: Towards self-caring mapreduce: Proactively reducing fault-induced execution-time penalties. HPCS 2011: 63-71
[c103]Prapaporn Rattanatamrong, José A. B. Fortes: Improved real-time scheduling for periodic tasks on multiprocessors. HPCS 2011: 81-89
[c102]Lixi Wang, Jing Xu, Ming Zhao, Yicheng Tu, José A. B. Fortes: Fuzzy Modeling Based Resource Management for Virtualized Database Systems. MASCOTS 2011: 32-42
[c101]Prapaporn Rattanatamrong, José A. B. Fortes: Mode Transition for Online Scheduling of Adaptive Real-Time Systems on Multiprocessors. RTCSA (1) 2011: 25-32- 2010
[j42]Pierre Riteau, Maurício O. Tsugawa, Andréa M. Matsunaga, José A. B. Fortes, Kate Keahey: Large-Scale Cloud Computing Research: Sky Computing on FutureGrid and Grid'5000. ERCIM News 2010(83): 41-42 (2010)
[j41]Maurício O. Tsugawa, José A. B. Fortes: Characterizing user-level network virtualization: performance, overheads and limits. Int. Journal of Network Management 20(3): 149-166 (2010)
[c100]
[c99]Andréa M. Matsunaga, José A. B. Fortes: On the Use of Machine Learning to Predict the Time and Resources Consumed by Applications. CCGRID 2010: 495-504
[c98]Selvi Kadirvel, José A. B. Fortes: Self-Caring IT Systems: A Proof-of-Concept Implementation in Virtualized Environments. CloudCom 2010: 433-440
[c97]Prapaporn Rattanatamrong, Andréa M. Matsunaga, José A. B. Fortes: BMI CyberWorkstation: A cyberinfrastructure for collaborative experimental research on Brain-Machine Interfaces. CollaborateCom 2010: 1-10
[c96]
[c95]Andréa M. Matsunaga, Pierre Riteau, Maurício O. Tsugawa, José A. B. Fortes: Crosscloud Computing. High Performance Computing Workshop 2010: 94-108
[c94]Prapaporn Rattanatamrong, José A. B. Fortes: Real-time scheduling of mixture-of-experts systems with limited resources. HSCC 2010: 71-80
[c93]Selvi Kadirvel, José A. B. Fortes: Towards IT Systems Capable of Managing Their Health. Monterey Workshop 2010: 77-102
2000 – 2009
- 2009
[j40]Katarzyna Keahey, Maurício O. Tsugawa, Andréa M. Matsunaga, José A. B. Fortes: Sky Computing. IEEE Internet Computing 13(5): 43-51 (2009)
[j39]Jack DiGiovanna, Babak Mahmoudi, José A. B. Fortes, Jose C. Principe, Justin C. Sanchez: Coadaptive Brain-Machine Interface via Reinforcement Learning. IEEE Trans. Biomed. Engineering 56(1): 54-64 (2009)
[c92]Maurício O. Tsugawa, Andréa M. Matsunaga, José A. B. Fortes: User-Level Virtual Network Support for Sky Computing. eScience 2009: 72-79
[c91]Justin C. Sanchez, Renato J. O. Figueiredo, José A. B. Fortes, José Carlos Príncipe: Development of Symbiotic Brain-Machine Interfaces Using a Neurophysiology Cyberworkstation. HCI (2) 2009: 606-615
[c90]
[c89]- 2008
[j38]Jing Xu, Ming Zhao, José A. B. Fortes, Robert Carpenter, Mazin S. Yousif: Autonomic resource management in virtualized data centers using fuzzy logic-based approaches. Cluster Computing 11(3): 213-227 (2008)
[c88]Renato J. O. Figueiredo, P. Oscar Boykin, José A. B. Fortes, Tao Li, Jie-Kwon Peir, David Wolinsky, Lizy K. John, David R. Kaeli, David J. Lilja, Sally A. McKee, Gokhan Memik, Alain Roy, Gary S. Tyson: Archer: A Community Distributed Computing Infrastructure for Computer Architecture Research and Education. CollaborateCom 2008: 70-84
[c87]
[c86]Maurício O. Tsugawa, José A. B. Fortes: Characterizing User-Level Network Virtualization: Performance, Overheads and Limits. eScience 2008: 206-213
[c85]Andréa M. Matsunaga, Maurício O. Tsugawa, José A. B. Fortes: CloudBLAST: Combining MapReduce and Virtualization on Distributed Resources for Bioinformatics Applications. eScience 2008: 222-229
[c84]Xin Fu, Wangyuan Zhang, Tao Li, José A. B. Fortes: Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures. ICPP 2008: 190-197
[c83]Xin Fu, Tao Li, José A. B. Fortes: NBTI tolerant microarchitecture design in the presence of process variation. MICRO 2008: 399-410
[c82]Xin Fu, Tao Li, José A. B. Fortes: ORBIT: Effective Issue Queue Soft-Error Vulnerability Mitigation on Simultaneous Multithreaded Architectures Using Operand Readiness-Based Instruction Dispatch. SBAC-PAD 2008: 71-78
[e2]John Strassner, Simon A. Dobson, José A. B. Fortes, Kumar K. Goswami (Eds.): 2008 International Conference on Autonomic Computing, ICAC 2008, June 2-6, 2008, Chicago, Illinois, USA. IEEE Computer Society 2008, ISBN 978-0-7695-3175-5
[i1]Renato J. O. Figueiredo, P. Oscar Boykin, José A. B. Fortes, Tao Li, Jie-Kwon Peir, David Wolinsky, Lizy Kurian John, David R. Kaeli, David J. Lilja, Sally A. McKee, Gokhan Memik, Alain Roy, Gary S. Tyson: Archer: A Community Distributed Computing Infrastructure for Computer Architecture Research and Education. CoRR abs/0807.1765 (2008)- 2007
[j37]Andréa M. Matsunaga, Maurício O. Tsugawa, Sumalatha Adabala, Renato J. O. Figueiredo, Herman Lam, José A. B. Fortes: Science gateways made easy: the In-VIGO approach. Concurrency and Computation: Practice and Experience 19(6): 905-919 (2007)
[c81]Andréa M. Matsunaga, Maurício O. Tsugawa, José A. B. Fortes: Integration of text-based applications into service-oriented architectures for transnational digital government. DG.O 2007: 112-121
[c80]Jing Xu, Ming Zhao, José A. B. Fortes, Robert Carpenter, Mazin S. Yousif: On the Use of Fuzzy Modeling in Virtualized Data Center Management. ICAC 2007: 25
[c79]Jack DiGiovanna, Loris Marchal, Prapaporn Rattanatamrong, Ming Zhao, Shalom Darmanjian, Babak Mahmoudi, Justin C. Sanchez, José C. Príncipe, Linda Hermer-Vazquez, Renato J. O. Figueiredo, José A. B. Fortes: Towards Real-Time Distributed Signal Modeling for Brain-Machine Interfaces. International Conference on Computational Science (1) 2007: 964-971
[c78]Wangyuan Zhang, Xin Fu, Tao Li, José A. B. Fortes: An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures. ISPASS 2007: 169-178- 2006
[c77]Maurício O. Tsugawa, Andréa M. Matsunaga, José A. B. Fortes: Virtualization technologies in transnational DG. DG.O 2006: 456-457
[c76]José A. B. Fortes, Renato J. O. Figueiredo, Linda Hermer-Vazquez, José Carlos Príncipe, Justin C. Sanchez: A New Architecture for Deriving Dynamic Brain-Machine Interfaces. International Conference on Computational Science (3) 2006: 546-553
[c75]José A. B. Fortes: HCW panel: programming heterogeneous systems - Less pain! Better performance! IPDPS 2006
[c74]Maurício O. Tsugawa, José A. B. Fortes: A virtual network (ViNe) architecture for grid computing. IPDPS 2006
[c73]Xin Fu, James Poe, Tao Li, José A. B. Fortes: Characterizing Microarchitecture Soft Error Vulnerability Phase Behavior. MASCOTS 2006: 147-155
[e1]José A. B. Fortes, Ann Macintosh (Eds.): Proceedings of the 7th Annual International Conference on Digital Government Research, DG.O 2006, San Diego, California, USA, May 21-24, 2006. ACM International Conference Proceeding Series 151, Digital Government Research Center 2006- 2005
[j36]Renato J. O. Figueiredo, Peter A. Dinda, José A. B. Fortes: Guest Editors' Introduction: Resource Virtualization Renaissance. IEEE Computer 38(5): 28-31 (2005)
[j35]Jie Han, Jianbo Gao, Yan Qi, Pieter Jonker, José A. B. Fortes: Toward Hardware-Redundant, Fault-Tolerant Logic for Nanoelectronics. IEEE Design & Test of Computers 22(4): 328-339 (2005)
[j34]Sumalatha Adabala, Vineet Chadha, Puneet Chawla, Renato J. O. Figueiredo, José A. B. Fortes, Ivan Krsul, Andréa M. Matsunaga, Maurício O. Tsugawa, Jian Zhang, Ming Zhao, Liping Zhu, Xiaomin Zhu: From virtualized resources to virtual computing grids: the In-VIGO system. Future Generation Comp. Syst. 21(6): 896-909 (2005)
[j33]S. Su, José A. B. Fortes, T. R. Kasad, M. Patil, Andréa M. Matsunaga, Maurício O. Tsugawa, Violetta Cavalli-Sforza, Jaime G. Carbonell, Peter J. Jansen, Wayne Ward, Ronald A. Cole, Donald F. Towsley, Weifeng Chen, Annie I. Antón, Qingfeng He, C. McSweeney, L. deBrens, J. Ventura, P. Taveras, R. Connolly, C. Ortega, B. Piñeres, O. Brooks, G. A. Murillo, M. Herrera: Transnational Information Sharing, Event Notification, Rule Enforcement and Process Coordination. IJEGR 1(2): 1-26 (2005)
[c72]Jie Han, Erin Taylor, Jianbo Gao, José A. B. Fortes: Faults, Error Bounds and Reliability of Nanoelectronic Circuits. ASAP 2005: 247-253
[c71]
[c70]Andréa M. Matsunaga, Maurício O. Tsugawa, José A. B. Fortes: Virtual machines in transnational digital government: a case study. DG.O 2005: 255-256
[c69]Liping Zhu, Andréa M. Matsunaga, Vivekananthan Sanjeepan, Herman Lam, José A. B. Fortes: Application Modeling and Representation for Automatic Grid-Enabling of Legacy Applications. e-Science 2005: 24-31
[c68]Andréa M. Matsunaga, Maurício O. Tsugawa, Ming Zhao, Liping Zhu, Vivekananthan Sanjeepan, Sumalatha Adabala, Renato J. O. Figueiredo, Herman Lam, José A. B. Fortes: On the Use of Virtualization and Service Technologies to Enable Grid-Computing. Euro-Par 2005: 1-12
[c67]Maurício O. Tsugawa, Andréa M. Matsunaga, Liping Zhu, Vivekananthan Sanjeepan, Herman Lam, Renato J. O. Figueiredo, José A. B. Fortes: In-VIGO virtual networks and virtual application services: automated grid-enabling and deployment of applications. HPDC 2005: 312-313
[c66]Jing Xu, Sumalatha Adabala, José A. B. Fortes: Towards Autonomic Virtual Applications in the In-VIGO System. ICAC 2005: 15-26
[c65]Vivekananthan Sanjeepan, Andréa M. Matsunaga, Liping Zhu, Herman Lam, José A. B. Fortes: A Service-Oriented, Scalable Approach to Grid-Enabling of Legacy Scientific Applications. ICWS 2005: 553-560
[c64]Yue Li, Tao Li, Tamer Kahveci, José A. B. Fortes: Workload Characterization of Bioinformatics Applications. MASCOTS 2005: 15-22- 2004
[j32]Renato J. O. Figueiredo, Nirav H. Kapadia, José A. B. Fortes: Seamless Access to Decentralized Storage Services in Computational Grids via a Virtual File System. Cluster Computing 7(2): 113-122 (2004)
[c63]
[c62]S. Su, José A. B. Fortes, T. R. Kasad, M. Patil, Andréa M. Matsunaga, Maurício O. Tsugawa, Violetta Cavalli-Sforza, Jaime G. Carbonell, Peter J. Jansen, Wayne Ward, Ronald A. Cole, Donald F. Towsley, Weifeng Chen, Annie I. Antón, Qingfeng He, C. McSweeney, L. deBrens, J. Ventura, P. Taveras, R. Connolly, C. Ortega, B. Piñeres, O. Brooks, M. Herrera: A Prototype System for Transnational Information Sharing and Process Coordination. DG.O 2004
[c61]S. Su, José A. B. Fortes, T. R. Kasad, M. Patil, Andréa M. Matsunaga, Maurício O. Tsugawa, Violetta Cavalli-Sforza, Jaime G. Carbonell, Peter J. Jansen, Wayne Ward, Ronald A. Cole, Donald F. Towsley, Weifeng Chen, Annie I. Antón, Qingfeng He, C. McSweeney, L. deBrens, J. Ventura, P. Taveras, R. Connolly, C. Ortega, B. Piñeres, O. Brooks, M. Herrera: A Prototype System for Transnational Information Sharing and Process Coordination: System Demo. DG.O 2004
[c60]Wessam Hassanein, José A. B. Fortes, Rudolf Eigenmann: Data forwarding through in-memory precomputation threads. ICS 2004: 207-216
[c59]Sumalatha Adabala, Andréa M. Matsunaga, Maurício O. Tsugawa, Renato J. O. Figueiredo, José A. B. Fortes: Single Sign-On in In-VIGO: Role-Based Access via Delegation Mechanisms Using Short-Lived User Identities. IPDPS 2004
[c58]
[c57]Ivan Krsul, Arijit Ganguly, Jian Zhang, José A. B. Fortes, Renato J. O. Figueiredo: VMPlants: Providing and Managing Virtual Machine Execution Environments for Grid Computing. SC 2004: 7- 2003
[j31]Ali Raza Butt, Sumalatha Adabala, Nirav H. Kapadia, Renato J. O. Figueiredo, José A. B. Fortes: Grid-computing portals and security issues. J. Parallel Distrib. Comput. 63(10): 1006-1014 (2003)
[j30]Hyuk-Jae Lee, José A. B. Fortes: Generation of Injective and Reversible Modular Mappings. IEEE Trans. Parallel Distrib. Syst. 14(1): 1-12 (2003)
[c56]José A. B. Fortes: Case Study: Transnational Digital Government Research - Building Regional Partnerships. DG.O 2003
[c55]Rajesh Subramanyan, José Miguel-Alonso, José A. B. Fortes: A Reconfigurable Monitoring System for Large-Scale Network Computing. Euro-Par 2003: 98-108
[c54]Renato J. O. Figueiredo, Peter A. Dinda, José A. B. Fortes: A Case For Grid Computing On Virtual Machine. ICDCS 2003: 550-559
[c53]- 2002
[c52]
[c51]Sumalatha Adabala, José A. B. Fortes: An Online Heuristic for Data Placement in Computer Systems with Active Disks. ICPP 2002: 219-
[c50]Ali Raza Butt, Sumalatha Adabala, Nirav H. Kapadia, Renato J. O. Figueiredo, José A. B. Fortes: Fine-Grain Access Control for Securing Shared Resources in Computational Grids. IPDPS 2002- 2001
[j29]Jeffrey P. Bradford, José A. B. Fortes: Characterization and Parallelization of Decision-Tree Induction. J. Parallel Distrib. Comput. 61(3): 322-349 (2001)
[c49]Dolors Royo, Luis Díaz de Cerio, Nirav H. Kapadia, José A. B. Fortes: Active Yellow Pages: A Pipelined Resource Management Architecture for Wide-Area Network Computing. HPDC 2001: 147-157
[c48]Renato J. O. Figueiredo, Nirav H. Kapadia, José A. B. Fortes: The PUNCH Virtual File System: Seamless Access to Decentralized Storage Services in a Computational Grid. HPDC 2001: 334-
[c47]Renato J. O. Figueiredo, José A. B. Fortes: Hardware Support for Extracting Coarse-Grain Speculative Parallelism in Distributed Shared-Memory Multiprocesors. ICPP 2001: 214-226
[c46]Nirav H. Kapadia, Renato J. O. Figueiredo, José A. B. Fortes: Enhancing the Scalability and Usability of Computational Grids via Logical User Accounts and Virtual. IPDPS 2001: 82- 2000
[j28]Nirav H. Kapadia, Renato J. O. Figueiredo, José A. B. Fortes: PUNCH: Web Portal for Running Tools. IEEE Micro 20(3): 38-47 (2000)
[j27]Nirav H. Kapadia, José A. B. Fortes, Mark S. Lundstrom: The Purdue University network-computing hubs: running unmodified simulation tools via the WWW. ACM Trans. Model. Comput. Simul. 10(1): 39-57 (2000)
[c45]Renato J. O. Figueiredo, José A. B. Fortes: Impact of Heterogeneity on DSM Performance. HPCA 2000: 26-35
[c44]Sumalatha Adabala, Nirav H. Kapadia, José A. B. Fortes: Interfacing Wide-Area Network Computing and Cluster Management Software: Condor, DQS and PBS via PUNCH. HPDC 2000: 306-307
[c43]Insung Park, Nirav H. Kapadia, Renato J. O. Figueiredo, Rudolf Eigenmann, José A. B. Fortes: Towards an Integrated, Web-executable Parallel Programming Tool Environment. SC 2000: 9
[c42]Rajesh Subramanyan, José Miguel-Alonso, José A. B. Fortes: A Scalable SNMP-Based Distributed Monitoring System For Heterogeneous Network Computing. SC 2000: 14
[c41]Sumalatha Adabala, Nirav H. Kapadia, José A. B. Fortes: Performance and Interoperability Issues in Incorporating Cluster Management Systems Within a Wide-Area Network-Computing Environment. SC 2000: 17
[c40]Renato J. O. Figueiredo, Jeffrey P. Bradford, José A. B. Fortes: Improving the Performance of Heterogeneous DSMs via Multithreading. VECPAR 2000: 168-180
1990 – 1999
- 1999
[j26]Nirav H. Kapadia, José A. B. Fortes: PUNCH: An architecture for Web-enabled wide-area network-computing. Cluster Computing 2(2): 153-164 (1999)
[j25]Hasan Cam, José A. B. Fortes: Work-Efficient Routing Algorithms for Rearrangeable Symmetrical Networks. IEEE Trans. Parallel Distrib. Syst. 10(7): 733-741 (1999)
[c39]Nirav H. Kapadia, José A. B. Fortes, Carla E. Brodley: Predictive Application-Performance Modeling in a Computational Grid Environment. HPDC 1999
[c38]Nirav H. Kapadia, José A. B. Fortes, Mark S. Lundstrom: Statewide Enterprise Computing with the Purdue University Network-Computing Hubs. ICEIS 1999: 657-664
[c37]Thomas J. Downar, Rudolf Eigenmann, José A. B. Fortes: Issues and Approaches in Parallel Multi-Component and Multi-Physics Simulations. PDPTA 1999: 916-922- 1998
[j24]José Miguel-Alonso, Agustin Arruabarrena, Ramón Beivide, José A. B. Fortes: An evaluation of implementations of the CMB parallel simulation algorithm on distributed memory multicomputers. Journal of Systems Architecture 44(6-7): 519-545 (1998)
[j23]Hyuk-Jae Lee, José A. B. Fortes: Automatic Generation of Modular Time-Space Mappings and Data Alignments. VLSI Signal Processing 19(2): 195-208 (1998)
[c36]Zina Ben-Miled, José A. B. Fortes, Rudolf Eigenmann, Valerie E. Taylor: On the Implementation of Broadcast, Scatter and Gather in a Heterogeneous Architecture. HICSS (3) 1998: 216-225
[c35]Nirav H. Kapadia, José A. B. Fortes: On the Design of a Demand-Based Network-Computing System: The Purdue University Network-Computing Hub. HPDC 1998: 71-80
[c34]Nirav H. Kapadia, Carla E. Brodley, José A. B. Fortes, Mark S. Lundstrom: Resource-Usage Prediction for Demand-Based Network-Computing. SRDS 1998: 372-377
[c33]Renato J. O. Figueiredo, José A. B. Fortes, Zina Ben-Miled: Spatial Data Locality with Respect to Degree of Parallelism in Processor-and-Memory Hierarchies. VECPAR 1998: 396-410- 1997
[j22]Hyuk-Jae Lee, José A. B. Fortes: Communication-Minimal Partitioning and Data Alignment for Affine Nested Loops. Comput. J. 40(6): 302-310 (1997)
[j21]Hemal V. Shah, José A. B. Fortes: Efficient techniques for performing an irregular computation on distributed memory machines. Int. J. Systems Science 28(11): 1101-1113 (1997)
[j20]Hyuk-Jae Lee, José A. B. Fortes: Modular Mappings and Data Distribution Independent Computations. Parallel Processing Letters 7(2): 169-180 (1997)
[c32]Zina Ben-Miled, José A. B. Fortes, Rudolf Eigenmann, Valerie E. Taylor: Towards the Design of a Heterogeneous Hierarchical Machine: A Simulation Approach. Annual Simulation Symposium 1997: 126-136
[c31]Hemal V. Shah, José A. B. Fortes: Effects of Dynamic Task Distributions on the Performance of a Class of Irregular Computations. ICPP 1997: 242-
[c30]Hyuk-Jae Lee, José A. B. Fortes: Automatic generation of injective modular mappings. ICPP 1997: 417-
[c29]Hyuk-Jae Lee, James P. Robertson, José A. B. Fortes: Generalized Cannon's Algorithm for Parallel Matrix Multiplication. International Conference on Supercomputing 1997: 44-51
[c28]Meenakshi A. Kandaswamy, Valerie E. Taylor, Rudolf Eigenmann, José A. B. Fortes: Implicit Finite Element Applications: A Case for Matching the Number of Processors to the Dynamics of the Program Execution. PPSC 1997- 1996
[c27]
[c26]José Miguel-Alonso, Agustin Arruabarrena, Ramón Beivide, José A. B. Fortes: An Empirical Evaluation of Techniques for Parallel Discrete-Event Simulation of Interconnection Networks. PDP 1996: 219-226- 1995
[j19]Hasan Cam, José A. B. Fortes: A Fast VLSI-Efficient Self-Routing Permutation Network. IEEE Trans. Computers 44(3): 448-453 (1995)
[j18]Hasan Cam, José A. B. Fortes: Frames: A Simple Characterization of Permutations Realized by Frequently Used Networks. IEEE Trans. Computers 44(5): 695-697 (1995)
[c25]Hyuk-Jae Lee, José A. B. Fortes: Data Alignments for Modular Time-Space Mappings of BLAS-like Algorithms. ASAP 1995: 34-
[c24]Nirav H. Kapadia, José A. B. Fortes: Block-Row Sparse Matrix-Vector Multiplication on SIMD Machines. ICPP (3) 1995: 34-41
[c23]Hemal V. Shah, José A. B. Fortes: Relaxation and Hybrid Approaches to Gröbner Basis Computation on Distributed Memory Machines. ICPP (3) 1995: 68-75
[c22]Hyuk-Jae Lee, José A. B. Fortes: Conditions of Blocked BLAS-like Algorithms for Data Alignment and Communication Minimization. ICPP (3) 1995: 220-223
[c21]Hyuk-Jae Lee, José A. B. Fortes: Toward data distribution independent parallel matrix multiplication. IPPS 1995: 436-440- 1994
[j17]José A. B. Fortes, Benjamin W. Wah, Weijia Shang, Kumar N. Ganapathy: Algorithm-Specific Parallel Processing with Linear Processing Arrays. Advances in Computers 38: 197-245 (1994)
[j16]Weijia Shang, Matthew T. O'Keefe, José A. B. Fortes: On Loop Transformations for Generalized Cycle Shrinking. IEEE Trans. Parallel Distrib. Syst. 5(2): 193-204 (1994)
[j15]Zina Ben-Miled, Jerome J. Tiemann, Walter A. Helbig, José A. B. Fortes: On the design of inphase and quadrature filters for delay compensation. IEEE Transactions on Signal Processing 42(9): 2501-2503 (1994)
[c20]Josep Llosa, Mateo Valero, José A. B. Fortes, Eduard Ayguadé: Using Sacks to Organize Registers in VLIW Machines. CONPAR 1994: 628-639
[c19]Jordi Cortadella, José A. B. Fortes, Edward A. Lee: Design and Prototyping of Digital Signal Processing (DSP) Systems: Introduction. HICSS (1) 1994: 56-57
[c18]James B. Armstrong, Howard Jay Siegel, William E. Cohen, Min Tan, Henry G. Dietz, José A. B. Fortes: Dynamic Task Migration from SPMD to SIMD Virtual Machines. ICPP 1994: 160-169- 1993
[j14]José A. B. Fortes: Matching algorithms and architectures. Microprocessing and Microprogramming 38(1-5): 15 (1993)
[c17]Gene Saghi, Howard Jay Siegel, José A. B. Fortes: On the Practical Application of a Quantitative Model of System Reconfiguration Due to a Fault. ICPP 1993: 248-252- 1992
[j13]Weijia Shang, José A. B. Fortes: Independent Partitioning of Algorithms with Uniform Dependencies. IEEE Trans. Computers 41(2): 190-206 (1992)
[j12]Darwen Rau, José A. B. Fortes, Howard Jay Siegel: Destination Tag Routing Techniques Based on a State Model for the IADM Network. IEEE Trans. Computers 41(3): 274-285 (1992)
[j11]Noé Lopez-Benitez, José A. B. Fortes: Detailed Modeling and Reliability Analysis of Fault-Tolerant Processor Arrays. IEEE Trans. Computers 41(9): 1193-1200 (1992)
[j10]Matthew T. O'Keefe, José A. B. Fortes, Benjamin W. Wah: On the Relationship Between Two Systolic Array Design Mehodologies. IEEE Trans. Computers 41(12): 1589-1593 (1992)
[j9]Weijia Shang, José A. B. Fortes: On Time Mapping of Uniform Dependence Algorithms into Lower Dimensional Processor Arrays. IEEE Trans. Parallel Distrib. Syst. 3(3): 350-363 (1992)
[c16]Gene Saghi, Howard Jay Siegel, José A. B. Fortes: On the Viability of a Quantitative Model of System Reconfiguration Due to a Fault. ICPP (1) 1992: 233-242
[c15]Hasan Cam, José A. B. Fortes: Fault-Tolerant Self-Routing Permutation Networks. ICPP (1) 1992: 243-247
[c14]Zhenhui Yang, Weijia Shang, José A. B. Fortes: Conflict-Free Scheduling of Nested Loop Algorithms on Lower Dimensional Processor Arrays. IPPS 1992: 156-164- 1991
[j8]Weijia Shang, José A. B. Fortes: Time Optimal Linear Schedules for Algorithms with Uniform Dependencies. IEEE Trans. Computers 40(6): 723-742 (1991)
[c13]Weijia Shang, Matthew T. O'Keefe, José A. B. Fortes: Generalized cycle shrinking. Algorithms and Parallel VLSI Architectures 1991: 131-144
[c12]Weijia Shang, Matthew T. O'Keefe, José A. B. Fortes: On Loop Transformations for Generalized Cycle Shrinking. ICPP (2) 1991: 132-141- 1990
[j7]Mengly Chean, José A. B. Fortes: A Taxonomy of Reconfiguration Techniques for Fault-Tolerant Processor Arrays. IEEE Computer 23(1): 55-69 (1990)
[j6]Mengly Chean, José A. B. Fortes: The Full-Use-of-Suitable-Spares (FUSS) Approach to Hardware Reconfiguration for Fault-Tolerant Processor Arrays. IEEE Trans. Computers 39(4): 564-571 (1990)
[c11]Y. X. Wang, José A. B. Fortes: Estimates of MTTF and optimal number of spares of fault-tolerant processor arrays. FTCS 1990: 184-191
[c10]Weijia Shang, José A. B. Fortes: Time-Optimal and Conflict-Free Mappings of Uniform Dependence Algorithms into Lower Dimensional Processor Arrays. ICPP (1) 1990: 101-110
1980 – 1989
- 1989
[j5]
[j4]Weijia Shang, José A. B. Fortes: On the optimality of linear schedules. VLSI Signal Processing 1(3): 209-220 (1989)
[c9]Noé Lopez-Benitez, José A. B. Fortes: Detailed modeling of fault-tolerant processor arrays. FTCS 1989: 545-552
[c8]Fernando J. Nuñez, José A. B. Fortes: Performance of Connectionist Learning Algorithms on 2-D SIMD Processor Arrays. NIPS 1989: 810-817- 1988
[j3]William W. Carlson, José A. B. Fortes: On the Performance of Combined Data Flow and Control Flow Systems: Experiments Using Two Iterative Algorithms. J. Parallel Distrib. Comput. 5(4): 359-382 (1988)
[c7]Weijia Shang, José A. B. Fortes: Independent Partitioning of Algorithms With Uniform Data Dependencies. ICPP (2) 1988: 26-33
[c6]Darwen Rau, José A. B. Fortes, Howard Jay Siegel: Destination Tag Routing Techniques Based on a State Model for the IADM Network. ISCA 1988: 318-324- 1987
[c5]William W. Carlson, José A. B. Fortes: On the Performance of Combined Data Flow and Control Flow Systems: Experiments Using Two Iterative Algorithms. ICPP 1987: 671-679- 1986
[j2]Dan I. Moldovan, José A. B. Fortes: Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays. IEEE Trans. Computers 35(1): 1-12 (1986)
[c4]
[c3]Matthew T. O'Keefe, José A. B. Fortes: A Comparative Study of Two Systematic Design Methodologies for Systolic Arrays. ICPP 1986: 672-675
[c2]M. Arif Samad, José A. B. Fortes: Explanation Capabilities in DEFT : A Design-For-Testability Expert System. ITC 1986: 954-963- 1985
[j1]José A. B. Fortes, C. S. Raghavendra: Gracefully Degradable Processor Arrays. IEEE Trans. Computers 34(11): 1033-1044 (1985)- 1984
[c1]José A. B. Fortes, Dan I. Moldovan: Data Broadcasting in Linearly Scheduled Array Processors. ISCA 1984: 224-231
Coauthor Index
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last updated on 2013-10-02 11:00 CEST by the dblp team



