Eric S. Fetzer

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	2012
j2		Reid J. Riedlinger, Ron Arnold, Larry Biro, William J. Bowhill, Jason Crop, Kevin Duda, Eric S. Fetzer, Olivier Franza, Tom Grutkowski, Casey Little, Charles Morganti, Gary Moyer, Ashley Munch, Mahalingam Nagarajan, Cheolmin Park, Christopher Poirier, Bill Repasky, Edi Roytman, Tejpal Singh, Matthew W. Stefaniw: A 32 nm, 3.1 Billion Transistor, 12 Wide Issue Itanium® Processor for Mission-Critical Servers. J. Solid-State Circuits 47(1): 177-193 (2012)
	2011
c1		Reid J. Riedlinger, Rohit Bhatia, Larry Biro, William J. Bowhill, Eric S. Fetzer, Paul E. Gronowski, Tom Grutkowski: A 32nm 3.1 billion transistor 12-wide-issue Itanium^® processor for mission-critical servers. ISSCC 2011: 84-86
	2006
j1		Eric S. Fetzer: Using Adaptive Circuits to Mitigate Process Variations in a Microprocessor Design. IEEE Design & Test of Computers 23(6): 476-483 (2006)

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