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Norbert Felber
2010 – today
- 2012
[j9]Patrick Maechler, Christoph Studer, David E. Bellasi, Arian Maleki, Andreas Burg, Norbert Felber, Hubert Kaeslin, Richard G. Baraniuk: VLSI Design of Approximate Message Passing for Signal Restoration and Compressive Sensing. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(3): 579-590 (2012)- [c29]Patrick Maechler, David E. Bellasi, Andreas Burg, Norbert Felber, Hubert Kaeslin, Christoph Studer: Sparsity-based real-time audio restoration. DASIP 2012: 1-2
- [c28]Patrick Maechler, Norbert Felber, Hubert Kaeslin, Andreas Burg: Hardware-efficient random sampling of fourier-sparse signals. ISCAS 2012: 269-272
- [c27]Michael Muehlberghuber, Christoph Keller, Norbert Felber, Christian Pendl: 100 Gbit/s authenticated encryption based on quantum key distribution. VLSI-SoC 2012: 123-128
- 2010
- [j8]Marc Simon Wegmueller, Michael Oberle, Norbert Felber, Niels Kuster, Wolfgang Fichtner: Signal Transmission by Galvanic Coupling Through the Human Body. IEEE T. Instrumentation and Measurement 59(4): 963-969 (2010)
- [c26]Patrick Maechler, Pierre Greisen, Norbert Felber, Andreas Burg: Matching pursuit: Evaluation and implementatio for LTE channel estimation. ISCAS 2010: 589-592
- [c25]Erich Wenger, Martin Feldhofer, Norbert Felber: Low-Resource Hardware Design of an Elliptic Curve Processor for Contactless Devices. WISA 2010: 92-106
2000 – 2009
- 2009
- [j7]Marc Simon Wegmueller, Sonja Huclova, Juerg Froehlich, Michael Oberle, Norbert Felber, Niels Kuster, Wolfgang Fichtner: Galvanic Coupling Enabling Wireless Implant Communications. IEEE T. Instrumentation and Measurement 58(8): 2618-2625 (2009)
- [c24]Luca Henzen, Flavio Carbognani, Norbert Felber, Wolfgang Fichtner: Hardware evaluation of the stream cipher-based hash functions RadioGatún and irRUPT. DATE 2009: 646-651
- [c23]Markus Wenk, Peter Luethi, Thomas Koch, Patrick Maechler, Norbert Felber, Wolfgang Fichtner, Michael Lerjen: Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed. ISCAS 2009: 789-792
- [c22]Markus Wenk, Peter Luethi, Thomas Koch, Patrick Maechler, Norbert Felber, Wolfgang Fichtner, Michael Lerjen: Live Demonstration: Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed. ISCAS 2009: 793
- 2008
- [j6]Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner: Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers. IEEE Trans. VLSI Syst. 16(7): 830-836 (2008)
- [c21]Simon Heinzle, Olivier Saurer, Sebastian Axmann, Diego Browarnik, Andreas Schmidt, Flavio Carbognani, Peter Luethi, Norbert Felber, Markus H. Gross: A transform, lighting and setup ASIC for surface splatting. ISCAS 2008: 2813-2816
- [c20]Peter Luethi, Markus Wenk, Thomas Koch, Wolfgang Fichtner, Michael Lerjen, Norbert Felber: Multi-user MIMO testbed. WINTECH 2008: 109-110
- [c19]Daniel M. Hein, Johannes Wolkerstorfer, Norbert Felber: ECC Is Ready for RFID - A Proof in Silicon. Selected Areas in Cryptography 2008: 401-413
- 2007
- [j5]Marc Simon Wegmueller, Andreas Kuhn, Juerg Froehlich, Michael Oberle, Norbert Felber, Niels Kuster, Wolfgang Fichtner: An Attempt to Model the Human Body as a Communication Channel. IEEE Trans. Biomed. Engineering 54(10): 1851-1857 (2007)
- [j4]Tim Weyrich, Simon Heinzle, Timo Aila, Daniel Bernhard Fasnacht, Stephan Oetiker, Mario Botsch, Cyril Flaig, Simon Mall, Kaspar Rohrer, Norbert Felber, Hubert Kaeslin, Markus H. Gross: A hardware architecture for surface splatting. ACM Trans. Graph. 26(3): 90 (2007)
- [c18]Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert Felber, Matthias Braendli: Multi-gigabit GCM-AES Architecture Optimized for FPGAs. CHES 2007: 227-238
- [c17]C. Hess, Markus Wenk, Andreas Burg, Peter Luethi, Christoph Studer, Norbert Felber, Wolfgang Fichtner: Reduced-complexity mimo detector with close-to ml error rate performance. ACM Great Lakes Symposium on VLSI 2007: 200-203
- [c16]Simon Haene, Andreas Burg, Peter Luethi, Norbert Felber, Wolfgang Fichtner: FFT Processor for OFDM Channel Estimation. ISCAS 2007: 1417-1420
- [c15]Peter Luethi, Andreas Burg, Simon Haene, David Perels, Norbert Felber, Wolfgang Fichtner: VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition. ISCAS 2007: 1421-1424
- 2006
- [j3]Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner: Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC. Electr. Notes Theor. Comput. Sci. 146(2): 133-149 (2006)
- [c14]Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner: GALS at ETH Zurich: Success or Failure. ASYNC 2006: 150-159
- [c13]Felix Bürgin, Flavio Carbognani, Martin Hediger, Hektor Meier, Robert Meyer-Piening, Rafael Santschi, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner: Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm. DAC 2006: 558-561
- [c12]Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner: Two-phase resonant clocking for ultra-low-power hearing aid applications. DATE 2006: 73-78
- [c11]Andreas Burg, Simon Haene, David Perels, Peter Luethi, Norbert Felber, Wolfgang Fichtner: Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems. ISCAS 2006
- [c10]Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner: 42% power savings through glitch-reducing clocking strategy in a hearing aid application. ISCAS 2006
- [c9]Simon Haene, Andreas Burg, David Perels, Peter Luethi, Norbert Felber, Wolfgang Fichtner: Silicon implementation of an MMSE-based soft demapper for MIMO-BICM. ISCAS 2006
- [c8]Markus Wenk, M. Zellweger, Andreas Burg, Norbert Felber, Wolfgang Fichtner: K-best MIMO detection VLSI architectures achieving up to 424 Mbps. ISCAS 2006
- 2005
- [c7]Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner: Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications. PATMOS 2005: 446-455
- 2004
- [c6]Frank K. Gürkaynak, Andreas Burg, Norbert Felber, Wolfgang Fichtner, D. Gasser, F. Hug, Hubert Kaeslin: A 2 Gb/s balanced AES crypto-chip implementation. ACM Great Lakes Symposium on VLSI 2004: 39-44
- 2003
- [j2]Jürgen Wassner, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner: Waveform coding for low-power digital filtering of speech data. IEEE Transactions on Signal Processing 51(6): 1656-1661 (2003)
- 2002
- [c5]Thomas Villiger, Stephan Oetiker, Frank K. Gürkaynak, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner: A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems. ASYNC 2002: 181-189
- 2001
- [j1]Manfred Stadler, Markus Thalmann, Thomas Röwer, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner: Design and Verification of a Stack Processor Virtual Component. IEEE Micro 21(2): 69-80 (2001)
- [c4]J. Thalheim, Norbert Felber, Wolfgang Fichtner: A new approach for controlling series-connected IGBT modules. ISCAS (3) 2001: 69-72
1990 – 1999
- 1999
- [c3]Manfred Stadler, Thomas Röwer, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, Markus Thalmann: Functional verification of intellectual properties (IP): a simulation-based solution for an application-specific instruction-set processor. ITC 1999: 414-420
- 1993
- [c2]H. Bonnenberg, Andreas Curiger, Norbert Felber, Hubert Kaeslin, R. Zimmermann, Wolfgang Fichtner: VINCI: Secure Test of a VLSI High-Speed Encryption System. ITC 1993: 782-790
- 1991
- [c1]H. Bonnenberg, Andreas Curiger, Norbert Felber, Hubert Kaeslin, Xuejia Lai: VLSI Implementation of a New Block Cipher. ICCD 1991: 510-513
Coauthor Index
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last updated on 2013-03-14 00:19 CET by the dblp team