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Jeffrey T. Draper
Jeff Draper
2010 – today
- 2013
[c40]Lihang Zhao, Woojin Choi, Lizhong Chen, Jeffrey T. Draper: In-network traffic regulation for Transactional Memory. HPCA 2013: 520-531- 2012
- [c39]Lihang Zhao, Woojin Choi, Jeffrey T. Draper: TMNOC: a case of HTM and NoC co-design for increased energy efficiency and concurrency. PACT 2012: 439-440
- [c38]Woojin Choi, Lihang Zhao, Jeff Draper: Mileage-based contention management in transactional memory. PACT 2012: 471-472
- [c37]Lihang Zhao, Woojin Choi, Jeff Draper: SEL-TM: Selective Eager-Lazy Management for Improved Concurrency in Transactional Memory. IPDPS 2012: 95-106
- [c36]Lihang Zhao, Jeff Draper: On the Correctness of Mixing Lazy and Eager Version Management in Transactions. IPDPS Workshops 2012: 2534-2537
- 2011
- [c35]Woojin Choi, Jeff Draper: Unified Signatures for Improving Performance in Transactional Memory. IPDPS 2011: 817-827
- 2010
- [c34]Bilal Zafar, Jeff Draper, Timothy Mark Pinkston: Cubic Ring Networks: A Polymorphic Topology for Network-on-Chip. ICPP 2010: 443-452
- [c33]Woojin Choi, Jeff Draper: Locality-aware adaptive grain signatures for Transactional Memories. IPDPS 2010: 1-10
- [c32]Woojin Choi, Young Hoon Kang, Taek-Jun Kwon, Jeff Draper: Implementation of adaptive grain signatures for transactional memories. ISCAS 2010: 3489-3492
- [c31]Mahta Haghi, Jeff Draper: A single-event upset hardening technique for high speed MOS Current Mode Logic. ISCAS 2010: 4137-4140
- [c30]Young Hoon Kang, Taek-Jun Kwon, Jeffrey T. Draper: Fault-Tolerant Flow Control in On-chip Networks. NOCS 2010: 79-86
2000 – 2009
- 2009
- [j6]Taek-Jun Kwon, Jeffrey T. Draper: Floating-point division and square root using a Taylor-series expansion algorithm. Microelectronics Journal 40(11): 1601-1605 (2009)
- [c29]Young Hoon Kang, Jeff Sondeen, Jeffrey T. Draper: Multicast routing with dynamic packet fragmentation. ACM Great Lakes Symposium on VLSI 2009: 113-116
- [c28]Mahta Haghi, Jeff Draper: The effect of design parameters on single-event upset sensitivity of MOS current mode logic. ACM Great Lakes Symposium on VLSI 2009: 233-238
- [c27]Young Hoon Kang, Taek-Jun Kwon, Jeff Draper: Dynamic packet fragmentation for increased virtual channel utilization in on-chip routers. NOCS 2009: 250-255
- 2007
- [c26]Sumit D. Mediratta, Jeffrey T. Draper: Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip Router. ASAP 2007: 69-75
- [c25]Riaz Naseer, Jeff Draper, Younes Boulghassoul, Sandeepan DasGupta, Art Witulski: Critical charge and set pulse widths for combinational logic in commercial 90nm cmos technology. ACM Great Lakes Symposium on VLSI 2007: 227-230
- [c24]Sumit D. Mediratta, Jeffrey T. Draper: Characterization of a Fault-tolerant NoC Router. ISCAS 2007: 381-384
- [c23]Riaz Naseer, Younes Boulghassoul, Jeff Draper, Sandeepan DasGupta, Art Witulski: Critical Charge Characterization for Soft Error Rate Modeling in 90nm SRAM. ISCAS 2007: 1879-1882
- 2006
- [c22]Rashed Zafar Bhatti, Monty Denneau, Jeff Draper: 2 Gbps SerDes design based on IBM Cu-11 (130nm) standard cell technology. ACM Great Lakes Symposium on VLSI 2006: 198-203
- [c21]Tim Barrett, Sumit D. Mediratta, Taek-Jun Kwon, Ravinder Singh, Sachit Chandra, Jeff Sondeen, Jeffrey T. Draper: A double-data rate (DDR) processing-in-memory (PIM) device with wideword floating-point capability. ISCAS 2006
- [c20]Rashed Zafar Bhatti, Monty Denneau, Jeff Draper: Phase measurement and adjustment of digital signals using random sampling technique. ISCAS 2006
- [c19]Riaz Naseer, Jeff Draper: DF-DICE: a scalable solution for soft error tolerant circuit design. ISCAS 2006
- 2005
- [j5]Jeffrey T. Draper, Tim Barrett, Jeff Sondeen, Sumit D. Mediratta, Chang Woo Kang, Ihn Kim, Gokhan Daglikoca: A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System. VLSI Signal Processing 40(1): 73-84 (2005)
- [c18]Sumit D. Mediratta, Jeffrey T. Draper: Performance Analysis of User-Level PIM Communication in the Data IntensiVe Architecture (DIVA) System. HiPC 2005: 407-419
- [c17]Sumit D. Mediratta, Craig S. Steele, Jeff Sondeen, Jeffrey T. Draper: An area-efficient and protected network interface for processing-in-memory systems. ISCAS (3) 2005: 2951-2954
- [c16]Taek-Jun Kwon, Jeff Sondeen, Jeffrey T. Draper: Design trade-offs in floating-point unit implementation for embedded and processing-in-memory systems. ISCAS (4) 2005: 3331-3334
- 2004
- [c15]Taek-Jun Kwon, Joong-Seok Moon, Jeff Sondeen, Jeffrey T. Draper: A 0.18 µm implementation of a floating-point unit for a processing-in-memory system. ISCAS (2) 2004: 453-456
- [c14]Sumit D. Mediratta, Jeff Sondeen, Jeffrey T. Draper: An Area-Efficient Router for the Data-Intensive Architecture (DIVA) System. VLSI Design 2004: 863-868
- 2003
- [j4]Joong-Seok Moon, William C. Athas, Sigfrid D. Soli, Jeffrey T. Draper, Peter A. Beerel: Voltage-pulse driven harmonic resonant rail drivers for low-power applications. IEEE Trans. VLSI Syst. 11(5): 762-777 (2003)
- 2002
- [c13]Jeffrey T. Draper, Jeff Sondeen, Sumit D. Mediratta, Ihn Kim: Implementation of a 32-bit RISC Processor for the Data-Intensive Architecture Processing-In-Memory Chip. ASAP 2002: 163-172
- [c12]Jeffrey T. Draper, Jacqueline Chame, Mary W. Hall, Craig S. Steele, Tim Barrett, Jeff LaCoss, John J. Granacki, Jaewook Shin, Chun Chen, Chang Woo Kang, Ihn Kim Gokhan: The architecture of the DIVA processing-in-memory chip. ICS 2002: 14-25
1990 – 1999
- 1999
- [c11]Louis Luh, John Choma Jr., Jeffrey T. Draper: Area-Efficient Area Pad Design for High Pin-Count Chips. Great Lakes Symposium on VLSI 1999: 78-81
- [c10]Louis Luh, John Choma Jr., Jeffrey T. Draper: A self-sensing tristate pad driver for control signals of multiple bus controllers. ISCAS (1) 1999: 447-450
- [c9]Mary W. Hall, Peter M. Kogge, Jefferey G. Koller, Pedro C. Diniz, Jacqueline Chame, Jeff Draper, Jeff LaCoss, John J. Granacki, Jay B. Brockman, Apoorv Srivastava, William C. Athas, Vincent W. Freeh, Jaewook Shin, Joonseok Park: Mapping Irregular Applications to DIVA, a PIM-based Data-Intensive Architecture. SC 1999: 57
- 1998
- [c8]Louis Luh, John Choma Jr., Jeffrey T. Draper: A Continuous-Time Switched-Current Sigma-Delta Modulator with Reduced Loop Delay. Great Lakes Symposium on VLSI 1998: 286-
- [c7]Jeffrey T. Draper, Jay Block, Jeff Koller, Craig S. Steele: Thermal Management in Embedded Systems Using MEMS. IPPS/SPDP Workshops 1998: 900-901
- [c6]Craig S. Steele, Jeffrey T. Draper, Jeff Koller: Safety Net: Secure Communications for Embedded High-Performance Computing. IPPS/SPDP Workshops 1998: 908-912
- 1997
- [c5]Craig S. Steele, Jeffrey T. Draper, Jeff Koller, C. LaCour: A Bus-Efficient Low-Latency Network Interface for the PDSS Multicomputer. HPDC 1997: 213-222
- [c4]Jeffrey T. Draper, Fabrizio Petrini: Routing in Bidirectional k-ary n-cubes with the Red Rover Algorithm. PDPTA 1997: 1184-1193
- 1996
- [c3]Jeffrey T. Draper: The Red Rover Algorithm for Deadlock-Free Routing on Bidirectional Rings. PDPTA 1996: 345-354
- 1994
- [j3]Jeffrey T. Draper, Joydeep Ghosh: A Comprehensive Analytical Model for Wormhole Routng in Multicomputer Systems. J. Parallel Distrib. Comput. 23(2): 202-214 (1994)
- [j2]Jeffrey T. Draper, Joydeep Ghosh: The M-Cache: A Message-Handling Mechanism for Multicomputer Systems. Parallel Computing 20(9): 1269-1288 (1994)
- 1993
- [j1]Joydeep Ghosh, Kelvin D. Goveas, Jeffrey T. Draper: Performance Evaluation of a Parallel I/O Subsystem for Hypercube Multicomputers. J. Parallel Distrib. Comput. 17(1-2): 90-106 (1993)
- 1992
- [c2]Jeffrey T. Draper, Joydeep Ghosh: Multipath E-Cube Algorithms (MECA) for Adaptive Wormhole Routing and Broadcasting in itk-ary itn-Cubes. IPPS 1992: 407-410
- 1991
- [c1]Jeffrey T. Draper, Joydeep Ghosh, William C. Athas: The M-cache: a message-retrieving mechanism for multicomputer systems. SPDP 1991: 258-265
Coauthor Index
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last updated on 2013-06-11 12:18 CEST by the dblp team