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Ruo-Ting Ding

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2010 – 2019

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2013
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  - journals/tvlsi/DingHT13
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Ruo-Ting Ding, Shi-Yu Huang, Chao-Wen Tzeng:
Cell-Based Process Resilient Multiphase Clock Generation. IEEE Trans. Very Large Scale Integr. Syst. 21(12): 2348-2352 (2013)
2012
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Ruo-Ting Ding, Shi-Yu Huang, Chao-Wen Tzeng, Shan-Chien Fang, Chia-Chien Weng:
Cyclic-MPCG: Process-resilient and super-resolution multi-phase clock generation by exploiting the cyclic property. VLSI-DAT 2012: 1-4

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