Alvin M. Despain

Won Woo Ro, Stephen P. Crago, Alvin M. Despain, Jean-Luc Gaudiot: Design and evaluation of a hierarchical decoupled architecture. The Journal of Supercomputing 38(3): 237-259 (2006)

Won Woo Ro, Jean-Luc Gaudiot, Stephen P. Crago, Alvin M. Despain: HiDISC: A Decoupled Architecture for Data-Intensive Application. IPDPS 2003: 3

Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain: Low-power state assignment targeting two- and multilevel logic implementations. IEEE Trans. on CAD of Integrated Circuits and Systems 17(12): 1281-1291 (1998)

Kevin M. Obenland, Alvin M. Despain: Simulating the Effect of Decoherence and Inaccuracies on a Quantum Computer. QCQC 1998: 447-459

Shihming Liu, Massoud Pedram, Alvin M. Despain: State assignment based on two-dimensional placement and hypercube mapping. Integration 24(2): 101-118 (1997)

Vason P. Srini, Tam M. Nguyen, Darren R. Busing, Michael J. Carlton, Bruce K. Holmer, Georges E. Smine, Alvin M. Despain: Design and Simulation of the Aquarius-II Multiprocessor. Journal of Systems Integration 7(2): 151-178 (1997)

Bruce K. Holmer, Barton Sano, Michael J. Carlton, Peter Van Roy, Alvin M. Despain: Design and Analysis of Hardware for High-Performance Prolog. J. Log. Program. 29(1-3): 107-139 (1996)

Chi-Ying Tsui, José C. Monteiro, Massoud Pedram, Srinivas Devadas, Alvin M. Despain, Bill Lin: Correction to "Power Estimation Methods for Sequential Logic Circuits" [Correspondence]. IEEE Trans. VLSI Syst. 4(4): 495 (1996)

Ing-Jer Huang, Alvin M. Despain: Synthesis of application specific instruction sets. IEEE Trans. on CAD of Integrated Circuits and Systems 14(6): 663-675 (1995)

Chi-Ying Tsui, José C. Monteiro, Massoud Pedram, Srinivas Devadas, Alvin M. Despain, Bill Lin: Power estimation methods for sequential logic circuits. IEEE Trans. VLSI Syst. 3(3): 404-416 (1995)

Shihming Liu, Massoud Pedram, Alvin M. Despain: A Fast State Assignment Procedure for Large FSMs. DAC 1995: 327-332

Ching-Long Su, Alvin M. Despain: Cache designs for energy efficiency. HICSS (1) 1995: 306-315

Apoorv Srivastava, Yong-Seon Koh, Barton Sano, Alvin M. Despain: 190-MHz CMOS 4-Kbyte Pipelined Caches. ISCAS 1995: 1053-1056

Shihming Liu, Massoud Pedram, Alvin M. Despain: PLATO P: PLA Timing Optimization by Partitioning. ISCAS 1995: 1744-1747

Ching-Long Su, Alvin M. Despain: Cache design trade-offs for power and performance optimization: a case study. ISLPD 1995: 63-68

Ching-Long Su, Chi-Ying Tsui, Alvin M. Despain: Saving Power in the Control Path of Embedded Processors. IEEE Design & Test of Computers 11(4): 24-30 (1994)

Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain: Power efficient technology decomposition and mapping under an extended power consumption model. IEEE Trans. on CAD of Integrated Circuits and Systems 13(9): 1110-1122 (1994)

Ching-Long Su, Chi-Ying Tsui, Alvin M. Despain: Lower Power Architecture Design and Compilation Techniques for High-Performance Processors. COMPCON 1994: 489-498

Ing-Jer Huang, Alvin M. Despain: Synthesis of Instruction Sets for Pipelined Microprocessors. DAC 1994: 5-11

Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain: Exact and Approximate Methods for Calculating Signal and Transition Probabilities in FSMs. DAC 1994: 18-23

Chi-Ying Tsui, Massoud Pedram, Chih-Ang Chen, Alvin M. Despain: Low power state assignment targeting two-and multi-level logic implementations. ICCAD 1994: 82-87

Ing-Jer Huang, Alvin M. Despain: Generating instruction sets and microarchitectures from applications. ICCAD 1994: 391-396

Ching-Long Su, Chin-Chi Teng, Alvin M. Despain: A Study of Cache Hashing Functions for Symbolic Applications in Micro-Parallel Processors. ICPADS 1994: 530-537

Ching-Long Su, Alvin M. Despain: Branch with Masked Squashing in Superpipelined Processors. ISCA 1994: 130-140

Ching-Long Su, Alvin M. Despain: Minimizing branch misprediction penalties for superpipelined processors. MICRO 1994: 138-142

Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain: Technology Decomposition and Mapping Targeting Low Power Dissipation. DAC 1993: 68-73

Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain: Efficient estimation of dynamic power consumption under a real delay model. ICCAD 1993: 224-228

Ing-Jer Huang, Alvin M. Despain: Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors. ICCAD 1993: 594-599

Barton Sano, Alvin M. Despain: The 16-fold way: a microparallel taxonomy. MICRO 1993: 60-69

Apoorv Srivastava, Alvin M. Despain: Prophetic branches: a branch architecture for code compaction and efficient execution. MICRO 1993: 94-99

Ing-Jer Huang, Alvin M. Despain: An extended classification of inter-instruction dependency and its application in automatic synthesis of pipelined processors. MICRO 1993: 236-246

Peter Van Roy, Alvin M. Despain: High-Performance Logic Programming with the Aquarius Prolog Compiler. IEEE Computer 25(1): 54-68 (1992)

Ing-Jer Huang, Alvin M. Despain: High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers. DAC 1992: 135-140

Iksoo Pyo, Ching-Long Su, Ing-Jer Huang, Kuo-Rueih Pan, Yong-Seon Koh, Chi-Ying Tsui, Hsu-Tsun Chen, Gino Cheng, Shihming Liu, Shiqun Wu, Alvin M. Despain: Application-Driven Design Automation for Microprocessor Design. DAC 1992: 512-517

Alvin M. Despain, Robert Yung: An integrated prolog architecture for symbolic and numeric executions. Ann. Math. Artif. Intell. 4: 107-133 (1991)

Saul Amarel, Alvin M. Despain, H. Penny Nii, Louis I. Steinberg, Marty Tenenbaum, Peter M. Will: AI and Design. IJCAI 1991: 563-568

Bruce K. Holmer, Alvin M. Despain: Viewing Instruction Set Design as an Optimization Problem. MICRO 1991: 153-162

Shreekant S. Thakkar, Michel Dubois, Anthony T. Laundrie, Gurindar S. Sohi, David V. James, Stein Gjessing, Manu Thapar, Bruce Delagi, Michael J. Carlton, Alvin M. Despain: Scalable Shared-Memory Multiprocessor Architectures. IEEE Computer 23(6): 71-83 (1990)

Barry S. Fagin, Alvin M. Despain: The Performance of Parallel Prolog Programs. IEEE Trans. Computers 39(12): 1434-1445 (1990)

Darren R. Busing, Vason P. Srini, Georges E. Smine, Michael J. Carlton, Alvin M. Despain: The Aquarius IIU System. ICSI 1990: 38-46

Bruce K. Holmer, Barton Sano, Michael J. Carlton, Peter Van Roy, Ralph Clarke Haygood, William R. Bush, Alvin M. Despain, Joan M. Pendleton, Tep P. Dobry: Fast Prolog with an Extended General Purpose Architecture. ISCA 1990: 282-291

Peter Van Roy, Alvin M. Despain: The Benefits of Global Dataflow Analysis for an Optimizing Prolog Compiler. NACLP 1990: 501-515

Alvin M. Despain: Prolog at Berkeley. COMPCON 1988: 64-67

Tam M. Nguyen, Vason P. Srini, Alvin M. Despain: A two-tier memory architecture for high-performance multiprocessor systems. ICS 1988: 326-336

Barry S. Fagin, Alvin M. Despain: Performance Studies of a Parallel Prolog Architecture. ISCA 1987: 108-116

Hervé J. Touati, Alvin M. Despain: An Empirical Study of the Warren Abstract Machine. SLP 1987: 114-124

William R. Bush, Gino Cheng, Patrick C. McGeer, Alvin M. Despain: Experience with Prolog as a Hardware Specification Language. SLP 1987: 490-498

Alvin M. Despain, Yale N. Patt, Tep P. Dobry, Jung-Herng Chang, Wayne Citrin: High Performance Prolog, The Multiplicative Effect of Several Levels of Implementation. COMPCON 1986: 178-185

Jonathan D. Pincus, Alvin M. Despain: Delay reduction using simulated annealing. DAC 1986: 690-695

Philip Bitar, Alvin M. Despain: Multiprocessor Cache Synchronization: Issues, Innovations, Evolution. ISCA 1986: 424-433

Jung-Herng Chang, Alvin M. Despain, Doug DeGroot: AND-Parallelism of Logic Programs Based on a Static Data Dependency Analysis. COMPCON 1985: 218-226

Alvin M. Despain, Yale N. Patt: Aquarius - A High Performance Computing System for Symbolic/Numeric Applications. COMPCON 1985: 376-382

Tep P. Dobry, Alvin M. Despain, Yale N. Patt: Performance Studies of a Prolog Machine Architecture. ISCA 1985: 180-190

Jung-Herng Chang, Alvin M. Despain: Semi-Intelligent Backtracking of Prolog Based on Static Data Dependency Analysis. SLP 1985: 10-21

Erling Wold, Alvin M. Despain: Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementations. IEEE Trans. Computers 33(5): 414-426 (1984)

Alvin M. Despain, Yale N. Patt: The Aquarius Project. COMPCON 1984: 364-368

Alvin M. Despain: Very Fast Fourier Transform Algorithms Hardware for Implementation. IEEE Trans. Computers 28(5): 333-341 (1979)

Carlo H. Séquin, Alvin M. Despain, David A. Patterson: Communication In X-TREE, A Modular Multiprocessor System. ACM Annual Conference (1) 1978: 194-203

Alvin M. Despain, David A. Patterson: X-Tree: A Tree Structured Multi-Processor Computer Architecture. ISCA 1978: 144-151