| 2008 | ||
|---|---|---|
| j30 | Sunil R. Das, Altaf Hossain, Satyendra Biswas, Emil M. Petriu: Aliasing-free compaction revisited. IET Circuits, Devices & Systems 2(1): 166-178 (2008) | |
| j29 | Sunil R. Das, Altaf Hossain, Satyendra Biswas, Emil M. Petriu, Mansour H. Assaf, Wen-Ben Jone, Mehmet Sahinoglu: On a New Graph Theory Approach to Designing Zero-Aliasing Space Compressors for Built-In Self-Testing. IEEE T. Instrumentation and Measurement 57(10): 2146-2168 (2008) | |
| 2007 | ||
| j28 | Sunil R. Das, Jila Zakizadeh, Satyendra Biswas, Mansour H. Assaf, Amiya Nayak, Emil M. Petriu, Wen-Ben Jone, Mehmet Sahinoglu: Testing Analog and Mixed-Signal Circuits With Built-In Hardware - A New Approach. IEEE T. Instrumentation and Measurement 56(3): 840-855 (2007) | |
| 2006 | ||
| j27 | Sunil R. Das, Rochit Rajsuman: Guest Editorial Second Special Section of the IEEE Transactions on Instrumentation and Measurement in the Area of VLSI Testing - Future of Semiconductor Test. IEEE T. Instrumentation and Measurement 55(2): 378-380 (2006) | |
| j26 | Satyendra Biswas, Sunil R. Das, Emil M. Petriu: Space compactor design in VLSI circuits based on graph theoretic concepts. IEEE T. Instrumentation and Measurement 55(4): 1106-1118 (2006) | |
| j25 | Jianxun Liu, Wen-Ben Jone, Sunil R. Das: Crosstalk test pattern generation for dynamic programmable logic arrays. IEEE T. Instrumentation and Measurement 55(4): 1288-1302 (2006) | |
| 2005 | ||
| j24 | Sunil R. Das: Getting errors to catch themselves - self-testing of VLSI circuits with built-in hardware. IEEE T. Instrumentation and Measurement 54(3): 941-955 (2005) | |
| j23 | Mehmet Sahinoglu, David L. Libby, Sunil R. Das: Measuring availability indexes with small samples for component and network reliability using the Sahinoglu-Libby probability model. IEEE T. Instrumentation and Measurement 54(3): 1283-1295 (2005) | |
| j22 | Sunil R. Das, Rochit Rajsuman: Guest Editorial First Special Section of the IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT in the Area of VLSI Testing - Future of Semiconductor Test. IEEE T. Instrumentation and Measurement 54(5): 1659-1661 (2005) | |
| j21 | Sunil R. Das, Chittoor V. Ramamoorthy, Mansour H. Assaf, Emil M. Petriu, Wen-Ben Jone, Mehmet Sahinoglu: Revisiting response compaction in space for full-scan circuits with nonexhaustive test sets using concept of sequence characterization. IEEE T. Instrumentation and Measurement 54(5): 1662-1677 (2005) | |
| j20 | Vinod Narayanan, Swaroop Ghosh, Wen-Ben Jone, Sunil R. Das: A built-in self-testing method for embedded multiport memory arrays. IEEE T. Instrumentation and Measurement 54(5): 1721-1738 (2005) | |
| j19 | Satyendra Biswas, Sunil R. Das, Emil M. Petriu: An adaptive compressed MPEG-2 video watermarking scheme. IEEE T. Instrumentation and Measurement 54(5): 1853-1861 (2005) | |
| j18 | Sunil R. Das, Chittoor V. Ramamoorthy, Mansour H. Assaf, Emil M. Petriu, Wen-Ben Jone, Mehmet Sahinoglu: Fault simulation and response compaction in full scan circuits using HOPE. IEEE T. Instrumentation and Measurement 54(6): 2310-2328 (2005) | |
| 2004 | ||
| j17 | Vikram Arora, Wen-Ben Jone, Der-Cheng Huang, Sunil R. Das: A parallel built-in self-diagnostic method for nontraditional faults of embedded memory arrays. IEEE T. Instrumentation and Measurement 53(4): 915-932 (2004) | |
| j16 | Emil M. Petriu, Stephen K. S. Yeung, Sunil R. Das, Ana-Maria Cretu, Hans J. W. Spoelder: Robotic tactile recognition of pseudorandom encoded objects. IEEE T. Instrumentation and Measurement 53(5): 1425-1432 (2004) | |
| c17 | Mansour H. Assaf, Rami S. Abielmona, Payam Abolghasem, Sunil R. Das, Emil M. Petriu, Voicu Groza, Mehmet Sahinoglu: Implementation of Embedded Cores-Based Digital Devices in JBits Java Simulation Environment. CIT 2004: 315-325 | |
| c16 | Mansour H. Assaf, Sunil R. Das, Emil M. Petriu, Mehmet Sahinoglu: Enhancing Testability in Architectural Design for the New Generation of Core-Based Embedded Systems. HASE 2004: 312-313 | |
| c15 | Sunil R. Das, Chuan Jin, Liwu Jin, Mansour H. Assaf, Emil M. Petriu, Mehmet Sahinoglu: Altera Max Plus II Development Environment in Fault Simulation and Test Implementation of Embedded Cores-Based Sequential Circuits. IWDC 2004: 353-360 | |
| 2003 | ||
| j15 | Emil M. Petriu, Lichen Zhao, Sunil R. Das, Voicu Z. Groza, Aurel Cornell: Instrumentation applications of multibit random-data representation. IEEE T. Instrumentation and Measurement 52(1): 175-181 (2003) | |
| j14 | Sunil R. Das, Rochit Rajsuman: Guest editorial [Special section on innovations in VLSI automatic test equipment (ATEs)]. IEEE T. Instrumentation and Measurement 52(5): 1350-1352 (2003) | |
| j13 | Sunil R. Das, M. Sudarma, Mansour H. Assaf, Emil M. Petriu, Wen-Ben Jone, Krishnendu Chakrabarty, Mehmet Sahinoglu: Parity bit signature in response data compaction and built-in self-testing of VLSI circuits with nonexhaustive test sets. IEEE T. Instrumentation and Measurement 52(5): 1363-1380 (2003) | |
| j12 | Wen-Ben Jone, Der-Chen Huang, Sunil R. Das: An efficient BIST method for non-traditional faults of embedded memory arrays. IEEE T. Instrumentation and Measurement 52(5): 1381-1390 (2003) | |
| c14 | Mansour H. Assaf, Rami S. Abielmona, Payam Abolghasem, Sunil R. Das, Emil M. Petriu, Voicu Groza: JBits Implementation and Design Verification in Space Compressor Design of Digital Circuits. Modelling, Identification and Control 2003: 415-420 | |
| 2002 | ||
| j11 | Sunil R. Das, Jing Yi Liang, Emil M. Petriu, Mansour H. Assaf, Wen-Ben Jone, Krishnendu Chakrabarty: Data compression in space under generalized mergeability based on concepts of cover table and frequency ordering. IEEE T. Instrumentation and Measurement 51(1): 150-172 (2002) | |
| c13 | Sunil R. Das, Mansour H. Assaf, Emil M. Petriu, Sujoy Mukherjee: Design of Aliasing Free Space Compressor in BIST with Maximal Compaction Ratio Using Concepts of Strong and Weak Compatibilities of Response Data Outputs and Generalized Sequence Mergeability. IWDC 2002: 234-245 | |
| 2001 | ||
| j10 | Wen-Ben Jone, Wu-Sung Yeh, Chingwei Yeh, Sunil R. Das: An adaptive path selection method for delay testing. IEEE T. Instrumentation and Measurement 50(5): 1109-1118 (2001) | |
| j9 | Sunil R. Das, Chittoor V. Ramamoorthy, Mansour H. Assaf, Emil M. Petriu, Wen-Ben Jone: Fault tolerance in systems design in VLSI using data compression under constraints of failure probabilities. IEEE T. Instrumentation and Measurement 50(6): 1725-1747 (2001) | |
| c12 | Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das: An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers. VLSI Design 2001: 379-384 | |
| c11 | Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das: A Parallel Built-In Self-Diagnostic Method For Embedded Memory Buffers. VLSI Design 2001: 397-402 | |
| 1998 | ||
| c10 | Emil M. Petriu, Sunil R. Das, N. Trif, S. K. Yeung: Pseudorandom encoding for structured light applications. Computers and Their Applications 1998: 287-290 | |
| c9 | Wen-Ben Jone, Sunil R. Das: A Stochastic Method for Defect Level Analysis of Pseudorandom Testing. VLSI Design 1998: 382- | |
| 1997 | ||
| j8 | Wen-Ben Jone, Yun-Pan Ho, Sunil R. Das: Delay Fault Coverage Enhancement Using Variable Observation Times. J. Electronic Testing 11(2): 131-146 (1997) | |
| c8 | Wen-Ben Jone, Yun-Pan Ho, Sunil R. Das: Delay Fault Coverage Enhancement Using Multiple Test Observation Times. VLSI Design 1997: 106-110 | |
| 1996 | ||
| c7 | Sunil R. Das, N. Goel, Wen-Ben Jone, Amiya R. Nayak: Syndrome signature in output compaction for VLSI BIST. VLSI Design 1996: 337-338 | |
| 1995 | ||
| j7 | Sunil R. Das, Wen-Ben Jone, Amiya R. Nayak, Ian Choi: On testing of sequential machines using circuit decomposition and stochastic modeling. IEEE Transactions on Systems, Man, and Cybernetics 25(3): 489-504 (1995) | |
| j6 | Wen-Ben Jone, Sunil R. Das: CACOP-a random pattern testability analyzer. IEEE Transactions on Systems, Man, and Cybernetics 25(5): 865-871 (1995) | |
| c6 | Sunil R. Das, H. T. Ho, Wen-Ben Jone, Amiya R. Nayak: An improved output compaction technique for built-in self-test in VLSI circuits. VLSI Design 1995: 403-407 | |
| 1994 | ||
| c5 | Amiya R. Nayak, Wen-Ben Jone, Sunil R. Das: Designing General-Purpose Fault-Tolerant Distributed Systems - A Layered Approach. ICPADS 1994: 360-365 | |
| c4 | Sunil R. Das, Wen-Ben Jone, Amiya Nayak, Ian Choi: On Probabilistic Testing of Large-Scale Sequential Circuits Using Circuit Decomposition. VLSI Design 1994: 311-314 | |
| 1993 | ||
| c3 | ||
| 1992 | ||
| j5 | Sunil R. Das, Wen-Ben Jone: On random testing for combinational circuits with a high measure of confidence. IEEE Transactions on Systems, Man, and Cybernetics 22(4): 748-754 (1992) | |
| 1990 | ||
| j4 | Wen-Ben Jone, Sunil R. Das: Multiple-output parity bit signature for exhaustive testing. J. Electronic Testing 1(2): 175-178 (1990) | |
| c2 | Sunil R. Das, Amiya Nayak: A survey on bit dimension optimization strategies of microprograms. MICRO 1990: 281-291 | |
| 1987 | ||
| j3 | Sunil R. Das, Ping Chao, Zen Chen, Yow Lung Dai, Mrinal K. Das: Transition submatrices in regular homing experiments and identification of sequential machines of known class using direct-sum transition matrices. Computers & OR 14(5): 415-433 (1987) | |
| 1986 | ||
| c1 | Sunil R. Das: On random testing of sequential digital logic with a high confidence measure (abstract). ACM Conference on Computer Science 1986: 498 | |
| 1979 | ||
| j2 | Sunil R. Das, C. L. Sheng, Zen Chen, W. J. Hsu: Transition matrices in the measurement and control of synchronous sequential machines. Inf. Sci. 18(1): 47-65 (1979) | |
| 1978 | ||
| j1 | Sunil R. Das, C. L. Sheng: Strong connectivity in symmetric graphs and generation of maximal minimally strongly connected subgraphs. Inf. Sci. 14(3): 181-187 (1978) | |
Colors in the list of coauthors
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