Ray C. C. Cheung

Hongbing Fan, Yu-Liang Wu, Ray C. C. Cheung: Design Automation Framework for Reconfigurable Interconnection Networks. Comput. J. 56(2): 258-269 (2013)

Biao Min, Ray C. C. Cheung, Hong Yan: A Flexible and Customizable Architecture for the Relaxation Labeling Algorithm. IEEE Trans. on Circuits and Systems 60-II(2): 106-110 (2013)

Chao Wang, Xi Li, Xuehai Zhou, Jim Martin, Ray C. C. Cheung: Genome sequencing using mapreduce on FPGA with multiple hardware accelerators (abstract only). FPGA 2013: 266

Hao Luo, Yan Han, Ray C. C. Cheung, Guo Liang, Dazhong Zhu: Subthreshold CMOS voltage reference circuit with body bias compensation for process variation. IET Circuits, Devices & Systems 6(3): 198-203 (2012)

Zhiguan Wang, Chi Wai Yu, Ray C. C. Cheung, Hong Yan: Hypergraph based geometric biclustering algorithm. Pattern Recognition Letters 33(12): 1656-1665 (2012)

Manish Kumar Jaiswal, Ray C. C. Cheung: High Performance Reconfigurable Architecture for Double Precision Floating Point Division. ARC 2012: 302-313

Manish Kumar Jaiswal, Ray C. C. Cheung: Area-Efficient Architectures for Large Integer and Quadruple Precision Floating Point Multipliers. FCCM 2012: 25-28

Donald Donglong Chen, Gavin Xiaoxu Yao, Çetin Kaya Koç, Ray C. C. Cheung: Low complexity and hardware-friendly spectral modular multiplication. FPT 2012: 368-375

Alan W. Y. Lo, Benben Liu, Ray C. C. Cheung: GPU-Based Biclustering for Neural Information Processing. ICONIP (5) 2012: 134-141

Manish Kumar Jaiswal, Ray C. C. Cheung: Area-Efficient FPGA Implementation of Quadruple Precision Floating Point Multiplier. IPDPS Workshops 2012: 376-382

Zahid Ullah, Manish Kumar Jaiswal, Y. C. Chan, Ray C. C. Cheung: FPGA Implementation of SRAM-based Ternary Content Addressable Memory. IPDPS Workshops 2012: 383-389

Pengfei Zhu, Chun Zhang, Hua Li, Ray C. C. Cheung, Bryan Hu: An FPGA-based acceleration platform for auction algorithm. ISCAS 2012: 1002-1005

Gavin Xiaoxu Yao, Junfeng Fan, Ray C. C. Cheung, Ingrid Verbauwhede: Faster Pairing Coprocessor Architecture. Pairing 2012: 160-176

Oliver C. S. Choy, Ray C. C. Cheung, Peter M. Athanas, Kentaro Sano (Eds.): Reconfigurable Computing: Architectures, Tools and Applications - 8th International Symposium, ARC 2012, Hong Kong, China, March 19-23, 2012. Proceedings. Lecture Notes in Computer Science 7199, Springer 2012, isbn 978-3-642-28364-2

Ray C. C. Cheung, Sylvain Duquesne, Junfeng Fan, Nicolas Guillermin, Ingrid Verbauwhede, Gavin Xiaoxu Yao: FPGA Implementation of Pairings Using Residue Number System and Lazy Reduction. CHES 2011: 421-441

Will X. Y. Li, Ray C. C. Cheung, Wei Zhang, Rosa H. M. Chan, Dong Song, Theodore W. Berger: FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Spiking Activities. FCCM 2011: 254

Will X. Y. Li, Rosa H. M. Chan, Wei Zhang, C. W. Yu, Ray C. C. Cheung, Dong Song, Theodore W. Berger: FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Activities. FPL 2011: 44-49

Chi Wai Yu, Fred Cox, Wayne Luk, Ray C. C. Cheung: Hydrate: Hybrid Reconfigurable Architecture Expressions. FPT 2011: 1-4

Jakub Szefer, Wei Zhang, Yu-Yuan Chen, David Champagne, King Chan, Will X. Y. Li, Ray C. C. Cheung, Ruby B. Lee: Rapid single-chip secure processor prototyping on the OpenSPARC FPGA platform. International Symposium on Rapid System Prototyping 2011: 38-44

Gavin Xiaoxu Yao, Junfeng Fan, Ray C. C. Cheung, Ingrid Verbauwhede: A High Speed Pairing Coprocessor Using RNS and Lazy Reduction. IACR Cryptology ePrint Archive 2011: 258 (2011)

Gavin Xiaoxu Yao, Ray C. C. Cheung, Çetin Kaya Koç, Kim Fung Man: Reconfigurable Number Theoretic Transform architectures for cryptographic applications. FPT 2010: 308-311

Gavin Xiaoxu Yao, Ray C. C. Cheung, Kim Fung Man: Counter Embedded Memory architecture for trusted computing platform. International Symposium on Rapid System Prototyping 2010: 1-7

Dong-U Lee, Ray C. C. Cheung, Wayne Luk, John D. Villasenor: Hierarchical Segmentation for Hardware Function Evaluation. IEEE Trans. VLSI Syst. 17(1): 103-116 (2009)

Ray C. C. Cheung, Çetin Kaya Koç, John D. Villasenor: A High-Performance Hardware Architecture for Spectral Hash Algorithm. ASAP 2009: 215-218

Dong-U Lee, Ray C. C. Cheung, Wayne Luk, John D. Villasenor: Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations. IEEE Trans. Computers 57(5): 686-701 (2008)

Dong-U Lee, Ray C. C. Cheung, John D. Villasenor: A Flexible Architecture for Precise Gamma Correction. IEEE Trans. VLSI Syst. 15(4): 474-478 (2007)

Ray C. C. Cheung, Dong-U Lee, Wayne Luk, John D. Villasenor: Hardware Generation of Arbitrary Random Number Distributions From Uniform Distributions Via the Inversion Method. IEEE Trans. VLSI Syst. 15(8): 952-962 (2007)

William G. Osborne, Ray C. C. Cheung, José Gabriel F. Coutinho, Wayne Luk, Oskar Mencer: Automatic Accuracy-Guaranteed Bit-Width Optimization for Fixed and Floating-Point Systems. FPL 2007: 617-620

William G. Osborne, José Gabriel F. Coutinho, Ray C. C. Cheung, Wayne Luk, Oskar Mencer: Instrumented Multi-Stage Word-Length Optimization. FPT 2007: 89-96

Hongbing Fan, Yu-Liang Wu, Ray Chak-Chung Cheung, Jiping Liu: Decomposition Design Theory and Methodology for Arbitrary-Shaped Switch Boxes. IEEE Trans. Computers 55(4): 373-384 (2006)

Dong-U Lee, Altaf Abdul Gaffar, Ray C. C. Cheung, Oskar Mencer, Wayne Luk, George A. Constantinides: Accuracy-Guaranteed Bit-Width Optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 1990-2000 (2006)

Dong-U Lee, Ray C. C. Cheung, John D. Villasenor, Wayne Luk: Inversion-based hardware gaussian random number generator: A case study of function evaluation via hierarchical segmentation. FPT 2006: 33-40

Ray C. C. Cheung, N. J. Telle, Wayne Luk, Peter Y. K. Cheung: Customizable elliptic curve cryptosystems. IEEE Trans. VLSI Syst. 13(9): 1048-1059 (2005)

Ray C. C. Cheung, Dong-U Lee, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung: Automating custom-precision function evaluation for embedded processors. CASES 2005: 22-31

Ray C. C. Cheung, Wayne Luk, Peter Y. K. Cheung: Reconfigurable Elliptic Curve Cryptosystems on a Chip. DATE 2005: 24-29

Guanglie Zhang, Philip Heng Wai Leong, Dong-U Lee, John D. Villasenor, Ray C. C. Cheung, Wayne Luk: Ziggurat-based Hardware Gaussian Random Number Generator. FPL 2005: 275-280

Guanglie Zhang, Philip Heng Wai Leong, Chun Hok Ho, Kuen Hung Tsoi, Chris C. C. Cheung, Dong-U Lee, Ray C. C. Cheung, Wayne Luk: Reconfigurable Acceleration for Monte Carlo Based Financial Simulation. FPT 2005: 215-222

Ray C. C. Cheung: A System on Chip Design Framework for Prime Number Validation Using Reconfigurable Hardware. FPL 2004: 1186-1187

Ray C. C. Cheung, Ashley Brown, Wayne Luk, Peter Y. K. Cheung: A scalable hardware architecture for prime number validation. FPT 2004: 177-184

Nicolas Telle, Wayne Luk, Ray C. C. Cheung: Customising Hardware Designs for Elliptic Curve Cryptography. SAMOS 2004: 274-283

Ray C. C. Cheung, Kong-Pang Pun, Steve C. L. Yuen, Kuen Hung Tsoi, Philip Heng Wai Leong: An FPGA-based re-configurable 24-bit 96kHz sigma-delta audio DAC. FPT 2003: 110-117