| 2013 | ||
|---|---|---|
| j159 | Fang Bao, Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty, LeRoy Winemberg, Mohammad Tehranipoor: Efficient Pattern Generation for Small-Delay Defects Using Selection of Critical Faults. J. Electronic Testing 29(1): 35-48 (2013) | |
| j158 | Yan Luo, Krishnendu Chakrabarty, Tsung-Yi Ho: Error Recovery in Cyberphysical Digital Microfluidic Biochips. IEEE Trans. on CAD of Integrated Circuits and Systems 32(1): 59-72 (2013) | |
| j157 | Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Krishnendu Chakrabarty, Yu-Hua Wu: Counter-Based Output Selection for Test Response Compaction. IEEE Trans. on CAD of Integrated Circuits and Systems 32(1): 152-164 (2013) | |
| j156 | Brandon Noia, Krishnendu Chakrabarty: Pre-Bond Probing of Through-Silicon Vias in 3-D Stacked ICs. IEEE Trans. on CAD of Integrated Circuits and Systems 32(4): 547-558 (2013) | |
| j155 | Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty, Xinli Gu: Board-Level Functional Fault Diagnosis Using Artificial Neural Networks, Support-Vector Machines, and Weighted-Majority Voting. IEEE Trans. on CAD of Integrated Circuits and Systems 32(5): 723-736 (2013) | |
| c215 | Kai Hu, Bang-Ning Hsu, Andrew Madison, Krishnendu Chakrabarty, Richard B. Fair: Fault detection, real-time error recovery, and experimental demonstration for digital microfluidic biochips. DATE 2013: 559-564 | |
| c214 | Xrysovalantis Kavousianos, Krishnendu Chakrabarty: Testing for SoCs with advanced static and dynamic power-management capabilities. DATE 2013: 737-742 | |
| c213 | Sergej Deutsch, Krishnendu Chakrabarty: Non-invasive pre-bond TSV test using ring oscillators and multiple voltage levels. DATE 2013: 1065-1070 | |
| 2012 | ||
| b6 | Yang Zhao, Krishnendu Chakrabarty: Design and Testing of Digital Microfluidic Biochips. Springer 2012, isbn 978-1-4614-0369-2, pp. I-XI, 1-202 | |
| j154 | Krishnendu Chakrabarty: The Quest for High-Yield IC Manufacturing. IEEE Design & Test of Computers 29(1): 4 (2012) | |
| j153 | Krishnendu Chakrabarty: Standards, Interoperability, and Innovation in a Disaggregated IC Industry. IEEE Design & Test of Computers 29(2): 4 (2012) | |
| j152 | Krishnendu Chakrabarty: Looking ahead at the role of electronic design automation in synthetic biology [From the EIC]. IEEE Design & Test of Computers 29(3): 4 (2012) | |
| j151 | Krishnendu Chakrabarty: Electronic Design Methods and Technologies for Green Buildings. IEEE Design & Test of Computers 29(4): 4 (2012) | |
| j150 | Krishnendu Chakrabarty: Towards more digital content in wireless systems [From the EiC]. IEEE Design & Test of Computers 29(6): 4 (2012) | |
| j149 | Brandon Noia, Krishnendu Chakrabarty, Erik Jan Marinissen: Optimization Methods for Post-Bond Testing of 3D Stacked ICs. J. Electronic Testing 28(1): 103-120 (2012) | |
| j148 | Yang Zhao, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: Testing of Low-cost Digital Microfluidic Biochips with Non-Regular Array Layouts. J. Electronic Testing 28(2): 243-255 (2012) | |
| j147 | Sudip Roy, Debasis Mitra, Bhargab B. Bhattacharya, Krishnendu Chakrabarty: Congestion-aware layout design for high-throughput digital microfluidic biochips. JETC 8(3): 17 (2012) | |
| j146 | Yang Zhao, Krishnendu Chakrabarty: Simultaneous Optimization of Droplet Routing and Control-Pin Mapping to Electrodes in Digital Microfluidic Biochips. IEEE Trans. on CAD of Integrated Circuits and Systems 31(2): 242-254 (2012) | |
| j145 | Hongxia Fang, Krishnendu Chakrabarty, Zhiyuan Wang, Xinli Gu: Reproduction and Detection of Board-Level Functional Failure. IEEE Trans. on CAD of Integrated Circuits and Systems 31(4): 630-643 (2012) | |
| j144 | Yang Zhao, Krishnendu Chakrabarty: Cross-Contamination Avoidance for Droplet Routing in Digital Microfluidic Biochips. IEEE Trans. on CAD of Integrated Circuits and Systems 31(6): 817-830 (2012) | |
| j143 | Hongxia Fang, Krishnendu Chakrabarty, Zhiyuan Wang, Xinli Gu: Diagnosis of Board-Level Functional Failures Under Uncertainty Using Dempster-Shafer Theory. IEEE Trans. on CAD of Integrated Circuits and Systems 31(10): 1586-1599 (2012) | |
| j142 | Yi-Ling Hsieh, Tsung-Yi Ho, Krishnendu Chakrabarty: A Reagent-Saving Mixing Algorithm for Preparing Multiple-Target Biochemical Samples Using Digital Microfluidics. IEEE Trans. on CAD of Integrated Circuits and Systems 31(11): 1656-1669 (2012) | |
| j141 | Xrysovalantis Kavousianos, Krishnendu Chakrabarty, Arvind Jain, Rubin A. Parekhji: Test Schedule Optimization for Multicore SoCs: Handling Dynamic Voltage Scaling and Multiple Voltage Islands. IEEE Trans. on CAD of Integrated Circuits and Systems 31(11): 1754-1766 (2012) | |
| j140 | Zhaobo Zhang, Zhanglei Wang, Xinli Gu, Krishnendu Chakrabarty: Physical-Defect Modeling and Optimization for Fault-Insertion Test. IEEE Trans. VLSI Syst. 20(4): 723-736 (2012) | |
| j139 | Yang Zhao, Krishnendu Chakrabarty, Ryan Sturmer, Vamsee K. Pamula: Optimization Techniques for the Synchronization of Concurrent Fluidic Operations in Pin-Constrained Digital Microfluidic Biochips. IEEE Trans. VLSI Syst. 20(6): 1132-1145 (2012) | |
| j138 | Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. Mak: Integrated Test-Architecture Optimization and Thermal-Aware Test Scheduling for 3-D SoCs Under Pre-Bond Test-Pin-Count Constraint. IEEE Trans. VLSI Syst. 20(9): 1621-1633 (2012) | |
| j137 | Hongxia Fang, Krishnendu Chakrabarty, Abhijit Jas, Srinivas Patil, Chandra Tirumurti: Functional Test-Sequence Grading at Register-Transfer Level. IEEE Trans. VLSI Syst. 20(10): 1890-1894 (2012) | |
| c212 | Sergej Deutsch, Krishnendu Chakrabarty, Shreepad Panth, Sung Kyu Lim: TSV Stress-Aware ATPG for 3D Stacked ICs. ATS 2012: 31-36 | |
| c211 | Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty, Xinli Gu: Adaptive Board-Level Functional Fault Diagnosis Using Decision Trees. ATS 2012: 202-207 | |
| c210 | Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty, Xinli Gu: Board-Level Functional Fault Diagnosis Using Learning Based on Incremental Support-Vector Machines. ATS 2012: 208-213 | |
| c209 | Stephan Eggersglüß, Mahmut Yilmaz, Krishnendu Chakrabarty: Robust Timing-Aware Test Generation Using Pseudo-Boolean Optimization. ATS 2012: 290-295 | |
| c208 | Valerio Guarnieri, Franco Fummi, Krishnendu Chakrabarty: Reduced-Complexity Transition-Fault Test Generation for Non-scan Circuits through High-Level Mutant Injection. ATS 2012: 302-307 | |
| c207 | Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: On-Line Error Detection in Digital Microfluidic Biochips. ATS 2012: 332-337 | |
| c206 | Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: Automated path planning for washing in digital microfluidic biochips. CASE 2012: 115-120 | |
| c205 | ||
| c204 | Fangming Ye, Krishnendu Chakrabarty: TSV open defects in 3D integrated circuits: characterization, test, and optimal spare allocation. DAC 2012: 1024-1030 | |
| c203 | Naghmeh Karimi, Krishnendu Chakrabarty, Pallav Gupta, Srinivas Patil: Test generation for clock-domain crossing faults in integrated circuits. DATE 2012: 406-411 | |
| c202 | Michael Richter, Krishnendu Chakrabarty: Test pin count reduction for NoC-based Test delivery in multicore SOCs. DATE 2012: 787-792 | |
| c201 | Yan Luo, Krishnendu Chakrabarty, Tsung-Yi Ho: A cyberphysical synthesis approach for error recovery in digital microfluidic biochips. DATE 2012: 1239-1244 | |
| c200 | Xinli Gu, Jeff Rearick, Bill Eklow, Martin Keim, Jun Qian, Artur Jutman, Krishnendu Chakrabarty, Erik Larsson: Re-using chip level DFT at board level. European Test Symposium 2012: 1 | |
| c199 | Xrysovalantis Kavousianos, Krishnendu Chakrabarty, Arvind Jain, Rubin A. Parekhji: Time-division multiplexing for testing SoCs with DVS and multiple voltage islands. European Test Symposium 2012: 1-6 | |
| c198 | Zhaobo Zhang, Xinli Gu, Yaohui Xie, Zhiyuan Wang, Zhanglei Wang, Krishnendu Chakrabarty: Diagnostic system based on support-vector machines for board-level functional diagnosis. European Test Symposium 2012: 1-6 | |
| c197 | Yan Luo, Krishnendu Chakrabarty, Tsung-Yi Ho: Dictionary-based error recovery in cyberphysical digital-microfluidic biochips. ICCAD 2012: 369-376 | |
| c196 | Yi-Ling Hsieh, Tsung-Yi Ho, Krishnendu Chakrabarty: Design methodology for sample preparation on digital microfluidic biochips. ICCD 2012: 189-194 | |
| c195 | Wei-Cheng Lien, Kuen-Jong Lee, Tong-Yu Hsieh, Shih-Shiun Chien, Krishnendu Chakrabarty: Accumulator-based output selection for test response compaction. ISCAS 2012: 2313-2316 | |
| c194 | Debasis Mitra, Sudip Roy, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: On-Chip Sample Preparation with Multiple Dilutions Using Digital Microfluidics. ISVLSI 2012: 314-319 | |
| c193 | Mukesh Agrawal, Michael Richter, Krishnendu Chakrabarty: A dynamic programming solution for optimizing test delivery in multicore SOCs. ITC 2012: 1-10 | |
| c192 | Brandon Noia, Shreepad Panth, Krishnendu Chakrabarty, Sung Kyu Lim: Scan test of die logic in 3D ICs using TSV probing. ITC 2012: 1-8 | |
| c191 | Masoud Zamani, Mehdi Baradaran Tahoori, Krishnendu Chakrabarty: Ping-pong test: Compact test vector generation for reversible circuits. VTS 2012: 164-169 | |
| 2011 | ||
| b5 | Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty: Test and Diagnosis for Small-Delay Defects. Springer 2011, isbn 978-1-4419-8296-4, pp. I-XVIII, 1-212 | |
| j136 | Mahmut Yilmaz, Mohammad Tehranipoor, Krishnendu Chakrabarty: A Metric to Target Small-Delay Defects in Industrial Circuits. IEEE Design & Test of Computers 28(2): 52-61 (2011) | |
| j135 | Yang Zhao, Krishnendu Chakrabarty: Fault Diagnosis in Lab-on-Chip Using Digital Microfluidic Logic Gates. J. Electronic Testing 27(1): 69-83 (2011) | |
| j134 | Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: Test Planning in Digital Microfluidic Biochips Using Efficient Eulerization Techniques. J. Electronic Testing 27(5): 657-671 (2011) | |
| j133 | Brandon Noia, Krishnendu Chakrabarty: Test-wrapper optimisation for embedded cores in through-silicon via-based three-dimensional system on chips. IET Computers & Digital Techniques 5(3): 186-197 (2011) | |
| j132 | Tong Zhou, Romit Roy Choudhury, Peng Ning, Krishnendu Chakrabarty: P2DAP - Sybil Attacks Detection in Vehicular Ad Hoc Networks. IEEE Journal on Selected Areas in Communications 29(3): 582-594 (2011) | |
| j131 | Xrysovalantis Kavousianos, Krishnendu Chakrabarty: Generation of Compact Stuck-At Test Sets Targeting Unmodeled Defects. IEEE Trans. on CAD of Integrated Circuits and Systems 30(5): 787-791 (2011) | |
| j130 | Yang Zhao, Tao Xu, Krishnendu Chakrabarty: Broadcast Electrode-Addressing and Scheduling Methods for Pin-Constrained Digital Microfluidic Biochips. IEEE Trans. on CAD of Integrated Circuits and Systems 30(7): 986-999 (2011) | |
| j129 | Brandon Noia, Krishnendu Chakrabarty, Sandeep Kumar Goel, Erik Jan Marinissen, Jouke Verbree: Test-Architecture Optimization and Test Scheduling for TSV-Based 3-D Stacked ICs. IEEE Trans. on CAD of Integrated Circuits and Systems 30(11): 1705-1718 (2011) | |
| j128 | Zhen Chen, Krishnendu Chakrabarty, Dong Xiang: MVP: Minimum-Violations Partitioning for Reducing Capture Power in At-Speed Delay-Fault Testing. IEEE Trans. on CAD of Integrated Circuits and Systems 30(11): 1762-1767 (2011) | |
| j127 | Xrysovalantis Kavousianos, Vasileios Tenentes, Krishnendu Chakrabarty, Emmanouil Kalligeros: Defect-Oriented LFSR Reseeding to Target Unmodeled Defects Using Stuck-at Test Sets. IEEE Trans. VLSI Syst. 19(12): 2330-2335 (2011) | |
| c190 | Brandon Noia, Krishnendu Chakrabarty: Pre-bond testing of die logic and TSVs in high performance 3D-SICs. 3DIC 2011: 1-5 | |
| c189 | Uzair Shah Syed, Krishnendu Chakrabarty, Anshuman Chandra, Rohit Kapur: 3D-Scalable Adaptive Scan (3D-SAS). 3DIC 2011: 1-6 | |
| c188 | Hongxia Fang, Zhiyuan Wang, Xinli Gu, Krishnendu Chakrabarty: Deterministic test for the reproduction and detection of board-level functional failures. ASP-DAC 2011: 491-496 | |
| c187 | Naghmeh Karimi, Zhiqiu Kong, Krishnendu Chakrabarty, Pallav Gupta, Srinivas Patil: Testing of Clock-Domain Crossing Faults in Multi-core System-on-Chip. Asian Test Symposium 2011: 7-14 | |
| c186 | Xrysovalantis Kavousianos, Krishnendu Chakrabarty, Arvind Jain, Rubin A. Parekhji: Test Scheduling for Multicore SoCs with Dynamic Voltage Scaling and Multiple Voltage Islands. Asian Test Symposium 2011: 33-39 | |
| c185 | Fang Bao, Ke Peng, Krishnendu Chakrabarty, Mohammad Tehranipoor: On Generation of 1-Detect TDF Pattern Set with Significantly Increased SDD Coverage. Asian Test Symposium 2011: 120-125 | |
| c184 | Brandon Noia, Krishnendu Chakrabarty: Identification of Defective TSVs in Pre-Bond Testing of 3D ICs. Asian Test Symposium 2011: 187-194 | |
| c183 | Shida Zhong, S. Saqib Khursheed, Bashir M. Al-Hashimi, Sudhakar M. Reddy, Krishnendu Chakrabarty: Analysis of Resistive Bridge Defect Delay Behavior in the Presence of Process Variation. Asian Test Symposium 2011: 389-394 | |
| c182 | Brandon Noia, Krishnendu Chakrabarty: Testing and Design-for-Testability Techniques for 3D Integrated Circuits. Asian Test Symposium 2011: 474-479 | |
| c181 | Tsung-Yi Ho, Krishnendu Chakrabarty, Paul Pop: Digital microfluidic biochips: recent research and emerging challenges. CODES+ISSS 2011: 335-344 | |
| c180 | Krishnendu Chakrabarty, Paul Pop, Tsung-Yi Ho: Digital microfluidic biochips: functional diversity, more than moore, and cyberphysical systems. CODES+ISSS 2011: 377-378 | |
| c179 | Sudip Roy, Bhargab B. Bhattacharya, Krishnendu Chakrabarty: Waste-aware dilution and mixing of biochemical samples with digital microfluidic biochips. DATE 2011: 1059-1064 | |
| c178 | Krishnendu Chakrabarty: Testing and design-for-testability solutions for 3D integrated circuits. DDECS 2011: 5 | |
| c177 | Zhaobo Zhang, Xrysovalantis Kavousianos, Yan Luo, Yiorgos Tsiatouhas, Krishnendu Chakrabarty: Signature Analysis for Testing, Diagnosis, and Repair of Multi-mode Power Switches. European Test Symposium 2011: 13-18 | |
| c176 | Fang Bao, Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty, LeRoy Winemberg, Mohammad Tehranipoor: Critical Fault-Based Pattern Generation for Screening SDDs. European Test Symposium 2011: 177-182 | |
| c175 | Hongxia Fang, Zhiyuan Wang, Xinli Gu, Krishnendu Chakrabarty: Ranking of Suspect Faulty Blocks Using Dataflow Analysis and Dempster-Shafer Theory for the Diagnosis of Board-Level Functional Failures. European Test Symposium 2011: 195-200 | |
| c174 | Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: On residue removal in digital microfluidic biochips. ACM Great Lakes Symposium on VLSI 2011: 391-394 | |
| c173 | Krishnendu Chakrabarty, Gary Dispoto, Rick Bellamy, Jun Zeng: The role of EDA in digital print automation and infrastructure optimization. ICCAD 2011: 158-161 | |
| c172 | Tsung-Wei Huang, Tsung-Yi Ho, Krishnendu Chakrabarty: Reliability-oriented broadcast electrode-addressing for pin-constrained digital microfluidic biochips. ICCAD 2011: 448-455 | |
| c171 | Zhaobo Zhang, Xrysovalantis Kavousianos, Yiorgos Tsiatouhas, Krishnendu Chakrabarty: A BIST scheme for testing and repair of multi-mode power switches. IOLTS 2011: 115-120 | |
| c170 | ||
| c169 | ||
| c168 | Zhaobo Zhang, Krishnendu Chakrabarty, Zhanglei Wang, Zhiyuan Wang, Xinli Gu: Smart diagnosis: Efficient board-level diagnosis and repair using artificial neural networks. ITC 2011: 1-9 | |
| c167 | Krishnendu Chakrabarty: Design and optimization methods for digital microfluidic biochips: A vision for functional diversity and more than moore. SoCC 2011: 5 | |
| c166 | Sudip Roy, Bhargab B. Bhattacharya, Partha Pratim Chakrabarti, Krishnendu Chakrabarty: Layout-Aware Solution Preparation for Biochemical Analysis on a Digital Microfluidic Biochip. VLSI Design 2011: 171-176 | |
| c165 | Zhaobo Zhang, Xrysovalantis Kavousianos, Krishnendu Chakrabarty, Yiorgos Tsiatouhas: A Robust and Reconfigurable Multi-mode Power Gating Architecture. VLSI Design 2011: 280-285 | |
| 2010 | ||
| b4 | Krishnendu Chakrabarty, Tao Xu: Digital Microfluidic Biochips - Design Automation and Optimization. CRC Press 2010, isbn 978-1-4398-1915-9, pp. I-XIII, 1-199 | |
| j126 | Hongxia Fang, Krishnendu Chakrabarty, Hideo Fujiwara: RTL DFT Techniques to Enhance Defect Coverage for Functional Test Sequences. J. Electronic Testing 26(2): 151-164 (2010) | |
| j125 | Harshavardhan Sabbineni, Krishnendu Chakrabarty: An Energy-Efficient Data Delivery Scheme for Delay-Sensitive Traffic in Wireless Sensor Networks. IJDSN 2010 (2010) | |
| j124 | Harshavardhan Sabbineni, Krishnendu Chakrabarty: Datacollection in Event-Driven Wireless Sensor Networks with Mobile Sinks. IJDSN 2010 (2010) | |
| j123 | ||
| j122 | ||
| j121 | Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yuan Xie: Test-access mechanism optimization for core-based three-dimensional SOCs. Microelectronics Journal 41(10): 601-615 (2010) | |
| j120 | Yang Zhao, Krishnendu Chakrabarty: Digital Microfluidic Logic Gates and Their Application to Built-in Self-Test of Lab-on-Chip. IEEE Trans. Biomed. Circuits and Systems 4(4): 250-262 (2010) | |
| j119 | Tao Xu, Krishnendu Chakrabarty, Vamsee K. Pamula: Defect-Tolerant Design and Optimization of a Digital Microfluidic Biochip for Protein Crystallization. IEEE Trans. on CAD of Integrated Circuits and Systems 29(4): 552-565 (2010) | |
| j118 | Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor: Test-Pattern Selection for Screening Small-Delay Defects in Very-Deep Submicrometer Integrated Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 29(5): 760-773 (2010) | |
| j117 | Krishnendu Chakrabarty, Richard B. Fair, Jun Zeng: Design Tools for Digital Microfluidic Biochips: Toward Functional Diversification and More Than Moore. IEEE Trans. on CAD of Integrated Circuits and Systems 29(7): 1001-1017 (2010) | |
| j116 | S. Saqib Khursheed, Bashir M. Al-Hashimi, Krishnendu Chakrabarty, Peter Harrod: Gate-Sizing-Based Single Vdd Test for Bridge Defects in Multivoltage Designs. IEEE Trans. on CAD of Integrated Circuits and Systems 29(9): 1409-1421 (2010) | |
| j115 | Sudip Roy, Bhargab B. Bhattacharya, Krishnendu Chakrabarty: Optimization of Dilution and Mixing of Biochemical Samples Using Digital Microfluidic Biochips. IEEE Trans. on CAD of Integrated Circuits and Systems 29(11): 1696-1708 (2010) | |
| j114 | Krishnendu Chakrabarty: Design Automation and Test Solutions for Digital Microfluidic Biochips. IEEE Trans. on Circuits and Systems 57-I(1): 4-17 (2010) | |
| c164 | Yang Zhao, Krishnendu Chakrabarty: Testing of Low-Cost Digital Microfluidic Biochips with Non-regular Array Layouts. Asian Test Symposium 2010: 27-32 | |
| c163 | Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: Testing of Digital Microfluidic Biochips Using Improved Eulerization Techniques and the Chinese Postman Problem. Asian Test Symposium 2010: 111-116 | |
| c162 | Xrysovalantis Kavousianos, Krishnendu Chakrabarty, Emmanouil Kalligeros, Vasileios Tenentes: Defect Coverage-Driven Window-Based Test Compression. Asian Test Symposium 2010: 141-146 | |
| c161 | Sandeep Kumar Goel, Krishnendu Chakrabarty, Mahmut Yilmaz, Ke Peng, Mohammad Tehranipoor: Circuit Topology-Based Test Pattern Generation for Small-Delay Defects. Asian Test Symposium 2010: 307-312 | |
| c160 | Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor: A Noise-Aware Hybrid Method for SDD Pattern Grading and Selection. Asian Test Symposium 2010: 331-336 | |
| c159 | Hongxia Fang, Zhiyuan Wang, Xinli Gu, Krishnendu Chakrabarty: Mimicking of Functional State Space with Structural Tests for the Diagnosis of Board-Level Functional Failures. Asian Test Symposium 2010: 421-428 | |
| c158 | Zhaobo Zhang, Zhanglei Wang, Xinli Gu, Krishnendu Chakrabarty: Optimization and Selection of Diagnosis-Oriented Fault-Insertion Points for System Test. Asian Test Symposium 2010: 429-432 | |
| c157 | ||
| c156 | S. Balatsouka, Vasileios Tenentes, Xrysovalantis Kavousianos, Krishnendu Chakrabarty: Defect aware X-filling for low-power scan testing. DATE 2010: 873-878 | |
| c155 | Ke Peng, Mahmut Yilmaz, Mohammad Tehranipoor, Krishnendu Chakrabarty: High-quality pattern selection for screening small-delay defects considering process variations and crosstalk. DATE 2010: 1426-1431 | |
| c154 | Rishad A. Shafik, Bashir M. Al-Hashimi, Krishnendu Chakrabarty: Soft error-aware design optimization of low power and time-constrained embedded systems. DATE 2010: 1462-1467 | |
| c153 | Brandon Noia, Sandeep Kumar Goel, Krishnendu Chakrabarty, Erik Jan Marinissen, Jouke Verbree: Test-architecture optimization for TSV-based 3D stacked ICs. European Test Symposium 2010: 24-29 | |
| c152 | Zhen Chen, Krishnendu Chakrabarty, Dong Xiang: MVP: Capture-power reduction with minimum-violations partitioning for delay testing. ICCAD 2010: 149-154 | |
| c151 | Yibo Chen, Dimin Niu, Yuan Xie, Krishnendu Chakrabarty: Cost-effective integration of three-dimensional (3D) ICs emphasizing testing cost analysis. ICCAD 2010: 471-476 | |
| c150 | Tsung-Yi Ho, Jun Zeng, Krishnendu Chakrabarty: Digital microfluidic biochips: A vision for functional diversity and more than moore. ICCAD 2010: 578-585 | |
| c149 | Krishnendu Chakrabarty: Digital Microfluidic Biochips: A Vision for Functional Diversity and More Than Moore. ISVLSI 2010: 3-4 | |
| c148 | Brandon Noia, Krishnendu Chakrabarty, Erik Jan Marinissen: Optimization methods for post-bond die-internal/external testing in 3D stacked ICs. ITC 2010: 193-201 | |
| c147 | Zhaobo Zhang, Zhanglei Wang, Xinli Gu, Krishnendu Chakrabarty: Board-level fault diagnosis using an error-flow dictionary. ITC 2010: 485-494 | |
| c146 | Alodeep Sanyal, Krishnendu Chakrabarty, Mahmut Yilmaz, Hideo Fujiwara: RT-level design-for-testability and expansion of functional test sequences for enhanced defect coverage. ITC 2010: 625-634 | |
| c145 | Yang Zhao, Ryan Sturmer, Krishnendu Chakrabarty, Vamsee K. Pamula: Synchronization of Concurrently-Implemented Fluidic Operations in Pin-Constrained Digital Microfluidic Biochips. VLSI Design 2010: 69-74 | |
| c144 | Krishnendu Chakrabarty: Digital Microfluidic Biochips: A Vision for Functional Diversity and More than Moore. VLSI Design 2010: 452-457 | |
| c143 | Ke Peng, Jason Thibodeau, Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor: A novel hybrid method for SDD pattern grading and selection. VTS 2010: 45-50 | |
| c142 | ||
| c141 | Zhaobo Zhang, Zhanglei Wang, Xinli Gu, Krishnendu Chakrabarty: Board-level fault diagnosis using Bayesian inference. VTS 2010: 244-249 | |
| 2009 | ||
| j113 | Hsien-Hsin S. Lee, Krishnendu Chakrabarty: Test Challenges for 3D Integrated Circuits. IEEE Design & Test of Computers 26(5): 26-35 (2009) | |
| j112 | Bipul C. Paul, Krishnendu Chakrabarty: Advances in nanoelectronics circuits and systems [Editorial]. IET Computers & Digital Techniques 3(6): 551-552 (2009) | |
| j111 | Vincent Mao, V. Thusu, Chris Dwyer, Krishnendu Chakrabarty: Connecting fabrication defects to fault models and SPICE simulations for DNA self-assembled nanoelectronics. IET Computers & Digital Techniques 3(6): 553-569 (2009) | |
| j110 | Yang Zhao, Krishnendu Chakrabarty: On-Line Testing of Lab-on-Chip Using Reconfigurable Digital-Microfluidic Compactors. International Journal of Parallel Programming 37(4): 370-388 (2009) | |
| j109 | Xiaoxia Wu, Paul Falkenstern, Krishnendu Chakrabarty, Yuan Xie: Scan-chain design and optimization for three-dimensional integrated circuits. JETC 5(2) (2009) | |
| j108 | Bozena Kaminska, Krishnendu Chakrabarty: Guest Editorial - Selected Papers from the IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW), 2008. IEEE Trans. Biomed. Circuits and Systems 3(4): 193-194 (2009) | |
| j107 | Tao Xu, Krishnendu Chakrabarty: Fault Modeling and Functional Test Methods for Digital Microfluidic Biochips. IEEE Trans. Biomed. Circuits and Systems 3(4): 241-253 (2009) | |
| j106 | Sandeep Kumar Goel, Erik Jan Marinissen, Anuja Sehgal, Krishnendu Chakrabarty: Testing of SoCs with Hierarchical Cores: Common Fallacies, Test Access Optimization, and Test Scheduling. IEEE Trans. Computers 58(3): 409-423 (2009) | |
| j105 | Sudarshan Bahukudumbi, Krishnendu Chakrabarty: Test-Length and TAM Optimization for Wafer-Level Reduced Pin-Count Testing of Core-Based SoCs. IEEE Trans. on CAD of Integrated Circuits and Systems 28(1): 111-120 (2009) | |
| j104 | Zhanglei Wang, Hongxia Fang, Krishnendu Chakrabarty, Michael Bienek: Deviation-Based LFSR Reseeding for Test-Data Compression. IEEE Trans. on CAD of Integrated Circuits and Systems 28(2): 259-271 (2009) | |
| j103 | Zhanglei Wang, Krishnendu Chakrabarty, Seongmoon Wang: Integrated LFSR Reseeding, Test-Access Optimization, and Test Scheduling for Core-Based System-on-Chip. IEEE Trans. on CAD of Integrated Circuits and Systems 28(8): 1251-1264 (2009) | |
| j102 | Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty: SOC test-architecture optimization for the testing of embedded cores and signal-integrity faults on core-external interconnects. ACM Trans. Design Autom. Electr. Syst. 14(1) (2009) | |
| j101 | Sudarshan Bahukudumbi, Sule Ozev, Krishnendu Chakrabarty, Vikram Iyengar: Wafer-Level Defect Screening for "Big-D/Small-A" Mixed-Signal SoCs. IEEE Trans. VLSI Syst. 17(4): 587-592 (2009) | |
| j100 | Sudarshan Bahukudumbi, Krishnendu Chakrabarty: Power Management Using Test-Pattern Ordering for Wafer-Level Test During Burn-In. IEEE Trans. VLSI Syst. 17(12): 1730-1741 (2009) | |
| c140 | Thomas Edison Yu, Tomokazu Yoneda, Krishnendu Chakrabarty, Hideo Fujiwara: Test infrastructure design for core-based system-on-chip under cycle-accurate thermal constraints. ASP-DAC 2009: 793-798 | |
| c139 | Hongxia Fang, Krishnendu Chakrabarty, Rubin A. Parekhji: Bit-Operation-Based Seed Augmentation for LFSR Reseeding with High Defect Coverage. Asian Test Symposium 2009: 331-336 | |
| c138 | Dong Xiang, Boxue Yin, Krishnendu Chakrabarty: Compact Test Generation for Small-Delay Defects Using Testable-Path Information. Asian Test Symposium 2009: 424-429 | |
| c137 | Tong Zhou, Romit Roy Choudhury, Krishnendu Chakrabarty: Diverse Routing: Exploiting Social Behavior for Routing in Delay-Tolerant Networks. CSE (4) 2009: 1115-1122 | |
| c136 | Xrysovalantis Kavousianos, Krishnendu Chakrabarty: Generation of compact test sets with high defect coverage. DATE 2009: 1130-1135 | |
| c135 | ||
| c134 | Mahmut Yilmaz, Krishnendu Chakrabarty: Seed selection in LFSR-reseeding-based test compression for the detection of small-delay defects. DATE 2009: 1488-1493 | |
| c133 | Lara D. Oliver, Krishnendu Chakrabarty, Hisham Z. Massoud: Dual-threshold pass-transistor logic design. ACM Great Lakes Symposium on VLSI 2009: 291-296 | |
| c132 | Hongxia Fang, Krishnendu Chakrabarty, Hideo Fujiwara: RTL DFT techniques to enhance defect coverage for functional test sequences. HLDVT 2009: 160-165 | |
| c131 | Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. Mak: Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint. ICCAD 2009: 191-196 | |
| c130 | Brandon Noia, Krishnendu Chakrabarty, Yuan Xie: Test-wrapper optimization for embedded cores in TSV-based three-dimensional SOCs. ICCD 2009: 70-77 | |
| c129 | ||
| c128 | Zhaobo Zhang, Zhanglei Wang, Xinli Gu, Krishnendu Chakrabarty: Physical defect modeling for fault insertion in system reliability test. ITC 2009: 1-10 | |
| c127 | Hongxia Fang, Krishnendu Chakrabarty, Abhijit Jas, Srinivas Patil, Chandra Tirumurti: RT-Level Deviation-Based Grading of Functional Test Sequences. VTS 2009: 264-269 | |
| c126 | ||
| 2008 | ||
| j99 | Philip Y. Paik, Vamsee K. Pamula, Krishnendu Chakrabarty: A Digital-Microfluidic Approach to Chip Cooling. IEEE Design & Test of Computers 25(4): 372-381 (2008) | |
| j98 | Nabil Badereddine, Zhanglei Wang, Patrick Girard, Krishnendu Chakrabarty, Arnaud Virazel, Serge Pravossoudovitch, Christian Landrault: A Selective Scan Slice Encoding Technique for Test Data Volume and Test Power Reduction. J. Electronic Testing 24(4): 353-364 (2008) | |
| j97 | Thomas Edison Yu, Tomokazu Yoneda, Krishnendu Chakrabarty, Hideo Fujiwara: Thermal-Aware Test Access Mechanism and Wrapper Design Optimization for System-on-Chips. IEICE Transactions 91-D(10): 2440-2448 (2008) | |
| j96 | ||
| j95 | R. Iris Bahar, Krishnendu Chakrabarty: Introduction to joint ACM JETC/TODAES special issue on new, emerging, and specialized technologies. JETC 4(2) (2008) | |
| j94 | ||
| j93 | ||
| j92 | Tao Xu, Krishnendu Chakrabarty, Fei Su: Defect-Aware High-Level Synthesis and Module Placement for Microfluidic Biochips. IEEE Trans. Biomed. Circuits and Systems 2(1): 50-62 (2008) | |
| j91 | Zhanglei Wang, Krishnendu Chakrabarty: Test-Quality/Cost Optimization Using Output-Deviation-Based Reordering of Test Patterns. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 352-365 (2008) | |
| j90 | Soheil Samii, Mikko Selkälä, Erik Larsson, Krishnendu Chakrabarty, Zebo Peng: Cycle-Accurate Test Power Modeling and Its Application to SoC Test Architecture Design and Scheduling. IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 973-977 (2008) | |
| j89 | Dong Xiang, Yang Zhao, Krishnendu Chakrabarty, Hideo Fujiwara: A Reconfigurable Scan Architecture With Weighted Scan-Enable Signals for Deterministic BIST. IEEE Trans. on CAD of Integrated Circuits and Systems 27(6): 999-1012 (2008) | |
| j88 | Tao Xu, Krishnendu Chakrabarty: A Droplet-Manipulation Method for Achieving High-Throughput in Cross-Referencing-Based Digital Microfluidic Biochips. IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 1905-1917 (2008) | |
| j87 | R. Iris Bahar, Krishnendu Chakrabarty: Introduction to joint ACM JETC/TODAES special issue on new, emerging, and specialized technologies. ACM Trans. Design Autom. Electr. Syst. 13(2) (2008) | |
| j86 | Anuja Sehgal, Sudarshan Bahukudumbi, Krishnendu Chakrabarty: Power-aware SoC test planning for effective utilization of port-scalable testers. ACM Trans. Design Autom. Electr. Syst. 13(3) (2008) | |
| j85 | Philip Y. Paik, Vamsee K. Pamula, Krishnendu Chakrabarty: Adaptive Cooling of Integrated Circuits Using Digital Microfluidics. IEEE Trans. VLSI Syst. 16(4): 432-443 (2008) | |
| j84 | Zhanglei Wang, Krishnendu Chakrabarty: Test Data Compression Using Selective Encoding of Scan Slices. IEEE Trans. VLSI Syst. 16(11): 1429-1440 (2008) | |
| c125 | ||
| c124 | Anders Larsson, Erik Larsson, Krishnendu Chakrabarty, Petru Eles, Zebo Peng: Test-Architecture Optimization and Test Scheduling for SOCs with Core-Level Expansion of Compressed Test Patterns. DATE 2008: 188-193 | |
| c123 | Sudarshan Bahukudumbi, Krishnendu Chakrabarty, Richard Kacprowicz: Test Scheduling for Wafer-Level Test-During-Burn-In of Core-Based SoCs. DATE 2008: 1103-1106 | |
| c122 | Tao Xu, Krishnendu Chakrabarty, Vamsee K. Pamula: Design and optimization of a digital microfluidic biochip for protein crystallization. ICCAD 2008: 297-301 | |
| c121 | Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yuan Xie: Test-access mechanism optimization for core-based three-dimensional SOCs. ICCD 2008: 212-218 | |
| c120 | Yang Zhao, Krishnendu Chakrabarty: On-Line Testing of Lab-on-Chip Using Digital Microfluidic Compactors. IOLTS 2008: 213-218 | |
| c119 | ||
| c118 | Anders Larsson, Xin Zhang, Erik Larsson, Krishnendu Chakrabarty: SOC Test Optimization with Compression-Technique Selection. ITC 2008: 1 | |
| c117 | Vincent Mao, Chris Dwyer, Krishnendu Chakrabarty: Fabrication Defects and Fault Models for DNA Self-Assembled Nanoelectronics. ITC 2008: 1-10 | |
| c116 | Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yuan Xie: Test-Access Solutions for Three-Dimensional SOCs. ITC 2008: 1 | |
| c115 | Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor: Interconnect-Aware and Layout-Oriented Test-Pattern Selection for Small-Delay Defects. ITC 2008: 1-10 | |
| c114 | ||
| c113 | ||
| c112 | Sudarshan Bahukudumbi, Krishnendu Chakrabarty: Test-Pattern Ordering for Wafer-Level Test-During-Burn-In. VTS 2008: 193-198 | |
| c111 | Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor: Test-Pattern Grading and Pattern Selection for Small-Delay Defects. VTS 2008: 233-239 | |
| 2007 | ||
| b3 | Krishnendu Chakrabarty, Fei Su: Digital Microfluidic Biochips - Synthesis, Testing, and Reconfiguration Techniques. CRC Press 2007, isbn 978-0-8493-9009-8, pp. 1-228 | |
| j83 | Krishnendu Chakrabarty, Roland Thewes: Guest Editors' Introduction: Biochips and Integrated Biosensor Platforms. IEEE Design & Test of Computers 24(1): 8-9 (2007) | |
| j82 | Zhanglei Wang, Krishnendu Chakrabarty: Built-in Self-test and Defect Tolerance in Molecular Electronics-based Nanofabrics. J. Electronic Testing 23(2-3): 145-161 (2007) | |
| j81 | Fei Su, William L. Hwang, Arindam Mukherjee, Krishnendu Chakrabarty: Testing and Diagnosis of Realistic Defects in Digital Microfluidic Biochips. J. Electronic Testing 23(2-3): 219-233 (2007) | |
| j80 | ||
| j79 | ||
| j78 | Tao Xu, William L. Hwang, Fei Su, Krishnendu Chakrabarty: Automated design of pin-constrained digital microfluidic biochips under droplet-interference constraints. JETC 3(3) (2007) | |
| j77 | Tao Xu, Krishnendu Chakrabarty: Parallel Scan-Like Test and Multiple-Defect Diagnosis for Digital Microfluidic Biochips. IEEE Trans. Biomed. Circuits and Systems 1(2): 148-158 (2007) | |
| j76 | Anuja Sehgal, Krishnendu Chakrabarty: Optimization of Dual-Speed TAM Architectures for Efficient Modular Testing of SOCs. IEEE Trans. Computers 56(1): 120-133 (2007) | |
| j75 | Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty: Test Wrapper Design and Optimization Under Power Constraints for Embedded Cores With Multiple Clock Domains. IEEE Trans. on CAD of Integrated Circuits and Systems 26(8): 1539-1547 (2007) | |
| j74 | Yi Zou, Krishnendu Chakrabarty: Distributed Mobility Management for Target Tracking in Mobile Sensor Networks. IEEE Trans. Mob. Comput. 6(8): 872-887 (2007) | |
| j73 | Lei Li, Zhanglei Wang, Krishnendu Chakrabarty: Scan-BIST based on cluster analysis and the encoding of repeating sequences. ACM Trans. Design Autom. Electr. Syst. 12(1) (2007) | |
| j72 | Sudarshan Bahukudumbi, Krishnendu Chakrabarty: Wafer-Level Modular Testing of Core-Based SoCs. IEEE Trans. VLSI Syst. 15(10): 1144-1154 (2007) | |
| c110 | Sudarshan Bahukudumbi, Sule Ozev, Krishnendu Chakrabarty, Vikram Iyengar: AWafer-Level Defect Screening Technique to Reduce Test and Packaging Costs for "Big-D/Small-A" Mixed-Signal SoCs. ASP-DAC 2007: 823-828 | |
| c109 | Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty: SOC Test Architecture Optimization for Signal Integrity Faults on Core-External Interconnects. DAC 2007: 676-681 | |
| c108 | ||
| c107 | Zhanglei Wang, Krishnendu Chakrabarty, Seongmoon Wang: SoC testing using LFSR reseeding, and scan-slice-based TAM optimization and test scheduling. DATE 2007: 201-206 | |
| c106 | ||
| c105 | ||
| c104 | Tao Xu, Krishnendu Chakrabarty: Parallel Scan-Like Testing and Fault Diagnosis Techniques for Digital Microfluidic Biochips. European Test Symposium 2007: 63-68 | |
| c103 | Zhanglei Wang, Krishnendu Chakrabarty, Michael Bienek: A Seed-Selection Method to Increase Defect Coverage for LFSR-Reseeding-Based Test Compression. European Test Symposium 2007: 125-130 | |
| c102 | ||
| c101 | Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty: Test-wrapper designs for the detection of signal-integrity faults on core-external interconnects of SoCs. ITC 2007: 1-9 | |
| c100 | Tong Zhou, Romit Roy Choudhury, Peng Ning, Krishnendu Chakrabarty: Privacy-Preserving Detection of Sybil Attacks in Vehicular Ad Hoc Networks. MobiQuitous 2007: 1-8 | |
| c99 | Amit Kumar, Krishnendu Chakrabarty, Chunduri Rama Mohan: An ECO Technique for Removing Crosstalk Violations in Clock Networks. VLSI Design 2007: 283-288 | |
| c98 | Sudarshan Bahukudumbi, Krishnendu Chakrabarty: Test-Length Selection and TAM Optimization for Wafer-Level, Reduced Pin-Count Testing of Core-Based Digital SoCs. VLSI Design 2007: 459-464 | |
| c97 | Tao Xu, Krishnendu Chakrabarty, Fei Su: Defect-Aware Synthesis of Droplet-Based Microfluidic Biochips. VLSI Design 2007: 647-652 | |
| i4 | Fei Su, Krishnendu Chakrabarty, Vamsee K. Pamula: Yield Enhancement of Digital Microfluidics-Based Biochips Using Space Redundancy and Local Reconfiguration. CoRR abs/0710.4672 (2007) | |
| i3 | Fei Su, Krishnendu Chakrabarty: Design of Fault-Tolerant and Dynamically-Reconfigurable Microfluidic Biochips. CoRR abs/0710.4673 (2007) | |
| i2 | Anuja Sehgal, Fang Liu, Sule Ozev, Krishnendu Chakrabarty: Test Planning for Mixed-Signal SOCs with Wrapped Analog Cores. CoRR abs/0710.4686 (2007) | |
| i1 | Paul M. Rosinger, Bashir M. Al-Hashimi, Krishnendu Chakrabarty: Rapid Generation of Thermal-Safe Test Schedules. CoRR abs/0710.4797 (2007) | |
| 2006 | ||
| j71 | Fei Su, Sule Ozev, Krishnendu Chakrabarty: Test Planning and Test Resource Optimization for Droplet-Based Microfluidic Systems. J. Electronic Testing 22(2): 199-210 (2006) | |
| j70 | ||
| j69 | Ying Zhang, Krishnendu Chakrabarty: A unified approach for fault tolerance and dynamic power management in fixed-priority real-time embedded systems. IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 111-125 (2006) | |
| j68 | Fei Su, Krishnendu Chakrabarty, Richard B. Fair: Microfluidics-Based Biochips: Technology Issues, Implementation Platforms, and Design-Automation Challenges. IEEE Trans. on CAD of Integrated Circuits and Systems 25(2): 211-223 (2006) | |
| j67 | Paul M. Rosinger, Bashir M. Al-Hashimi, Krishnendu Chakrabarty: Thermal-Safe Test Scheduling for Core-Based System-on-Chip Integrated Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 25(11): 2502-2512 (2006) | |
| j66 | Fei Su, Krishnendu Chakrabarty: Defect Tolerance Based on Graceful Degradation and Dynamic Reconfiguration for Digital Microfluidics-Based Biochips. IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2944-2953 (2006) | |
| j65 | Fei Su, Sule Ozev, Krishnendu Chakrabarty: Concurrent testing of digital microfluidics-based biochips. ACM Trans. Design Autom. Electr. Syst. 11(2): 442-464 (2006) | |
| j64 | Fei Su, Krishnendu Chakrabarty: Module placement for fault-tolerant microfluidics-based biochips. ACM Trans. Design Autom. Electr. Syst. 11(3): 682-710 (2006) | |
| j63 | Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty: Test infrastructure design for mixed-signal SOCs with wrapped analog cores. IEEE Trans. VLSI Syst. 14(3): 292-304 (2006) | |
| c96 | Tao Xu, Krishnendu Chakrabarty: Droplet-trace-based array partitioning and a pin assignment algorithm for the automated design of digital microfluidic biochips. CODES+ISSS 2006: 112-117 | |
| c95 | William L. Hwang, Fei Su, Krishnendu Chakrabarty: Automated design of pin-constrained digital microfluidic arrays for lab-on-a-chip applications*. DAC 2006: 925-930 | |
| c94 | Anuja Sehgal, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty: Hierarchy-aware and area-efficient test infrastructure design for core-based system chips. DATE 2006: 285-290 | |
| c93 | Fei Su, William L. Hwang, Krishnendu Chakrabarty: Droplet routing in the synthesis of digital microfluidic biochips. DATE 2006: 323-328 | |
| c92 | Zhanglei Wang, Krishnendu Chakrabarty, Michael Gössel: Test set enrichment using a probabilistic fault model and the theory of output deviations. DATE 2006: 1270-1275 | |
| c91 | ||
| c90 | Lara D. Oliver, Krishnendu Chakrabarty, Hisham Z. Massoud: An evaluation of the impact of gate oxide tunneling on dual-Vt-based leakage reduction techniques. ACM Great Lakes Symposium on VLSI 2006: 105-110 | |
| c89 | Krishnendu Chakrabarty: Automated Design of Microfluidics-Based Biochips: Connecting Biochemistry to Electronics CAD. ICCD 2006 | |
| c88 | Sudarshan Bahukudumbi, Krishnendu Chakrabarty: Defect-Oriented and Time-Constrained Wafer-Level Test-Length Selection for Core-Based Digital SoCs. ITC 2006: 1-10 | |
| c87 | Soheil Samii, Erik Larsson, Krishnendu Chakrabarty, Zebo Peng: Cycle-Accurate Test Power Modeling and its Application to SoC Test Scheduling. ITC 2006: 1-10 | |
| c86 | ||
| 2005 | ||
| b2 | Krishnendu Chakrabarty, S. Sitharama Iyengar: Scalable infrastructure for distributed sensor networks. Springer 2005, isbn 978-1-85233-951-7, pp. I-XIV, 1-194 | |
| j62 | ||
| j61 | Harshavardhan Sabbineni, Krishnendu Chakrabarty: Location-Aided Flooding: An Energy-Efficient Data Dissemination Protocol for Wireless Sensor Networks. IEEE Trans. Computers 54(1): 36-46 (2005) | |
| j60 | Yi Zou, Krishnendu Chakrabarty: A Distributed Coverage- and Connectivity-Centric Technique for Selecting Active Nodes in Wireless Sensor Networks. IEEE Trans. Computers 54(8): 978-991 (2005) | |
| j59 | Krishnendu Chakrabarty, Vikram Iyengar, Mark D. Krasniewski: Test planning for modular testing of hierarchical SOCs. IEEE Trans. on CAD of Integrated Circuits and Systems 24(3): 435-448 (2005) | |
| j58 | Vishnu Swaminathan, Krishnendu Chakrabarty: Pruning-based, energy-optimal, deterministic I/O device scheduling for hard real-time systems. ACM Trans. Embedded Comput. Syst. 4(1): 141-167 (2005) | |
| j57 | Mohammad Tehranipoor, Mehrdad Nourani, Krishnendu Chakrabarty: Nine-coded compression technique for testing embedded cores in SoCs. IEEE Trans. VLSI Syst. 13(6): 719-731 (2005) | |
| j56 | Chunsheng Liu, Krishnendu Chakrabarty: Design and analysis of compact dictionaries for diagnosis in scan-BIST. IEEE Trans. VLSI Syst. 13(8): 979-984 (2005) | |
| c85 | Yasumi Doi, Seiji Kajihara, Xiaoqing Wen, Lei Li, Krishnendu Chakrabarty: Test compression for scan circuits using scan polarity adjustment and pinpoint test relaxation. ASP-DAC 2005: 59-64 | |
| c84 | Krishnendu Chakrabarty, Fei Su: System-level design automation tools for digital microfluidic biochips. CODES+ISSS 2005: 201-206 | |
| c83 | Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty: Multi-frequency wrapper design and optimization for embedded cores under average power constraints. DAC 2005: 123-128 | |
| c82 | ||
| c81 | Anuja Sehgal, Fang Liu, Sule Ozev, Krishnendu Chakrabarty: Test Planning for Mixed-Signal SOCs with Wrapped Analog Cores. DATE 2005: 50-55 | |
| c80 | Paul M. Rosinger, Bashir M. Al-Hashimi, Krishnendu Chakrabarty: Rapid Generation of Thermal-Safe Test Schedules. DATE 2005: 840-845 | |
| c79 | ||
| c78 | Fei Su, Krishnendu Chakrabarty, Vamsee K. Pamula: Yield Enhancement of Digital Microfluidics-Based Biochips Using Space Redundancy and Local Reconfiguration. DATE 2005: 1196-1201 | |
| c77 | ||
| c76 | Yi Zou, Krishnendu Chakrabarty: Fault-Tolerant Self-organization in Sensor Networks. DCOSS 2005: 191-205 | |
| c75 | Enkelejda Tafaj, Paul M. Rosinger, Bashir M. Al-Hashimi, Krishnendu Chakrabarty: Improving Thermal-Safe Test Scheduling for Core-Based Systems-on-Chip Using Shift Frequency Scaling. DFT 2005: 544-551 | |
| c74 | Anuja Sehgal, Krishnendu Chakrabarty: Test planning for the effective utilization of port-scalable testers for heterogeneous core-based SOCs. ICCAD 2005: 88-93 | |
| c73 | Krishnendu Chakrabarty, J. E. Chen: A cocktail approach on random access scan toward low power and high efficiency test. ICCAD 2005: 94-99 | |
| c72 | Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty: A Flexible Design Methodology for Analog Test Wrappers in Mixed-Signal SOCs. ICCD 2005: 137-142 | |
| c71 | Fei Su, William L. Hwang, Arindam Mukherjee, Krishnendu Chakrabarty: Defect-oriented testing and diagnosis of digital microfluidics-based biochips. ITC 2005: 10 | |
| c70 | Zhanglei Wang, Krishnendu Chakrabarty: Using built-in self-test and adaptive recovery for defect tolerance in molecular electronics-based nanofabrics. ITC 2005: 10 | |
| c69 | Zhanglei Wang, Krishnendu Chakrabarty: Test data compression for IP embedded cores using selective encoding of scan slices. ITC 2005: 10 | |
| c68 | Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Shivakumar Swaminathan: Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores. VLSI Design 2005: 53-58 | |
| c67 | Krishnendu Chakrabarty: Design, Testing, and Applications of Digital Microfluidics-Based Biochips. VLSI Design 2005: 221-226 | |
| c66 | ||
| 2004 | ||
| j55 | Anshuman Chandra, Krishnendu Chakrabarty: Analysis of Test Application Time for Test Data Compression Methods Based on Compression Codes. J. Electronic Testing 20(2): 199-212 (2004) | |
| j54 | Michael Gössel, Krishnendu Chakrabarty, Vitalij Ocheretnij, Andreas Leininger: A Signature Analysis Technique for the Identification of Failing Vectors with Application to Scan-BIST. J. Electronic Testing 20(6): 611-622 (2004) | |
| j53 | Lei Li, Krishnendu Chakrabarty: On Using Exponential-Golomb Codes and Subexponential Codes for System-on-a-Chip Test Data Compression. J. Electronic Testing 20(6): 667-670 (2004) | |
| j52 | Yi Zou, Krishnendu Chakrabarty: Uncertainty-aware and coverage-oriented deployment for sensor networks. J. Parallel Distrib. Comput. 64(7): 788-798 (2004) | |
| j51 | Chunsheng Liu, Krishnendu Chakrabarty: Compact Dictionaries for Fault Diagnosis in Scan-BIST. IEEE Trans. Computers 53(6): 775-780 (2004) | |
| j50 | Tianhao Zhang, Krishnendu Chakrabarty, Richard B. Fair: Behavioral modeling and performance evaluation of microelectrofluidics-based PCR systems using SystemC. IEEE Trans. on CAD of Integrated Circuits and Systems 23(6): 843-858 (2004) | |
| j49 | Lei Li, Krishnendu Chakrabarty: Test set embedding for deterministic BIST using a reconfigurable interconnection network. IEEE Trans. on CAD of Integrated Circuits and Systems 23(9): 1289-1305 (2004) | |
| j48 | Vishnu Swaminathan, Krishnendu Chakrabarty: Network flow techniques for dynamic voltage scaling in hard real-time systems. IEEE Trans. on CAD of Integrated Circuits and Systems 23(10): 1385-1398 (2004) | |
| j47 | Chunsheng Liu, Krishnendu Chakrabarty: Identification of error-capturing scan cells in scan-BIST with applications to system-on-chip. IEEE Trans. on CAD of Integrated Circuits and Systems 23(10): 1447-1459 (2004) | |
| j46 | Yi Zou, Krishnendu Chakrabarty: Sensor deployment and target localization in distributed sensor networks. ACM Trans. Embedded Comput. Syst. 3(1): 61-91 (2004) | |
| j45 | Ying Zhang, Krishnendu Chakrabarty: Dynamic adaptation for fault tolerance and power management in embedded real-time systems. ACM Trans. Embedded Comput. Syst. 3(2): 336-360 (2004) | |
| j44 | Qishi Wu, Nageswara S. V. Rao, Jacob Barhen, S. Sitharama Iyengar, Vijay K. Vaishnavi, Hairong Qi, Krishnendu Chakrabarty: On Computing Mobile Agent Routes for Data Fusion in Distributed Sensor Networks. IEEE Trans. Knowl. Data Eng. 16(6): 740-753 (2004) | |
| j43 | Anuja Sehgal, Vikram Iyengar, Krishnendu Chakrabarty: SOC test planning using virtual test access architectures. IEEE Trans. VLSI Syst. 12(12): 1263-1276 (2004) | |
| c65 | Ying Zhang, Robert P. Dick, Krishnendu Chakrabarty: Energy-aware deterministic fault tolerance in distributed real-time embedded systems. DAC 2004: 550-555 | |
| c64 | Anuja Sehgal, Krishnendu Chakrabarty: Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures. DATE 2004: 422-427 | |
| c63 | Ying Zhang, Krishnendu Chakrabarty: Task Feasibility Analysis and Dynamic Voltage Scaling in Fault-Tolerant Real-Time Embedded Systems. DATE 2004: 1170-1175 | |
| c62 | Mohammad H. Tehranipour, Mehrdad Nourani, Krishnendu Chakrabarty: Nine-Coded Compression Technique with Application to Reduced Pin-Count Testing and Flexible On-Chip Decompression. DATE 2004: 1284-1289 | |
| c61 | Fei Su, Krishnendu Chakrabarty: Architectural-level synthesis of digital microfluidics-based biochips. ICCAD 2004: 223-228 | |
| c60 | Chunsheng Liu, Kumar N. Dwarakanath, Krishnendu Chakrabarty, Ronald D. Blanton: Compact Dictionaries for Diagnosis of Unmodeled Faults in Scan-BIST. ISVLSI 2004: 173-178 | |
| c59 | ||
| c58 | Anuja Sehgal, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty: IEEE P1500-Compliant Test Wrapper Design for Hierarchical Cores. ITC 2004: 1203-1212 | |
| 2003 | ||
| j42 | Yi Zou, Krishnendu Chakrabarty: Target localization based on energy considerations in distributed sensor networks. Ad Hoc Networks 1(2-3): 261-272 (2003) | |
| j41 | Anshuman Chandra, Krishnendu Chakrabarty: Test Data Compression and Test Resource Partitioning for System-on-a-Chip Using Frequency-Directed Run-Length (FDR) Codes. IEEE Trans. Computers 52(8): 1076-1088 (2003) | |
| j40 | Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Test Access Mechanism Optimization, Test Scheduling, and Tester Data Volume Reduction for System-on-Chip. IEEE Trans. Computers 52(12): 1619-1632 (2003) | |
| j39 | Anshuman Chandra, Krishnendu Chakrabarty: A unified approach to reduce SOC test data volume, scan power and testing time. IEEE Trans. on CAD of Integrated Circuits and Systems 22(3): 352-363 (2003) | |
| j38 | Chunsheng Liu, Krishnendu Chakrabarty: Failing vector identification based on overlapping intervals of test vectors in a scan-BIST environment. IEEE Trans. on CAD of Integrated Circuits and Systems 22(5): 593-604 (2003) | |
| j37 | Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Efficient test access mechanism optimization for system-on-chip. IEEE Trans. on CAD of Integrated Circuits and Systems 22(5): 635-643 (2003) | |
| j36 | Vishnu Swaminathan, Krishnendu Chakrabarty: Energy-conscious, deterministic I/O device scheduling in hard real-time systems. IEEE Trans. on CAD of Integrated Circuits and Systems 22(7): 847-858 (2003) | |
| j35 | Krishnendu Chakrabarty, Markus Seuring: Space compaction of test responses using orthogonal transmission functions [logic testing]. IEEE T. Instrumentation and Measurement 52(5): 1353-1362 (2003) | |
| j34 | Sunil R. Das, M. Sudarma, Mansour H. Assaf, Emil M. Petriu, Wen-Ben Jone, Krishnendu Chakrabarty, Mehmet Sahinoglu: Parity bit signature in response data compaction and built-in self-testing of VLSI circuits with nonexhaustive test sets. IEEE T. Instrumentation and Measurement 52(5): 1363-1380 (2003) | |
| j33 | Lei Li, Krishnendu Chakrabarty, Nur A. Touba: Test data compression using dictionaries with selective entries and fixed-length indices. ACM Trans. Design Autom. Electr. Syst. 8(4): 470-490 (2003) | |
| c57 | Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski, Krishnendu Chakrabarty: Test cost reduction for SOCs using virtual TAMs and lagrange multipliers. DAC 2003: 738-743 | |
| c56 | Dhiraj K. Pradhan, Chunsheng Liu, Krishnendu Chakrabarty: EBIST: A Novel Test Generator with Built-In Fault Detection Capability. DATE 2003: 10224-10229 | |
| c55 | Chunsheng Liu, Krishnendu Chakrabarty: A Partition-Based Approach for Identifying Failing Scan Cells in Scan-BIST with Applications to System-on-Chip Fault Diagnosis. DATE 2003: 10230-10237 | |
| c54 | Ying Zhang, Krishnendu Chakrabarty: Energy-Aware Adaptive Checkpointing in Embedded Real-Time Systems. DATE 2003: 10918-10925 | |
| c53 | Vikram Iyengar, Anshuman Chandra, Sharon Schweizer, Krishnendu Chakrabarty: A Unified Approach for SOC Testing Using Test Data Compression and TAM Optimization. DATE 2003: 11188-11190 | |
| c52 | Ying Zhang, Krishnendu Chakrabarty: Fault Recovery Based on Checkpointing for Hard Real-Time Embedded Systems. DFT 2003: 320-327 | |
| c51 | Yi Zou, Krishnendu Chakrabarty: Uncertainty-aware sensor deployment algorithms for surveillance applications. GLOBECOM 2003: 2972-2976 | |
| c50 | Vamsee K. Pamula, Krishnendu Chakrabarty: Cooling of integrated circuits using droplet-based microfluidics. ACM Great Lakes Symposium on VLSI 2003: 84-87 | |
| c49 | Vishnu Swaminathan, Krishnendu Chakrabarty: Generalized Network Flow Techniques for Dynamic Voltage Scaling in Hard Real-Time Systems. ICCAD 2003: 21-25 | |
| c48 | Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty: TAM Optimization for Mixed-Signal SOCs using Analog Test Wrappers. ICCAD 2003: 95-99 | |
| c47 | Ying Zhang, Krishnendu Chakrabarty, Vishnu Swaminathan: Energy-Aware Fault Tolerance in Fixed-Priority Real-Time Embedded Systems. ICCAD 2003: 209-214 | |
| c46 | Seiji Kajihara, Yasumi Doi, Lei Li, Krishnendu Chakrabarty: On Combining Pinpoint Test Set Relaxation and Run-Length Codes for Reducing Test Data Volume. ICCD 2003: 387-396 | |
| c45 | Yi Zou, Krishnendu Chakrabarty: Sensor Deployment and Target Localization Based on Virtual Forces. INFOCOM 2003 | |
| c44 | Chunsheng Liu, Krishnendu Chakrabarty: Compact Dictionaries for Fault Diagnosis in BIST. ISQED 2003: 105-110 | |
| c43 | ||
| c42 | ||
| c41 | Yi Zou, Krishnendu Chakrabarty: Energy-Aware Target Localization in Wireless Sensor Networks. PerCom 2003: 60- | |
| c40 | ||
| c39 | Vikram Iyengar, Krishnendu Chakrabarty, Mark D. Krasniewski, Gopind N. Kumar: Design and Optimization of Multi-level TAM Architectures for Hierarchical SOCs. VTS 2003: 299-312 | |
| c38 | Santpal Singh Dhillon, Krishnendu Chakrabarty: Sensor placement for effective coverage and surveillance in distributed sensor networks. WCNC 2003: 1609-1614 | |
| 2002 | ||
| b1 | Krishnendu Chakrabarty, Vikram Iyengar, Anshuman Chandra: Test Resource Partitioning for System-on-a-Chip. Frontiers in electronic testing 20, Kluwer / Springer 2002, isbn 978-1-4020-7119-5, pp. I-XII, 1-232 | |
| j32 | Krishnendu Chakrabarty, Erik Jan Marinissen: How Useful are the ITC 02 SoC Test Benchmarks? IEEE Design & Test of Computers 19(5): 120, 119 (2002) | |
| j31 | Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Test Wrapper and Test Access Mechanism Co-Optimization for System-on-Chip. J. Electronic Testing 18(2): 213-230 (2002) | |
| j30 | ||
| j29 | Hairong Qi, Xiaoling Wang, S. Sitharama Iyengar, Krishnendu Chakrabarty: High Performance Sensor Integration in Distributed Sensor Networks Using Mobile Agents. IJHPCA 16(3): 325-335 (2002) | |
| j28 | Vikram Iyengar, Krishnendu Chakrabarty: Test Bus Sizing for System-on-a-Chip. IEEE Trans. Computers 51(5): 449-459 (2002) | |
| j27 | Krishnendu Chakrabarty, S. Sitharama Iyengar, Hairong Qi, Eungchun Cho: Grid Coverage for Surveillance and Target Location in Distributed Sensor Networks. IEEE Trans. Computers 51(12): 1448-1453 (2002) | |
| j26 | Anshuman Chandra, Krishnendu Chakrabarty: Low-power scan testing and test data compression forsystem-on-a-chip. IEEE Trans. on CAD of Integrated Circuits and Systems 21(5): 597-604 (2002) | |
| j25 | Anshuman Chandra, Krishnendu Chakrabarty: Test data compression and decompression based on internal scanchains and Golomb coding. IEEE Trans. on CAD of Integrated Circuits and Systems 21(6): 715-722 (2002) | |
| j24 | Tianhao Zhang, Krishnendu Chakrabarty, Richard B. Fair: Design of reconfigurable composite microsystems based on hardware/software codesign principles. IEEE Trans. on CAD of Integrated Circuits and Systems 21(8): 987-995 (2002) | |
| j23 | Vikram Iyengar, Krishnendu Chakrabarty: System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints. IEEE Trans. on CAD of Integrated Circuits and Systems 21(9): 1088-1094 (2002) | |
| j22 | Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty: Synthesis of single-output space compactors for scan-based sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 21(10): 1171-1179 (2002) | |
| j21 | Sunil R. Das, Jing Yi Liang, Emil M. Petriu, Mansour H. Assaf, Wen-Ben Jone, Krishnendu Chakrabarty: Data compression in space under generalized mergeability based on concepts of cover table and frequency ordering. IEEE T. Instrumentation and Measurement 51(1): 150-172 (2002) | |
| c37 | Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty: Robust Space Compaction of Test Responses. Asian Test Symposium 2002: 254-259 | |
| c36 | Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Recent Advances in Test Planning for Modular Testing of Core-Based SOCs. Asian Test Symposium 2002: 320- | |
| c35 | Vishnu Swaminathan, Krishnendu Chakrabarty: Pruning-based energy-optimal device scheduling for hard real-time systems. CODES 2002: 175-180 | |
| c34 | Anshuman Chandra, Krishnendu Chakrabarty: Reduction of SOC test data volume, scan power and testing time using alternating run-length codes. DAC 2002: 673-678 | |
| c33 | Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Wrapper/TAM co-optimization, constraint-driven test scheduling, and tester data volume reduction for SOCs. DAC 2002: 685-690 | |
| c32 | Chunsheng Liu, Krishnendu Chakrabarty, Michael Gössel: An Interval-Based Diagnosis Scheme for Identifying Failing Vectors in a Scan-BIST Environment. DATE 2002: 382-386 | |
| c31 | Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Efficient Wrapper/TAM Co-Optimization for Large SOCs. DATE 2002: 491-498 | |
| c30 | Anshuman Chandra, Krishnendu Chakrabarty: Test Resource Partitioning and Reduced Pin-Count Testing Based on Test Data Compression. DATE 2002: 598-603 | |
| c29 | Erik Jan Marinissen, Vikram Iyengar, Krishnendu Chakrabarty: A Set of Benchmarks fo Modular Testing of SOCs. ITC 2002: 519-528 | |
| c28 | Vikram Iyengar, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty: Test Resource Optimization for Multi-Site Testing of SOCs Under ATE Memory Depth Constraints. ITC 2002: 1159-1168 | |
| c27 | Vishnu Swaminathan, Charles B. Schweizer, Krishnendu Chakrabarty, Amil A. Patel: Experiences in Implementing an Energy-Driven Task Scheduler in RT-Linux. IEEE Real Time Technology and Applications Symposium 2002: 229-238 | |
| c26 | Anshuman Chandra, Krishnendu Chakrabarty, Rafael A. Medina: How Effective are Compression Codes for Reducing Test Data Volume? VTS 2002: 91-96 | |
| c25 | Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: On Using Rectangle Packing for SOC Wrapper/TAM Co-Optimization. VTS 2002: 253-258 | |
| 2001 | ||
| j20 | Anshuman Chandra, Krishnendu Chakrabarty: Test Resource Partitioning for SOCs. IEEE Design & Test of Computers 18(5): 80-91 (2001) | |
| j19 | Shivakumar Swaminathan, Krishnendu Chakrabarty: On Using Twisted-Ring Counters for Test Set Embedding in BIST. J. Electronic Testing 17(6): 529-542 (2001) | |
| j18 | Anshuman Chandra, Krishnendu Chakrabarty: System-on-a-chip test-data compression and decompressionarchitectures based on Golomb codes. IEEE Trans. on CAD of Integrated Circuits and Systems 20(3): 355-368 (2001) | |
| j17 | Jie Ding, Krishnendu Chakrabarty, Richard B. Fair: Scheduling of microfluidic operations for reconfigurabletwo-dimensional electrowetting arrays. IEEE Trans. on CAD of Integrated Circuits and Systems 20(12): 1463-1468 (2001) | |
| j16 | Krishnendu Chakrabarty: Optimal test access architectures for system-on-a-chip. ACM Trans. Design Autom. Electr. Syst. 6(1): 26-49 (2001) | |
| j15 | Hairong Qi, S. Sitharama Iyengar, Krishnendu Chakrabarty: Multiresolution data integration using mobile agents in distributed sensor networks. IEEE Transactions on Systems, Man, and Cybernetics, Part C 31(3): 383-391 (2001) | |
| c24 | Vishnu Swaminathan, Krishnendu Chakrabarty: Investigating the effect of voltage-switching on low-energy task scheduling in hard real-time systems. ASP-DAC 2001: 251 | |
| c23 | Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty: Synthesis of single-output space compactors with application to scan-based IP cores. ASP-DAC 2001: 496-502 | |
| c22 | Vishnu Swaminathan, Krishnendu Chakrabarty, S. Sitharama Iyengar: Dynamic I/O power management for hard real-time systems. CODES 2001: 237-242 | |
| c21 | Anshuman Chandra, Krishnendu Chakrabarty: Combining Low-Power Scan Testing and Test Data Compression for System-on-a-Chip. DAC 2001: 166-169 | |
| c20 | Anshuman Chandra, Krishnendu Chakrabarty: Efficient test data compression and decompression for system-on-a-chip using internal scan chains and Golomb coding. DATE 2001: 145-149 | |
| c19 | Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen: Test wrapper and test access mechanism co-optimization for system-on-chip. ITC 2001: 1023-1032 | |
| c18 | Krishnendu Chakrabarty, S. Sitharama Iyengar, Hairong Qi, Eungchun Cho: Coding Theory Framework for Target Location in Distributed Sensor Networks. ITCC 2001: 130- | |
| c17 | Krishnendu Chakrabarty, Andrew Exnicios, Rajatish Mukherjee: Synthesis Of Transparent Circuits For Hierarchical An System-On-A-Chip Test. VLSI Design 2001: 431- | |
| c16 | Anshuman Chandra, Krishnendu Chakrabarty: Frequency-Directed Run-Length (FDR) Codes with Application to System-on-a-Chip Test Data Compression. VTS 2001: 42-47 | |
| c15 | A. Morozov, Michael Gössel, Krishnendu Chakrabarty, Bhargab B. Bhattacharya: Design of Parameterizable Error-Propagating Space Compactors for Response Observation. VTS 2001: 48-53 | |
| c14 | Vikram Iyengar, Krishnendu Chakrabarty: Precedence-Based, Preemptive, and Power-Constrained Test Scheduling for System-on-a-Chip. VTS 2001: 368-374 | |
| 2000 | ||
| j14 | Krishnendu Chakrabarty: Test scheduling for core-based systems using mixed-integer linearprogramming. IEEE Trans. on CAD of Integrated Circuits and Systems 19(10): 1163-1174 (2000) | |
| j13 | Krishnendu Chakrabarty, Brian T. Murray, Vikram Iyengar: Deterministic built-in test pattern generation for high-performance circuits using twisted-ring counters. IEEE Trans. VLSI Syst. 8(5): 633-636 (2000) | |
| c13 | Krishnendu Chakrabarty: Design of system-on-a-chip test access architectures under place-and-route and power constraints. DAC 2000: 432-437 | |
| c12 | Hiroshi Date, Vikram Iyengar, Krishnendu Chakrabarty, Makoto Sugihara: Mathematical Modeling of Intellectual Property Protection Using Partially-Mergeable Cores. PDPTA 2000 | |
| c11 | Anshuman Chandra, Krishnendu Chakrabarty: Test Data Compression for System-on-a-Chip Using Golomb Codes. VTS 2000: 113-120 | |
| c10 | Krishnendu Chakrabarty: Design of System-on-a-Chip Test Access Architectures using Integer Linear Programming. VTS 2000: 127-136 | |
| c9 | Markus Seuring, Krishnendu Chakrabarty: Space Compaction of Test Responses for IP Cores Using Orthogonal Transmission Functions. VTS 2000: 213-220 | |
| 1999 | ||
| j12 | Vikram Iyengar, Krishnendu Chakrabarty, Brian T. Murray: Deterministic Built-in Pattern Generation for Sequential Circuits. J. Electronic Testing 15(1-2): 97-114 (1999) | |
| j11 | Mark G. Karpovsky, Krishnendu Chakrabarty, Lev B. Levitin, Dimiter R. Avresky: On the Covering of Vertices for Fault Diagnosis in Hypercubes. Inf. Process. Lett. 69(2): 99-103 (1999) | |
| c8 | ||
| c7 | Krishnendu Chakrabarty, Brian T. Murray, Vikram Iyengar: Built-in Test Pattern Generation For High-Performance Cir cuits Using Twisted-Ring Counters. VTS 1999: 22-27 | |
| 1998 | ||
| j10 | Krishnendu Chakrabarty, Brian T. Murray, John P. Hayes: Optimal Zero-Aliasing Space Compaction of Test Responses. IEEE Trans. Computers 47(11): 1171-1187 (1998) | |
| j9 | Krishnendu Chakrabarty: Zero-aliasing space compaction using linear compactors with bounded overhead. IEEE Trans. on CAD of Integrated Circuits and Systems 17(5): 452-457 (1998) | |
| j8 | Krishnendu Chakrabarty, Brian T. Murray: Design of built-in test generator circuits using width compression. IEEE Trans. on CAD of Integrated Circuits and Systems 17(10): 1044-1051 (1998) | |
| j7 | Mark G. Karpovsky, Krishnendu Chakrabarty, Lev B. Levitin: On a New Class of Codes for Identifying Vertices in Graphs. IEEE Transactions on Information Theory 44(2): 599-611 (1998) | |
| j6 | Krishnendu Chakrabarty, John P. Hayes: Zero-aliasing space compaction of test responses using multiple parity signatures. IEEE Trans. VLSI Syst. 6(2): 309-313 (1998) | |
| c6 | Vikram Iyengar, Krishnendu Chakrabarty, Brian T. Murray: Built-In Self Testing of Sequential Circuits Using Precomputed Test Sets. VTS 1998: 418-423 | |
| 1997 | ||
| j5 | Vikram Iyengar, Krishnendu Chakrabarty: An Efficient Finite-State Machine Implementation of Huffman Decoders. Inf. Process. Lett. 64(6): 271-275 (1997) | |
| j4 | Krishnendu Chakrabarty, John P. Hayes: On the quality of accumulator-based compaction of test responses. IEEE Trans. on CAD of Integrated Circuits and Systems 16(8): 916-922 (1997) | |
| c5 | Krishnendu Chakrabarty, Jian Liu, Minyao Zhu, Brian T. Murray: Test Width Compression for Built-In Self Testing. ITC 1997: 328-337 | |
| 1996 | ||
| j3 | Krishnendu Chakrabarty, John P. Hayes: Balance testing and balance-testable design of logic circuits. J. Electronic Testing 8(1): 71-86 (1996) | |
| j2 | Krishnendu Chakrabarty, John P. Hayes: Test response compaction using multiplexed parity trees. IEEE Trans. on CAD of Integrated Circuits and Systems 15(11): 1399-1408 (1996) | |
| 1995 | ||
| j1 | Krishnendu Chakrabarty, John P. Hayes: Cumulative balance testing of logic circuits. IEEE Trans. VLSI Syst. 3(1): 72-83 (1995) | |
| c4 | Krishnendu Chakrabarty, Brian T. Murray, John P. Hayes: Optimal Space Compaction of Test Responses. ITC 1995: 834-843 | |
| 1994 | ||
| c3 | Krishnendu Chakrabarty, John P. Hayes: DFBT: A Design-for-Testability Method Based on Balance Testing. DAC 1994: 351-357 | |
| c2 | Krishnendu Chakrabarty, John P. Hayes: Efficient Test-Response Compression for Multiple-Output Cicuits. ITC 1994: 501-510 | |
| 1993 | ||
| c1 | ||
Colors in the list of coauthors
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