Klaas Bult

Davide Vecchi, Jan Mulder, Frank M. L. van der Goes, Jan R. Westra, Emre Ayranci, Christopher M. Ward, Jiansong Wan, Klaas Bult: An 800 MS/s Dual-Residue Pipeline ADC in 40 nm CMOS. J. Solid-State Circuits 46(12): 2834-2844 (2011)

Jan Mulder, Frank M. L. van der Goes, Davide Vecchi, Jan R. Westra, Emre Ayranci, Christopher M. Ward, Jiansong Wan, Klaas Bult: An 800MS/s dual-residue pipeline ADC in 40nm CMOS. ISSCC 2011: 184-186

Chi-Hung Lin, Frank M. L. van der Goes, Jan J. Westra, Jan Mulder, Yu Lin, Erol Arslan, Emre Ayranci, Xiaodong Liu, Klaas Bult: A 12b 2.9GS/s DAC with IM3 ≪-60dBc beyond 1GHz in 65nm CMOS. ISSCC 2009: 74-75