Ulrich Brüning

Ulrich Brüning: MPI Functions and Their Impact on Interconnect Hardware. EuroMPI 2012: 10

Heiner Litz, Maximilian Thürmer, Ulrich Brüning: TCCluster: A Cluster Architecture Utilizing the Processor Host Interface as a Network Interconnect. CLUSTER 2010: 9-18

Heiner Litz, Holger Fröning, Ulrich Brüning: A HyperTransport 3 Physical Layer Interface for FPGAs. ARC 2009: 4-14

Heiner Litz, Holger Fröning, Maximilian Thürmer, Ulrich Brüning: An FPGA based verification platform for HyperTransport 3.x. FPL 2009: 631-634

Holger Fröning, Heiner Litz, Ulrich Brüning: Efficient Virtualization of High-Performance Network Interfaces. ICN 2009: 434-439

Mondrian Nüssle, Martin Scherer, Ulrich Brüning: A Resource Optimized Remote-Memory-Access Architecture for Low-latency Communication. ICPP 2009: 220-227

Mondrian Nüssle, Benjamin Geib, Holger Fröning, Ulrich Brüning: An FPGA-Based Custom High Performance Interconnection Network. ReConFig 2009: 113-118

David Slogsnat, Alexander Giese, Mondrian Nüssle, Ulrich Brüning: An open-source HyperTransport core. TRETS 1(3) (2008)

Heiner Litz, Holger Fröning, Mondrian Nüssle, Ulrich Brüning: VELO: A Novel Communication Engine for Ultra-Low Latency Message Transfers. ICPP 2008: 238-245

David Slogsnat, Alexander Giese, Ulrich Brüning: A versatile, low latency HyperTransport core. FPGA 2007: 45-52

Holger Fröning, Mondrian Nüssle, David Slogsnat, Patrick R. Haspel, Ulrich Brüning: Performance Evaluation of the ATOLL Interconnect. Parallel and Distributed Computing and Networks 2005: 129-134

Mondrian Nüssle, Holger Fröning, Ulrich Brüning: Swordfish: A Simulator for High-Performance Networks. IASTED PDCS 2005: 530-535

Andrés Bruhn, Tobias Jakob, Markus Fischer, Timo Kohlberger, Joachim Weickert, Ulrich Brüning, Christoph Schnörr: High performance cluster computing with 3-D nonlinear diffusion filters. Real-Time Imaging 10(1): 41-51 (2004)

Ulrich Brüning, Wolfgang K. Giloi: Future Building Blocks for Parallel Architectures. ICPP 2004: 363

Ulrich Brüning, Ulrich Krackhardt: Systeme für eine hocheffiziente elektrische und optische Kurzstreckenübertragung im SAN-Bereich (Systems for High-Efficient Electrical and Optical Short-Distance Data Transmission in System-Area-Networks). it - Information Technology 45(2): 65-71 (2003)

David Slogsnat, Markus Fischer, Andrés Bruhn, Joachim Weickert, Ulrich Brüning: Low Level Parallelization of Nonlinear Diffusion Filtering Algorithms for Cluster Computing Environments. Euro-Par 2003: 481-490

Patrick R. Schulz, Ulrich Brüning, Gunter Strube: SEED2002 Support of Educational course for Electronic Design. MSE 2003: 53-54

Andrés Bruhn, Tobias Jakob, Markus Fischer, Timo Kohlberger, Joachim Weickert, Ulrich Brüning, Christoph Schnörr: Designing 3-D Nonlinear Diffusion Filters for High Performance Cluster Computing. DAGM-Symposium 2002: 290-297

Ulrich Brüning, Holger Fröning, Patrick R. Schulz, Lars Rzymianowicz: ATOLL: Performance and Cost Optimization of a San Interconnect. IASTED PDCS 2002: 496-501

Lars Rzymianowicz, Mathias Waack, Ulrich Brüning, Markus Fischer, Jörg Kluge, Patrick R. Schulz: Cluster SMP Nodes with the ATOLL Network: A Look into the Future of System Area Networks. HPCN Europe 2000: 678-687

Markus Fischer, Ulrich Brüning, Jörg Kluge, Lars Rzymianowicz, Patrick R. Schulz, Mathias Waack: ATOLL, a New Switched, High Speed Interconnect in Comparison to Myrinet and SCI. IPDPS Workshops 2000: 16-27

Lars Rzymianowicz, Ulrich Brüning, Jörg Kluge, Patrick R. Schulz, Mathias Waack: ATOLL: A Network on a Chip. PDPTA 1999: 2307-2313

Ulrich Brüning, Lambert Schaelicke: ATOLL: A High-Performance Communication Device for Massively Parallel Systems. APDC 1997: 228-234

Wolfgang K. Giloi, Ulrich Brüning, Wolfgang Schröder-Preikschat: MANNA: Prototype of a Distributed Memory Architecture with Maximized Sustained Performance. PDP 1996: 297-304

Ulrich Brüning, Wolfgang K. Giloi, Wolfgang Schröder-Preikschat: Latency Hiding in Message-Passing Architectures. IPPS 1994: 704-709

Ulrich Brüning, Wolfgang K. Giloi, Wolfgang Schröder-Preikschat: The Architecture of the European MIMD Supercomputer GENESIS. EDMCC 1991: 450-462