Pierre Boulet

Calin Glitia, Julien DeAntoni, Frédéric Mallet, Jean-Vivien Millo, Pierre Boulet, Abdoulaye Gamatié: Progressive and explicit refinement of scheduling for multidimensional data-flow applications using uml marte. Design Autom. for Emb. Sys. 16(2): 137-169 (2012)

Imran Rafiq Quadri, Abdoulaye Gamatié, Pierre Boulet, Samy Meftali, Jean-Luc Dekeyser: Expressing embedded systems configurations at high abstraction levels with UML MARTE profile: Advantages, limitations and alternatives. Journal of Systems Architecture - Embedded Systems Design 58(5): 178-194 (2012)

Asma Charfi, Chokri Mraidha, Pierre Boulet: An Optimized Compilation of UML State Machines. ISORC 2012: 172-179

Calin Glitia, Pierre Boulet, Eric Lenormand, Michel Barreteau: Repetitive model refactoring strategy for the design space exploration of intensive signal processing applications. Journal of Systems Architecture - Embedded Systems Design 57(9): 815-829 (2011)

Jing Guo, Wendell Rodrigues, Jeyarajan Thiyagalingam, Frédéric Guyomarc'h, Pierre Boulet, Sven-Bodo Scholz: Harnessing the Power of GPUs without Losing Abstractions in SAC and ArrayOL: A Comparative Study. IPDPS Workshops 2011: 1183-1190

Asma Charfi, Chokri Mraidha, Sébastien Gérard, François Terrier, Pierre Boulet: Toward optimized code generation through model-based optimization. DATE 2010: 1313-1316

Rosilde Corvino, Abdoulaye Gamatié, Pierre Boulet: Architecture Exploration for Efficient Data Transfer and Storage in Data-Parallel Applications. Euro-Par (1) 2010: 101-116

Asma Charfi, Chokri Mraidha, Sébastien Gérard, François Terrier, Pierre Boulet: Does Code Generation Promote or Prevent Optimizations? ISORC 2010: 75-79

Abdoulaye Gamatié, Éric Rutten, Huafeng Yu, Pierre Boulet, Jean-Luc Dekeyser: Model-Driven Engineering and Formal Validation of High-Performance Embedded Systems. Scalable Computing: Practice and Experience 10(2) (2009)

Abdoulaye Gamatié, Éric Rutten, Huafeng Yu, Pierre Boulet, Jean-Luc Dekeyser: Synchronous Modeling and Analysis of Data Intensive Applications. EURASIP J. Emb. Sys. 2008 (2008)

Imran Rafiq Quadri, Pierre Boulet, Samy Meftali, Jean-Luc Dekeyser: Using an MDE Approach for Modeling of Interconnection Networks. ISPAN 2008: 289-294

Abdoulaye Gamatié, Éric Rutten, Huafeng Yu, Pierre Boulet, Jean-Luc Dekeyser: Modeling and Formal Validation of High-Performance Embedded Systems. ISPDC 2008: 215-222

Calin Glitia, Pierre Boulet: High Level Loop Transformations for Systematic Signal Processing Embedded Applications. SAMOS 2008: 187-196

Abou El Hassan Benyamina, Pierre Boulet: Multi-objective Mapping for NoC Architectures. JDIM 5(6): 378-384 (2007)

Pierre Boulet, Philippe Marquet, Éric Piel, Julien Taillard: Repetitive Allocation Modelling with MARTE. FDL 2007: 280-285

Ouassila Labbani, Éric Rutten, Jean-Luc Dekeyser, Pierre Boulet: UML2 Profile for Modeling Controlled Data Parallel Applications. FDL 2006: 359-367

Lossan Bonde, Pierre Boulet, Jean-Luc Dekeyser: Traceability and Interoperability in Models Transformations. FDL 2005: 543-555

Ouassila Labbani, Jean-Luc Dekeyser, Pierre Boulet: Mode-Automata Based Methodology for Scade. HSCC 2005: 386-401

Abdelkader Amar, Pierre Boulet, Philippe Dumont: Projection of the Array-OL Specification Language onto the Kahn Process Network Computation Model. ISPAN 2005: 496-503

Ashish Meena, Pierre Boulet: Model Driven Scheduling Framework for Multiprocessor SoC Design. PPAM 2005: 888-895

Pierre Boulet, Arnaud Cuccuru, Jean-Luc Dekeyser, Ashish Meena: Model Driven Engineering for Regular MPSoC Co-design. ReCoSoC 2005: 129-136

Arnaud Cuccuru, Jean-Luc Dekeyser, Philippe Marquet, Pierre Boulet: Towards UML 2 Extensions for Compact Modeling of Regular Complex Topologies. MoDELS 2005: 445-459

Arnaud Cuccuru, Pierre Boulet, Jean-Luc Dekeyser: Regular Hardware Architecture Modeling with UML2. FDL 2004: 289-301

Pierre Boulet, Jean-Luc Dekeyser, Cédric Dumoulin, Philippe Marquet: MDA for SoC Design, Intensive Signal Processing Experiment. FDL 2003: 309-317

Abdelkader Amar, Pierre Boulet, Jean-Luc Dekeyser, T. Theeuwen: Distributed Process Networks - Using Half FIFO Queues in CORBA. PARCO 2003: 31-38

Abdelkader Amar, Pierre Boulet, Jean-Luc Dekeyser: Towards Distributed Process Networks with CORBA. Scalable Computing: Practice and Experience 5(4) (2002)

Florent Devin, Pierre Boulet, Jean-Luc Dekeyser, Philippe Marquet: GASPARD - A Visual Parallel Programming Environment. PARELEC 2002: 145-150

Pierre Boulet, Jean-Luc Dekeyser, Jean-Luc Levaire, Philippe Marquet, Julien Soula, Alain Demeure: Visual Data-Parallel Programming for Signal Processing Applications. PDP 2001: 105-112

Emmanuel Cagniot, Jean-Luc Dekeyser, Pierre Boulet, Thomas Brandes, Francis Piriou, Georges Marques: Parallelization of a 3D Magnetostatic Code Using High Performance Fortran. PARELEC 2000: 181-185

Emmanuel Cagniot, Thomas Brandes, Jean-Luc Dekeyser, Francis Piriou, Pierre Boulet, Stéphane Clénet: High Level Parallelization of a 3D Electromagnetic Simulation Code with Irregular Communication Patterns. VECPAR 2000: 519-528

Pierre Boulet, Jack Dongarra, Yves Robert, Frédéric Vivien: Static tiling for heterogeneous computing platforms. Parallel Computing 25(5): 547-568 (1999)

Pierre Boulet, Jack Dongarra, Fabrice Rastello, Yves Robert, Frédéric Vivien: Algorithmic Issues on Heterogeneous Computing Platforms. Parallel Processing Letters 9(2): 197-213 (1999)

Pierre Boulet, Alain Darte, Georges-André Silber, Frédéric Vivien: Loop Parallelization Algorithms: From Parallelism Extraction to Code Generation. Parallel Computing 24(3-4): 421-444 (1998)

Pierre Boulet, Paul Feautrier: Scanning Polyhedra without Do-loops. IEEE PACT 1998: 4-11

Pierre Boulet, Xavier Redon: Communication Pre-evaluation in HPF. Euro-Par 1998: 263-272

Pierre Boulet, Thomas Brandes: Evaluation of Automatic Parallelization Strategies for HPF Compilers. HPCN Europe 1996: 778-783

Pierre Boulet: Bouclettes: A Fortran Loop Parallelizer. HPCN Europe 1996: 784-791

Pierre Boulet, Alain Darte, Tanguy Risset, Yves Robert: (Pen)-ultimate tiling? Integration 17(1): 33-51 (1994)

Vincent Bouchitté, Pierre Boulet, Alain Darte, Yves Robert: Evaluating Array Expressions on Massively Parallel Machines with Communication/ Computation Overlap. CONPAR 1994: 713-724