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Pradip Bose
2010 – today
- 2013
[j49]- [j48]Ramon Bertran, Yutaka Sugawara, Hans M. Jacobson, Alper Buyuktosunoglu, Pradip Bose: Application-level power and performance characterization and optimization on IBM Blue Gene/Q systems. IBM Journal of Research and Development 57(1): 4 (2013)
- [j47]Alessandro Morari, Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Chen-Yong Cher, Alper Buyuktosunoglu, Pradip Bose, Mateo Valero: SMT Malleability in IBM POWER5 and POWER6 Processors. IEEE Trans. Computers 62(4): 813-826 (2013)
- 2012
- [c63]Victor Jiménez, Roberto Gioiosa, Francisco J. Cazorla, Alper Buyuktosunoglu, Pradip Bose, Francis P. O'Connell: Making data prefetch smarter: adaptive prefetching on POWER7. PACT 2012: 137-146
- [c62]Pradip Bose, Alper Buyuktosunoglu, John A. Darringer, Meeta Sharma Gupta, Michael B. Healy, Hans M. Jacobson, Indira Nair, Jude A. Rivers, Jeonghee Shin, Augusto Vega, Alan J. Weger: Power management of multi-core chips: Challenges and pitfalls. DATE 2012: 977-982
- [c61]Augusto Vega, Pradip Bose, Alper Buyuktosunoglu, Jeff H. Derby, Michele Franceschini, Charles Johnson, Robert K. Montoye: Architectural perspectives of future wireless base stations based on the IBM PowerEN™ processor. HPCA 2012: 423-432
- [c60]
- [c59]Ramon Bertran, Alper Buyuktosunoglu, Meeta Sharma Gupta, Marc González, Pradip Bose: Systematic Energy Characterization of CMP/SMT Processor Systems via Automated Micro-Benchmarks. MICRO 2012: 199-211
- 2011
- [j46]Victor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Mateo Valero, Carlos Boneti, Eren Kursun, Chen-Yong Cher, Canturk Isci, Alper Buyuktosunoglu, Pradip Bose: Characterizing Power and Temperature Behavior of POWER6-Based System. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(3): 228-241 (2011)
- [j45]Michael S. Floyd, Malcolm Allen-Ware, Karthick Rajamani, Tilman Gloekler, Bishop Brock, Pradip Bose, Alper Buyuktosunoglu, Juan C. Rubio, Birgit Schubert, Bruno Spruth, José A. Tierno, Lorena Pesantez: Adaptive energy-management features of the IBM POWER7 chip. IBM Journal of Research and Development 55(3): 8 (2011)
- [j44]Michael S. Floyd, Malcolm Allen-Ware, Karthick Rajamani, Bishop Brock, Charles Lefurgy, Alan J. Drake, Lorena Pesantez, Tilman Gloekler, José A. Tierno, Pradip Bose, Alper Buyuktosunoglu: Introducing the Adaptive Energy Management Features of the Power7 Chip. IEEE Micro 31(2): 60-75 (2011)
- [j43]Victor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Eren Kursun, Canturk Isci, Alper Buyuktosunoglu, Pradip Bose, Mateo Valero: Energy-Aware Accounting and Billing in Large-Scale Computing Facilities. IEEE Micro 31(3): 60-71 (2011)
- [j42]Jude A. Rivers, Meeta Sharma Gupta, Jeonghee Shin, Prabhakar Kudva, Pradip Bose: Error Tolerance in Server Class Processors. IEEE Trans. on CAD of Integrated Circuits and Systems 30(7): 945-959 (2011)
- [c58]Niti Madan, Alper Buyuktosunoglu, Pradip Bose, Murali Annavaram: A case for guarded power gating for multi-core processors. HPCA 2011: 291-300
- [c57]Hans M. Jacobson, Alper Buyuktosunoglu, Pradip Bose, Emrah Acar, Richard J. Eickemeyer: Abstraction and microarchitecture scaling in early-stage power modeling. HPCA 2011: 394-405
- [c56]Pradip Bose: Keynote II: Integrated modeling challenges in extreme-scale computing. ISPASS 2011: 133
- [c55]Amlan Ganguly, Partha Kundu, Pradip Bose: Curbing energy cravings in networks: A cross-sectional view across the micro-macro boundary. NOCS 2011: 241-246
- [r1]
- 2010
- [c54]Victor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Mateo Valero, Carlos Boneti, Eren Kursun, Chen-Yong Cher, Canturk Isci, Alper Buyuktosunoglu, Pradip Bose: Power and thermal characterization of POWER6 system. PACT 2010: 7-18
- [c53]Alejandro Rico, Jeff H. Derby, Robert K. Montoye, Timothy H. Heil, Chen-Yong Cher, Pradip Bose: Performance and power evaluation of an in-line accelerator. Conf. Computing Frontiers 2010: 81-82
- [c52]Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, John A. Darringer, Meeta Sharma Gupta, Hendrik F. Hamann, Hans M. Jacobson, Prabhakar Kudva, Eren Kursun, Niti Madan, Indira Nair, Jude A. Rivers, Jeonghee Shin, Alan J. Weger, Victor V. Zyuban: Power-efficient, reliable microprocessor architectures: modeling and design methods. ACM Great Lakes Symposium on VLSI 2010: 299-304
- [c51]Niti Madan, Alper Buyuktosunoglu, Pradip Bose, Murali Annavaram: Guarded Power Gating in a Multi-core Setting. ISCA Workshops 2010: 198-210
- [c50]Victor Jiménez, Roberto Gioiosa, Eren Kursun, Francisco J. Cazorla, Chen-Yong Cher, Alper Buyuktosunoglu, Pradip Bose, Mateo Valero: Trends and techniques for energy efficient architectures. VLSI-SoC 2010: 276-279
- [e1]Matthew T. Jacob, Chita R. Das, Pradip Bose (Eds.): 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 9-14 January 2010, Bangalore, India. IEEE Computer Society 2010, ISBN 978-1-4244-5659-8
2000 – 2009
- 2009
- [j41]Yu Cao, Jim Tschanz, Pradip Bose: Guest Editors' Introduction: Reliability Challenges in Nano-CMOS Design. IEEE Design & Test of Computers 26(6): 6-7 (2009)
- [c49]Anita Lungu, Pradip Bose, Alper Buyuktosunoglu, Daniel J. Sorin: Dynamic power gating with quality guarantees. ISLPED 2009: 377-382
- [c48]Anita Lungu, Pradip Bose, Daniel J. Sorin, Steven German, Geert Janssen: Multicore power management: Ensuring robustness via early-stage formal verification. MEMOCODE 2009: 78-87
- [c47]Meeta Sharma Gupta, Jude A. Rivers, Pradip Bose, Gu-Yeon Wei, David Brooks: Tribeca: design for PVT variations with local recovery and fine-grained adaptation. MICRO 2009: 435-446
- 2008
- [j40]Jude A. Rivers, Pradip Bose, Prabhakar Kudva, John-David Wellman, Pia N. Sanda, Ethan H. Cannon, Luiz C. Alves: Phaser: Phased methodology for modeling the system-level effects of soft errors. IBM Journal of Research and Development 52(3): 293-306 (2008)
- [c46]Reinaldo A. Bergamaschi, Guoling Han, Alper Buyuktosunoglu, Hiren D. Patel, Indira Nair, Gero Dittmann, Geert Janssen, Nagu R. Dhanwada, Zhigang Hu, Pradip Bose, John A. Darringer: Exploring power management in multi-core systems. ASP-DAC 2008: 708-713
- [c45]Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers: Online Estimation of Architectural Vulnerability Factor for Soft Errors. ISCA 2008: 341-352
- [c44]Jeonghee Shin, Victor V. Zyuban, Pradip Bose, Timothy Mark Pinkston: A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime. ISCA 2008: 353-362
- [c43]Pradeep Ramachandran, Sarita V. Adve, Pradip Bose, Jude A. Rivers: Metrics for Architecture-Level Lifetime Reliability Analysis. ISPASS 2008: 202-212
- 2007
- [j39]Kevin Skadron, Pradip Bose, Kanad Ghose, Resit Sendag, Joshua J. Yi, Derek Chiou: Low-Power Design and Temperature Management. IEEE Micro 27(6): 46-57 (2007)
- [j38]Aneesh Aggarwal, Pradip Bose, Mohamed Zahran: Introduction to the special issue on the 2006 reconfigurable and adaptive architecture workshop. SIGARCH Computer Architecture News 35(3): 1 (2007)
- [c42]Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han: Performance modeling for early analysis of multi-core systems. CODES+ISSS 2007: 209-214
- [c41]Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers: Architecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions. DSN 2007: 266-275
- [c40]Jeonghee Shin, Victor V. Zyuban, Zhigang Hu, Jude A. Rivers, Pradip Bose: A Framework for Architecture-Level Lifetime Reliability Modeling. DSN 2007: 534-543
- [c39]Joseph J. Sharkey, Alper Buyuktosunoglu, Pradip Bose: Evaluating design tradeoffs in on-chip power management for CMPs. ISLPED 2007: 44-49
- [c38]Jeonghwan Choi, Chen-Yong Cher, Hubertus Franke, Hendrik F. Hamann, Alan J. Weger, Pradip Bose: Thermal-aware task scheduling at the system software level. ISLPED 2007: 213-218
- [c37]Hendrik F. Hamann, Alan J. Weger, James A. Lacey, Zhigang Hu, Pradip Bose, Erwin Cohen, Jamil A. Wakil: Temperature-limited microprocessors: Measurements and design implications. VLSI Design 2007: 427-432
- 2006
- [j37]
- [j36]Pradip Bose: Workload characterization: A key aspect of microarchitecture design. IEEE Micro 26(2): 5-6 (2006)
- [j35]
- [j34]
- [j33]
- [j32]
- [c36]Canturk Isci, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose, Margaret Martonosi: An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget. MICRO 2006: 347-358
- 2005
- [j31]
- [j30]
- [j29]
- [j28]Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers: Lifetime Reliability: Toward an Architectural Solution. IEEE Micro 25(3): 70-80 (2005)
- [j27]
- [j26]
- [j25]Kunio Uchiyama, Pradip Bose: Guest Editors' Introduction: Energy-Efficient Design. IEEE Micro 25(5): 6-9 (2005)
- [j24]Pradip Bose: Designing microprocessors with robust functionality and performance. IEEE Micro 25(6): 5 (2005)
- [c35]Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers: SoftArch: An Architecture Level Tool for Modeling and Analyzing Soft Errors. DSN 2005: 496-505
- [c34]Hans M. Jacobson, Pradip Bose, Zhigang Hu, Alper Buyuktosunoglu, Victor V. Zyuban, Richard J. Eickemeyer, Lee Eisen, John Griswell, Doug Logan, Balaram Sinharoy, Joel M. Tendler: Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors. HPCA 2005: 238-242
- [c33]Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers: Exploiting Structural Duplication for Lifetime Reliability Enhancement. ISCA 2005: 520-531
- [c32]
- 2004
- [j23]Pradip Bose: Editor in Chief's Message: New Challenges and Burning Issues. IEEE Micro 24(1): 5 (2004)
- [j22]
- [j21]Pradip Bose: EIC's Message: General-purpose versus application-specific processors. IEEE Micro 24(3): 5- (2004)
- [j20]Pradip Bose: Editor in Chief's Message: Saving power-Lessons from embedded systems. IEEE Micro 24(4): 5-6 (2004)
- [j19]
- [j18]Pradip Bose: Computer architecture research: Shifting priorities and newer challenges. IEEE Micro 24(6): 5 (2004)
- [j17]David Brooks, Pradip Bose, Margaret Martonosi: Power-performance simulation: design and validation strategies. SIGMETRICS Performance Evaluation Review 31(4): 13-18 (2004)
- [j16]Victor V. Zyuban, David Brooks, Viji Srinivasan, Michael Gschwind, Pradip Bose, Philip N. Strenski, Philip G. Emma: Integrated Analysis of Power and Performance for Pipelined Microprocessors. IEEE Trans. Computers 53(8): 1004-1016 (2004)
- [c31]Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers: The Impact of Technology Scaling on Lifetime Reliability. DSN 2004: 177-
- [c30]Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers: The Case for Lifetime Reliability-Aware Microprocessors. ISCA 2004: 276-287
- [c29]Zhigang Hu, Alper Buyuktosunoglu, Viji Srinivasan, Victor V. Zyuban, Hans M. Jacobson, Pradip Bose: Microarchitectural techniques for power gating of execution units. ISLPED 2004: 32-37
- [c28]Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadron, Pradip Bose: Understanding the energy efficiency of simultaneous multithreading. ISLPED 2004: 44-49
- 2003
- [j15]David H. Albonesi, Rajeev Balasubramonian, Steve Dropsho, Sandhya Dwarkadas, Eby G. Friedman, Michael C. Huang, Volkan Kursun, Grigorios Magklis, Michael L. Scott, Greg Semeraro, Pradip Bose, Alper Buyuktosunoglu, Peter W. Cook, Stanley Schuster: Dynamically Tuning Processor Resources with Adaptive Processing. IEEE Computer 36(12): 49-58 (2003)
- [j14]David Brooks, Pradip Bose, Viji Srinivasan, Michael Gschwind, Philip G. Emma, Michael G. Rosenfield: New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors. IBM Journal of Research and Development 47(5-6): 653-670 (2003)
- [j13]
- [j12]
- [j11]
- [j10]Pradip Bose: Editor-in-Chief?s Message: Adapting Old Paradigms to Meet New Challenges. IEEE Micro 23(4): 5 (2003)
- [j9]Pradip Bose, David H. Albonesi, Diana Marculescu: Guest Editors' Introduction: Power and Complexity Aware Design. IEEE Micro 23(5): 8-11 (2003)
- [j8]Charles R. Moore, Kevin W. Rudd, Ruby B. Lee, Pradip Bose: Guest Editors' Introduction: Micro's Top Picks from Microarchitecture Conferences. IEEE Micro 23(6): 8-10 (2003)
- [c27]Alper Buyuktosunoglu, Tejas Karkhanis, David H. Albonesi, Pradip Bose: Energy Efficient Co-Adaptive Instruction Fetch and Issue. ISCA 2003: 147-156
- 2002
- [c26]Hans M. Jacobson, Prabhakar Kudva, Pradip Bose, Peter W. Cook, Stanley Schuster: Synchronous Interlocked Pipelines. ASYNC 2002: 3-12
- [c25]Tejas Karkhanis, James E. Smith, Pradip Bose: Saving energy with just in time instruction delivery. ISLPED 2002: 178-183
- [c24]Alper Buyuktosunoglu, David H. Albonesi, Pradip Bose, Peter W. Cook, Stanley Schuster: Tradeoffs in power-efficient issue queue design. ISLPED 2002: 184-189
- [c23]Viji Srinivasan, David Brooks, Michael Gschwind, Pradip Bose, Victor V. Zyuban, Philip N. Strenski, Philip G. Emma: Optimizing pipelines for power and performance. MICRO 2002: 333-344
- [c22]Pradip Bose, David Brooks, Alper Buyuktosunoglu, Peter W. Cook, K. Das, Philip G. Emma, Michael Gschwind, Hans M. Jacobson, Tejas Karkhanis, Prabhakar Kudva, Stanley Schuster, James E. Smith, Viji Srinivasan, Victor V. Zyuban, David H. Albonesi, Sandhya Dwarkadas: Early-Stage Definition of LPX: A Low Power Issue-Execute Processor. PACS 2002: 1-17
- 2001
- [c21]Pradip Bose: Ensuring Dependable Processor Performance: An Experience Report on Pre-Silicon Performance Validation. DSN 2001: 481-486
- [c20]Alper Buyuktosunoglu, David H. Albonesi, Stanley Schuster, David Brooks, Pradip Bose, Peter W. Cook: A circuit level implementation of an adaptive issue queue for power-aware microprocessors. ACM Great Lakes Symposium on VLSI 2001: 73-78
- 2000
- [j7]Pradip Bose: Testing for Function and Performance: Towards an Integrated Processor Validation Methodology. J. Electronic Testing 16(1-2): 29-48 (2000)
- [j6]David Brooks, Pradip Bose, Stanley Schuster, Hans M. Jacobson, Prabhakar Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor V. Zyuban, Manish Gupta, Peter W. Cook: Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. IEEE Micro 20(6): 26-44 (2000)
- [c19]Alper Buyuktosunoglu, Stanley Schuster, David Brooks, Pradip Bose, Peter W. Cook, David H. Albonesi: An Adaptive Issue Queue for Reduced Power at High Performance. PACS 2000: 25-39
- [c18]David Brooks, Margaret Martonosi, John-David Wellman, Pradip Bose: Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor. PACS 2000: 126-136
- [c17]Pradip Bose, Jacob A. Abraham: Performance and Functional Verification of Microprocessors. VLSI Design 2000: 58-63
1990 – 1999
- 1999
- [j5]Pradip Bose, Sunil Kim, Francis P. O'Connell, William A. Ciarfella: Bounds modelling and compiler optimizations for superscalar performance tuning. Journal of Systems Architecture 45(12-13): 1111-1137 (1999)
- [c16]
- 1998
- [j4]Pradip Bose, Thomas M. Conte: Performance Analysis and Its Impact on Design. IEEE Computer 31(5): 41-49 (1998)
- [c15]
- 1997
- [j3]
- [c14]Anthony-Trung Nguyen, Pradip Bose, Kattamuri Ekanadham, Ashwini K. Nanda, Maged M. Michael: Accuracy and Speedup of Parallel Trace-Driven Architectural Simulation. IPPS 1997: 39-44
- 1996
- [c13]Vijay S. Iyengar, Louise Trevillyan, Pradip Bose: Representative Traces for Processor Models with Infinite Cache. HPCA 1996: 62-72
- 1995
- [j2]Pradip Bose, S. Surya: Architectural timing verification of CMOS RISC processors. IBM Journal of Research and Development 39(1-2): 113-130 (1995)
- 1994
- [c12]Pradip Bose: Architectural Timing Verification and Test for Super Scalar Processors. FTCS 1994: 256-265
- [c11]S. Surya, Pradip Bose, Jacob A. Abraham: Architectural Performance Verification: PowerPCTM Processors. ICCD 1994: 344-347
- 1993
- [c10]Pradip Bose, John-David Wellman: MIPS-Driven Early Design and Analysis of VLSI CPU Chips. VLSI Design 1993: 256-259
- 1992
- [c9]Pradip Bose, David LaPotin, Gopalakrishnan Vijayan, Sungho Kim: Workload-Driven Floorplanning for MIPS Optimization. ICCD 1992: 387-391
- 1991
- [c8]
1980 – 1989
- 1988
- [j1]Pradip Bose: A Novel Technique for Efficient Parallel Implementation of a Classical Logic/Fault Simulation Problem. IEEE Trans. Computers 37(12): 1569-1577 (1988)
- [c7]
- [c6]Pradip Bose: Heuristic Rule-Based Program Transformations for Enhanced Vectorization. ICPP (2) 1988: 63-66
- [c5]Pradip Bose: Interactive program improvement via EAVE: an expert adviser for vectorization. ICS 1988: 119-130
- 1986
- [c4]
- 1984
- [c3]Pradip Bose, Edward S. Davidson: Design of Instruction Set Architectures for Support of High-Level Languages . ISCA 1984: 198-206
- 1982
- [c2]Pradip Bose, B. Ramakrishna Rau, Michael S. Schlansker: Systematically derived instruction sets for high-level language support. ACM Southeast Regional Conference 1982: 73-84
- [c1]
Coauthor Index
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last updated on 2013-05-01 02:35 CEST by the dblp team