Nripendra N. Biswas

Nripendra N. Biswas, C. Srikanth, James Jacob: Cubical CAMP for minimization of Boolean functions. VLSI Design 1996: 264-269

Nripendra N. Biswas: Logic design theory. Prentice Hall 1993, isbn 978-0-13-010695-7, pp. I-XIII, 1-306

Sampalli Srinivas, Nripendra N. Biswas: Design and Analysis of a Generalized Architecture for Reconfigurable m-ary Tree Structures. IEEE Trans. Computers 41(11): 1465-1478 (1992)

James Jacob, Nripendra N. Biswas: Further Comments on "Detection of Faults in Programmable Logic Arrays". IEEE Trans. Computers 39(1): 155-157 (1990)

Nripendra N. Biswas, Sampalli Srinivas: A Reconfigurable Tree Architecture with Multistage Interconnection Network. IEEE Trans. Computers 39(12): 1481-1485 (1990)

Nripendra N. Biswas: On covering distant minterms by the camp algorithm. IEEE Trans. on CAD of Integrated Circuits and Systems 9(7): 786-789 (1990)

B. Gurunath, Nripendra N. Biswas: An algorithm for multiple output minimization. IEEE Trans. on CAD of Integrated Circuits and Systems 8(9): 1007-1013 (1989)

K. S. Ramanatha, Nripendra N. Biswas: Design of Crosspoint-Irredundant PLA's Using Minimal Number of Control Inputs. IEEE Trans. Computers 37(9): 1130-1134 (1988)

Nripendra N. Biswas: Computer-Aided Minimization Procedure for Boolean Functions. IEEE Trans. on CAD of Integrated Circuits and Systems 5(2): 303-304 (1986)

Nripendra N. Biswas: On Bit Steering in the Minimization of the Control Memory of Microprogrammed Processors. IEEE Trans. Computers 34(11): 1057-1061 (1985)

Prathima Agrawal, Vishwani D. Agrawal, Nripendra N. Biswas: Multiple output minimization. DAC 1985: 674-680

James Jacob, Nripendra N. Biswas: : A Testable PLA Design with Minimal Hardware and Test Set. ITC 1985: 583-588

Nripendra N. Biswas: Computer aided minimization procedure for boolean functions. DAC 1984: 699-702

K. S. Ramanatha, Nripendra N. Biswas: An On-Line Algorithm for the Location of Cross Point Faults in Programmable Logic Arrays. IEEE Trans. Computers 32(5): 438-444 (1983)

K. S. Ramanatha, Nripendra N. Biswas: A Design for Testability of Undetectable Crosspoint Faults in Programmable Logic Arrays. IEEE Trans. Computers 32(6): 551-557 (1983)

Chamarty D. V. P. Rao, Nripendra N. Biswas: On the Minimization of Wordwidth in the Control Memory of a Microprogrammed Digital Computer. IEEE Trans. Computers 32(9): 863-868 (1983)

K. S. Ramanatha, Nripendra N. Biswas: A Design for Complete Testability of Programmable Logic Arrays. ITC 1982: 67-74

Ayakannu Mathialagan, Nripendra N. Biswas: Bit Steering in the Minimization of Control Memory in Microprogrammed Digital Computers. IEEE Trans. Computers 30(2): 144-147 (1981)

Ayakannu Mathialagan, Nripendra N. Biswas: Optimal Interconnections in the Design of Microprocessors and Digital Systems. IEEE Trans. Computers 29(2): 145-149 (1980)

Anil K. Sarje, Nripendra N. Biswas: A New Approach to 2-Asummability Testing. IEEE Trans. Computers 28(10): 798-801 (1979)

Anil K. Sarje, Nripendra N. Biswas: An Algorithm for Testing 2-Asummability of Boolean Functions. IEEE Trans. Computers 26(10): 1049-1053 (1977)

C. V. S. Rao, Nripendra N. Biswas: Further Comments on ``Closure Partition Method for Minimizing Incomplete Sequential Machines. IEEE Trans. Computers 25(7): 767-768 (1976)

C. V. S. Rao, Nripendra N. Biswas: Minimization of Incompletely Specified Sequential Machines. IEEE Trans. Computers 24(11): 1089-1100 (1975)