Eric Beyne

Dragomir Milojevic, Pol Marchal, Erik Jan Marinissen, Geert Van der Plas, Diederik Verkest, Eric Beyne: Design issues in heterogeneous 3D/2.5D integration. ASP-DAC 2013: 403-410

Geert Van der Plas, Paresh Limaye, Igor Loi, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Antonio Pullini, Federico Angiolini, Luca Benini, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal: Design Issues and Considerations for Low-Cost 3-D TSV IC Technology. J. Solid-State Circuits 46(1): 293-307 (2011)

Ingrid De Wolf, K. Croes, O. Varela Pedreira, Riet Labie, A. Redolfi, M. Van De Peer, Kris Vanstreels, C. Okoro, Bart Vandevelde, Eric Beyne: Cu pumping in TSVs: Effect of pre-CMP thermal budget. Microelectronics Reliability 51(9-11): 1856-1859 (2011)

Yuuki Araga, Makoto Nagata, Geert Van der Plas, Jaemin Kim, Nikolaos Minas, Pol Marchal, Youssef Travaly, Michael Libois, Antonio La Manna, Wenqi Zhang, Eric Beyne: In-tier diagnosis of power domains in 3D TSV ICs. 3DIC 2011: 1-6

Eric Beyne: Electrical, thermal and mechanical impact of 3D TSV and 3D stacking technology on advanced CMOS devices - Technology directions. 3DIC 2011: 1-6

Sandip Halder, Ingrid De Wolf, Alain Phommahaxay, Andy Miller, Mireille Maenhoudt, Gerald Beyer, Bart Swinnen, Eric Beyne: In-line metrology and inspection for process control during 3D stacking of IC's. 3DIC 2011: 1-4

Y. H. Hu, C. S. Liu, M. J. Lii, K. J. Rebibis, Anne Jourdain, Antonio La Manna, Gerald Beyer, Eric Beyne, C. H. Yu: 3D stacking using Cu-Cu direct bonding. 3DIC 2011: 1-4

Andrej Ivankovic, Geert Van der Plas, V. Moroz, M. Choi, Vladimir Cherman, Abdelkarim Mercha, Paul Marchal, Marcel Gonzalez, Geert Eneman, W. Zhang, Thibault Buisson, Mikael Detalle, Antonio La Manna, Diederik Verkest, Gerald Beyer, Eric Beyne, Bart Vandevelde, Ingrid De Wolf, Dirk Vandepitte: Analysis of microbump induced stress effects in 3D stacked IC technologies. 3DIC 2011: 1-5

Antonio La Manna, Dimitrios Velenis, Thibault Buisson, Mikael Detalle, K. J. Rebibis, W. Zhang, Eric Beyne: 3D stacking using ultra thin dies. 3DIC 2011: 1-5

Alain Phommahaxay, Anne Jourdain, Greet Verbinnen, Tobias Woitke, Peter Bisson, Markus Gabriel, Walter Spiess, Alice Guerrero, Jeremy McCutcheon, Rama Puligadda, Pieter Bex, Axel Van den Eede, Bart Swinnen, Gerald Beyer, Andy Miller, Eric Beyne: Ultrathin wafer handling in 3D Stacked IC manufacturing combining a novel ZoneBOND™ temporary bonding process with room temperature peel debonding. 3DIC 2011: 1-4

Eric Beyne, Pol Marchal, Geert Van der Plas: 3D heterogeneous system integration: application driver for 3D technology development. DAC 2011: 213

Geert Eneman, J. Cho, V. Moroz, Dragomir Milojevic, M. Choi, Kristin De Meyer, Abdelkarim Mercha, Eric Beyne, Thomas Hoffmann, Geert Van der Plas: An analytical compact model for estimation of stress in multiple Through-Silicon Via configurations. DATE 2011: 505-506

Yann Civale, Marcel Gonzalez, Deniz Sabuncuoglu Tezcan, Youssef Travaly, Philippe Soussan, Eric Beyne: A novel concept for ultra-low capacitance via-last TSV. 3DIC 2010: 1-4

Anne Jourdain, Thibault Buisson, Alain Phommahaxay, Mark Privett, Dan Wallace, Sumant Sood, Peter Bisson, Eric Beyne, Youssef Travaly, Bart Swinnen: 300mm wafer thinning and backside passivation compatibility with temporary wafer bonding for 3D stacked IC applications. 3DIC 2010: 1-4

Dimitrios Velenis, Erik Jan Marinissen, Eric Beyne: Cost effectiveness of 3D integration options. 3DIC 2010: 1-6

Geert Van der Plas, Steven Thijs, Dimitri Linten, Guruprasad Katti, Paresh Limaye, Abdelkarim Mercha, Michele Stucchi, Herman Oprins, Bart Vandevelde, Nikolaos Minas, Miro Cupac, Morin Dehan, Marc Nelis, Rahul Agarwal, Wim Dehaene, Youssef Travaly, Eric Beyne, Paul Marchal: Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions. CICC 2010: 1-4

Geert Van der Plas, Paresh Limaye, Abdelkarim Mercha, Herman Oprins, Cristina Torregiani, Steven Thijs, Dimitri Linten, Michele Stucchi, Guruprasad Katti, Dimitrios Velenis, Domae Shinichi, Vladimir Cherman, Bart Vandevelde, Veerle Simons, Ingrid De Wolf, Riet Labie, Dan Perry, Stephane Bronckers, Nikolaos Minas, Miro Cupac, Wouter Ruythooren, Jan Van Olmen, Alain Phommahaxay, Muriel de Potter de ten Broeck, Ann Opdebeeck, Michal Rakowski, Bart De Wachter, Morin Dehan, Marc Nelis, Rahul Agarwal, Wim Dehaene, Youssef Travaly, Pol Marchal, Eric Beyne: Design issues and considerations for low-cost 3D TSV IC technology. ISSCC 2010: 148-149

Yann Civale, Deniz Sabuncuoglu Tezcan, Harold G. G. Philipsen, P. Jaenen, Rahul Agarwal, F. Duval, Philippe Soussan, Youssef Travaly, Eric Beyne: Die stacking using 3D-wafer level packaging copper/polymer through-si via technology and Cu/Sn interconnect bumping. 3DIC 2009: 1-4

Jan Van Olmen, Jan Coenen, Wim Dehaene, Kristin De Meyer, Cedric Huyghebaert, Anne Jourdain, Guruprasad Katti, Abdelkarim Mercha, Michal Rakowski, Michele Stucchi, Youssef Travaly, Eric Beyne, Bart Swinnen: 3D Stacked IC demonstrator using Hybrid Collective Die-to-Wafer bonding with copper Through Silicon Vias (TSV). 3DIC 2009: 1-5

Dimitrios Velenis, Michele Stucchi, Erik Jan Marinissen, Bart Swinnen, Eric Beyne: Impact of 3D design choices on manufacturing cost. 3DIC 2009: 1-5

Bart Vandevelde, Mario Gonzalez, Paresh Limaye, Petar Ratchev, Eric Beyne: Thermal cycling reliability of SnAgCu and SnPb solder joints: A comparison for several IC-packages. Microelectronics Reliability 47(2-3): 259-265 (2007)

Eric Beyne: Tutorial T7A: Advanced IC Packaging. VLSI Design 2007: 10

J. Balachandran, Steven Brebels, Geert Carchon, Maarten Kuijk, Walter De Raedt, Bart Nauwelaers, Eric Beyne: Wafer-level package interconnect options. IEEE Trans. VLSI Syst. 14(6): 654-659 (2006)

J. Balachandran, Steven Brebels, Geert Carchon, T. Webers, Walter De Raedt, Bart Nauwelaers, Eric Beyne: Analysis and modeling of power grid transmission lines. DATE 2006: 33-38

J. Balachandran, Steven Brebels, Geert Carchon, Walter De Raedt, Eric Beyne, Maarten Kuijk, Bart Nauwelaers: Constant Impedance Scaling Paradigm for Scaling LC transmission lines. ISQED 2006: 387-392

J. Balachandran, Steven Brebels, Geert Carchon, Maarten Kuijk, Walter De Raedt, Bart Nauwelaers, Eric Beyne: Constant impedance scaling paradigm for interconnect synthesis. SLIP 2006: 99-105

J. Balachandran, Steven Brebels, Geert Carchon, T. Webers, Walter De Raedt, Bart Nauwelaers, Eric Beyne: Package level interconnect options. SLIP 2005: 21-27

Bart Vandevelde, Dominiek Degryse, Eric Beyne, Eric Roose, Dorina Corlatan, Guido Swaelen, Geert Willems, Filip Christiaens, Alcatel Bell, Dirk Vandepitte: Modified micro-macro thermo-mechanical modelling of ceramic ball grid array packages. Microelectronics Reliability 43(2): 307-318 (2003)

Arun Chandrasekhar, Steven Brebels, Serguei Stoukatch, Eric Beyne, Walter De Raedt, Bart Nauwelaers: The influence of packaging materials on RF performance. Microelectronics Reliability 43(3): 351-357 (2003)

Hong Meng Ho, Wai Lam, Serguei Stoukatch, Petar Ratchev, Charles J. Vath, Eric Beyne: Direct gold and copper wires bonding on copper. Microelectronics Reliability 43(6): 913-923 (2003)

Philippe Soussan, G. Lekens, R. Dreesen, Ward De Ceuninck, Eric Beyne: Advantage of In-situ over Ex-situ techniques as reliability tool: Aging kinetics of Imec's MCM-D discrete passives devices. Microelectronics Reliability 43(9-11): 1785-1790 (2003)

C. Truzzi, Eric Beyne, E. Ringoot, J. Peeters: Signal propagation in high-speed MCM circuits. ICCD 1995: 12-17