| 2012 | ||
|---|---|---|
| j4 | Luca Vercesi, Luca Fanori, Fernando De Bernardinis, Antonio Liscidini, Rinaldo Castello: A Dither-Less All Digital PLL for Cellular Transmitters. J. Solid-State Circuits 47(8): 1908-1920 (2012) | |
| c14 | Jody Greenberg, Fernando De Bernardinis, Carlo Tinella, Antonio Milani, Johnny Pan, Paola Uggetti, Marco Sosio, Shaoan Dai, Sam Tang, Giovanni Cesura, Gabriele Gandolfi, Vittorio Colonna, Rinaldo Castello: A 40MHz-to-1GHz fully integrated multistandard silicon tuner in 80nm CMOS. ISSCC 2012: 162-164 | |
| 2011 | ||
| c13 | Luca Vercesi, Luca Fanori, Fernando De Bernardinis, Antonio Liscidini, Rinaldo Castello: A dither-less all digital PLL for cellular transmitters. CICC 2011: 1-8 | |
| c12 | Marco Sosio, Antonio Liscidini, Rinaldo Castello, Fernando De Bernardinis: A complete DVB-T/ATSC tuner analog base-band implemented with a single filtering ADC. ESSCIRC 2011: 391-394 | |
| 2010 | ||
| j3 | Pierluigi Nuzzo, Xuening Sun, Chang-Ching Wu, Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli: A Platform-Based Methodology for System-Level Mixed-Signal Design. EURASIP J. Emb. Sys. 2010 (2010) | |
| 2008 | ||
| j2 | Pierluigi Nuzzo, Fernando De Bernardinis, Pierangelo Terreni, Geert Van der Plas: Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures. IEEE Trans. on Circuits and Systems 55-I(6): 1441-1454 (2008) | |
| 2006 | ||
| c11 | Pierluigi Nuzzo, Geert Van der Plas, Fernando De Bernardinis, Liesbet Van der Perre, Bert Gyselinckx, Pierangelo Terreni: A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18mum CMOS with 5.8GHz ERBW. DAC 2006: 873-878 | |
| c10 | Vito Giannini, Pierluigi Nuzzo, Fernando De Bernardinis, Jan Craninckx, Boris Come, Stefano D'Amico, Andrea Baschirotto: A synthesis tool for power-efficient base-band filter design. DATE 2006: 162-163 | |
| c9 | Fernando De Bernardinis, Pierluigi Nuzzo, Alberto L. Sangiovanni-Vincentelli: Robust system level design with analog platforms. ICCAD 2006: 334-341 | |
| 2005 | ||
| p1 | Luca P. Carloni, Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli, Marco Sgroi: Platform-Based and Derivative Design. The Industrial Information Technology Handbook 2005: 1-15 | |
| c8 | Fernando De Bernardinis, Pierluigi Nuzzo, Alberto L. Sangiovanni-Vincentelli: Mixed signal design space exploration through analog platforms. DAC 2005: 875-880 | |
| c7 | Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli: Efficient analog platform characterization through analog constraint graphs. ICCAD 2005: 415-421 | |
| c6 | Fernando De Bernardinis, Pierluigi Nuzzo, Pierangelo Terreni, Alberto L. Sangiovanni-Vincentelli: Enriching an analog platform for analog-to-digital converter design. ISCAS (2) 2005: 1286-1289 | |
| 2004 | ||
| c5 | Alberto L. Sangiovanni-Vincentelli, Luca P. Carloni, Fernando De Bernardinis, Marco Sgroi: Benefits and challenges for platform-based design. DAC 2004: 409-414 | |
| c4 | Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli: A Methodology for System-Level Analog Design Space Exploration. DATE 2004: 676-677 | |
| 2003 | ||
| c3 | Fernando De Bernardinis, Michael I. Jordan, Alberto L. Sangiovanni-Vincentelli: Support vector machines for analog circuit performance representation. DAC 2003: 964-969 | |
| c2 | Fernando De Bernardinis, Luca Fanucci, T. Ramacciotti, Pierangelo Terreni: A QoS Internet Protocol Scheduler on the IXP1200 Network Platform. IWSOC 2003: 394-399 | |
| 2000 | ||
| c1 | Julio Leao da Silva Jr., Marco Sgroi, Fernando De Bernardinis, Suet-Fei Li, Alberto L. Sangiovanni-Vincentelli, Jan M. Rabaey: Wireless protocols design: challenges and opportunities. CODES 2000: 147-151 | |
| 1999 | ||
| j1 | Fernando De Bernardinis, Roberto Roncella, Roberto Saletti, Pierangelo Terreni, Graziano Bertini: An efficient VLSI architecture for real-time additive synthesis of musical signals. IEEE Trans. VLSI Syst. 7(1): 105-110 (1999) | |
Colors in the list of coauthors
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