Marcus Bednara

Ali Ahmadinia, Christophe Bobda, Marcus Bednara, Jürgen Teich: A New Approach for On-line Placement on Reconfigurable Devices. IPDPS 2004

Ali Ahmadinia, Christophe Bobda, Marcus Bednara, Jürgen Teich: Real-Time Configuration Code Decompression for Dynamic FPGA Self-Reconfiguration. IPDPS 2004

Marcus Bednara, Klaus Danne, Markus Deppe, Oliver Oberschelp, Frank Slomka, Jürgen Teich: Design and Implementation of Digital Linear Control Systems on Reconfigurable Hardware. EURASIP J. Adv. Sig. Proc. 2003(6): 594-602 (2003)

Marcus Bednara, Jürgen Teich: Automatic Synthesis of FPGA Processor Arrays from Loop Algorithms. The Journal of Supercomputing 26(2): 149-165 (2003)

Cornelia Grabbe, Marcus Bednara, Joachim von zur Gathen, Jamshid Shokrollahi, Jürgen Teich: A High Performance VLIW Processor for Finite Field Arithmetic. IPDPS 2003: 189

Cornelia Grabbe, Marcus Bednara, Jürgen Teich, Joachim von zur Gathen, Jamshid Shokrollahi: FPGA designs of parallel high performance GF(2²³³) multipliers. ISCAS (2) 2003: 268-271

Marcus Bednara, M. Daldrup, Joachim von zur Gathen, Jamshid Shokrollahi, Jürgen Teich: Reconfigurable Implementation of Elliptic Curve Crypto Algorithms. IPDPS 2002

Marcus Bednara, M. Daldrup, Jürgen Teich, Joachim von zur Gathen, Jamshid Shokrollahi: Tradeoff analysis of FPGA based elliptic curve cryptography. ISCAS (5) 2002: 797-800

Marcus Bednara, Frank Hannig, Jürgen Teich: Generation of Distributed Loop Control. Embedded Processor Design Challenges 2002: 154-170

Marcus Bednara, Oliver Beyer, Jürgen Teich, Rolf Wanka: Tradeoff Analysis and Architecture Design of a Hybrid Hardware/Software Sorter. ASAP 2000: 299-308