| 2013 | ||
|---|---|---|
| c31 | Alan Mishchenko, Niklas Eén, Robert K. Brayton, Jason Baumgartner, Hari Mony, Pradeep Kumar Nalla: GLA: gate-level abstraction revisited. DATE 2013: 1399-1404 | |
| 2012 | ||
| c30 | Jiazhao Xu, Mark Williams, Hari Mony, Jason Baumgartner: Enhanced reachability analysis via automated dynamic netlist-based hint generation. FMCAD 2012: 157-164 | |
| c29 | Jason Baumgartner, Alexander Ivrii, Arie Matsliah, Hari Mony: IC3-guided abstraction. FMCAD 2012: 182-185 | |
| 2011 | ||
| c28 | Michael L. Case, Jason Baumgartner, Hari Mony, Robert Kanzelman: Optimal redundancy removal without fixedpoint computation. FMCAD 2011: 101-108 | |
| c27 | Michael L. Case, Jason Baumgartner, Hari Mony, Robert Kanzelman: Approximate reachability with combined symbolic and ternary simulation. FMCAD 2011: 109-115 | |
| c26 | Jun Sawada, Peter Sandon, Viresh Paruthi, Jason Baumgartner, Michael L. Case, Hari Mony: Hybrid verification of a hardware modular reduction engine. FMCAD 2011: 207-214 | |
| 2010 | ||
| c25 | Jason Baumgartner, Michael L. Case, Hari Mony: Coping with Moore's Law (and more): Supporting arrays in state-of-the-art model checkers. FMCAD 2010: 61-69 | |
| 2009 | ||
| c24 | Hari Mony, Jason Baumgartner, Alan Mishchenko, Robert K. Brayton: Speculative reduction-based scalable redundancy identification. DATE 2009: 1674-1679 | |
| c23 | ||
| c22 | Michael L. Case, Hari Mony, Jason Baumgartner, Robert Kanzelman: Enhanced verification by temporal decomposition. FMCAD 2009: 17-24 | |
| c21 | Jason Baumgartner, Hari Mony, Michael L. Case, Jun Sawada, Karen Yorav: Scalable conditional equivalence checking: An automated invariant-generation based approach. FMCAD 2009: 120-127 | |
| 2008 | ||
| c20 | Jason Baumgartner, Hari Mony, Adnan Aziz: Optimal Constraint-Preserving Netlist Simplification. FMCAD 2008: 1-9 | |
| c19 | Michael L. Case, Alan Mishchenko, Robert K. Brayton, Jason Baumgartner, Hari Mony: Invariant-Strengthened Elimination of Dependent State Elements. FMCAD 2008: 1-9 | |
| 2007 | ||
| c18 | Thuyen Le, Tilman Glökler, Jason Baumgartner: Formal verification of a pervasive interconnect bus system in a high-performance microprocessor. DATE 2007: 219-224 | |
| 2006 | ||
| c17 | Tilman Glökler, Jason Baumgartner, Devi Shanmugam, A. E. (Rick) Seigler, Gary A. Van Huben, Barinjato Ramanandray, Hari Mony, Paul Roessler: Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning. FMCAD 2006: 3-10 | |
| c16 | ||
| c15 | Jason Baumgartner, Hari Mony, Viresh Paruthi, Robert Kanzelman, Geert Janssen: Scalable Sequential Equivalence Checking across Arbitrary Design Transformations . ICCD 2006 | |
| 2005 | ||
| j3 | Rebecca M. Gott, Jason Baumgartner, Paul Roessler, S. I. Joe: Functional formal verification on designs of pSeries microprocessors and communication subsystems. IBM Journal of Research and Development 49(4-5): 565-580 (2005) | |
| c14 | Jason Baumgartner, Hari Mony: Maximal Input Reduction of Sequential Netlists via Synergistic Reparameterization and Localization Strategies. CHARME 2005: 222-237 | |
| c13 | Hari Mony, Jason Baumgartner, Adnan Aziz: Exploiting Constraints in Transformation-Based Verification. CHARME 2005: 269-284 | |
| c12 | Hari Mony, Jason Baumgartner, Viresh Paruthi, Robert Kanzelman: Exploiting suspected redundancy without proving it. DAC 2005: 463-466 | |
| c11 | Christian Jacobi, Kai Weber, Viresh Paruthi, Jason Baumgartner: Automatic Formal Verification of Fused-Multiply-Add FPUs. DATE 2005: 1298-1303 | |
| c10 | Fadi A. Zaraket, Jason Baumgartner, Adnan Aziz: Scalable compositional minimization via static analysis. ICCAD 2005: 1060-1067 | |
| 2004 | ||
| c9 | ||
| c8 | Hari Mony, Jason Baumgartner, Viresh Paruthi, Robert Kanzelman, Andreas Kuehlmann: Scalable Automated Verification via Expert-System Guided Transformations. FMCAD 2004: 159-173 | |
| 2003 | ||
| j2 | Jason Baumgartner, Tamir Heyman, Vigyan Singhal, Adnan Aziz: An Abstraction Algorithm for the Verification of Level-Sensitive Latch-Based Netlists. Formal Methods in System Design 23(1): 39-65 (2003) | |
| 2002 | ||
| j1 | John M. Ludden, Wolfgang Roesner, Gerry M. Heiling, John R. Reysa, Jonathan R. Jackson, Bing-Lun Chu, Michael L. Behm, Jason Baumgartner, Richard D. Peterson, Jamee Abdulhafiz, William E. Bucy, John H. Klaus, Danny J. Klema, Tien N. Le, F. Danette Lewis, Philip E. Milling, Lawrence A. McConville, Bradley S. Nelson, Viresh Paruthi, Travis W. Pouarz, Audre D. Romonosky, Jeff Stuecheli, Kent D. Thompson, Dave W. Victor, Bruce Wile: Functional verification of the POWER4 microprocessor and POWER4 multiprocessor system. IBM Journal of Research and Development 46(1): 53-76 (2002) | |
| c7 | Jason Baumgartner, Andreas Kuehlmann, Jacob A. Abraham: Property Checking via Structural Analysis. CAV 2002: 151-165 | |
| 2001 | ||
| c6 | Andreas Kuehlmann, Jason Baumgartner: Transformation-Based Verification Using Generalized Retiming. CAV 2001: 104-117 | |
| c5 | Jason Baumgartner, Andreas Kuehlmann: Min-Area Retiming on Dynamic Circuit Structures. ICCAD 2001: 176-182 | |
| 2000 | ||
| c4 | Jason Baumgartner, Anson Tripp, Adnan Aziz, Vigyan Singhal, Flemming Andersen: An Abstraction Algorithm for the Verification of Generalized C-Slow Designs. CAV 2000: 5-19 | |
| 1999 | ||
| c3 | Jason Baumgartner, Tamir Heyman, Vigyan Singhal, Adnan Aziz: Model Checking the IBM Gigahertz Processor: An Abstraction Algorithm for High-Performance Netlists. CAV 1999: 72-83 | |
| c2 | Nadeem Malik, Jason Baumgartner, S. Roberts, R. Dobson: A toolset for assisted formal verification. IPCCC 1999: 489-492 | |
| 1998 | ||
| c1 | Nina Saxena, Jason Baumgartner, Avijit Saha, Jacob A. Abraham: To model check or not to model check. ICCD 1998: 314-320 | |
Colors in the list of coauthors
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