| 2007 | ||
|---|---|---|
| c6 | Pietro Babighian, Gila Kamhi, Moshe Y. Vardi: Interactive presentation: PowerQuest: trace driven data mining for power optimization. DATE 2007: 1078-1083 | |
| 2006 | ||
| c5 | Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii: Enabling fine-grain leakage management by voltage anchor insertion. DATE 2006: 868-873 | |
| 2005 | ||
| j1 | Pietro Babighian, Luca Benini, Enrico Macii: A scalable algorithm for RTL insertion of gated clocks based on ODCs computation. IEEE Trans. on CAD of Integrated Circuits and Systems 24(1): 29-42 (2005) | |
| c4 | Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii: Low-overhead state-retaining elements for low-leakage MTCMOS design. ACM Great Lakes Symposium on VLSI 2005: 367-370 | |
| 2004 | ||
| c3 | Pietro Babighian, Luca Benini, Enrico Macii: A Scalable ODC-Based Algorithm for RTL Insertion of Gated Clocks. DATE 2004: 500-505 | |
| c2 | Pietro Babighian, Luca Benini, Enrico Macii: Sizing and Characterization of Leakage-Control Cells for Layout-Aware Distributed Power-Gating. DATE 2004: 720-723 | |
| c1 | Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii: Post-layout leakage power minimization based on distributed sleep transistor insertion. ISLPED 2004: 138-143 | |
| 1 | Luca Benini | |
| 2 | Gila Kamhi | |
| 3 | Alberto Macii | |
| 4 | Enrico Macii | |
| 5 | Moshe Y. Vardi |
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