Maria J. Avedillo Coauthor index pubzone.org

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c34Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Juan Núñez, Maria J. Avedillo, José M. Quintana: Compact and Power Efficient MOS-NDR Muller C-Elements. DoCEIS 2012: 437-442
c33Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Juan Núñez, Maria J. Avedillo, José M. Quintana: Two-Phase MOBILE Interconnection Schemes for Ultra-Grain Pipeline Applications. PATMOS 2012: 166-174
2011
c32Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Juan Núñez, Maria J. Avedillo, José M. Quintana: Efficient realization of RTD-CMOS logic gates. ACM Great Lakes Symposium on VLSI 2011: 387-390
2010
c31Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Juan Núñez, Maria J. Avedillo, José M. Quintana: Evaluation of RTD-CMOS Logic Gates. DSD 2010: 621-627
c30Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Juan Núñez, Maria J. Avedillo, José M. Quintana: Single phase MOS-NDR mobile networks. ISCAS 2010: 153-156
c29Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Héctor Pettenghi, Ricardo Chaves, Leonel Sousa, Maria J. Avedillo: An improved RNS generator 2n +/- k based on threshold logic. VLSI-SoC 2010: 119-124
2009
j7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
José M. Quintana, Maria J. Avedillo, Juan Núñez, Héctor Pettenghi: Operation Limits for RTD-Based MOBILE Circuits. IEEE Trans. on Circuits and Systems 56-I(2): 350-363 (2009)
c28Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Juan Núñez, José M. Quintana, Maria J. Avedillo: Fast and Area Efficient Multi-input Muller C-Element based on MOS-NDR. ISCAS 2009: 1811-1814
2008
j6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Héctor Pettenghi, Maria J. Avedillo, José M. Quintana: Using multi-threshold threshold gates in RTD-based logic design: A case study. Microelectronics Journal 39(2): 241-247 (2008)
c27Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Juan Núñez, José M. Quintana, Maria J. Avedillo: Limits to a correct operation in RTD-based ternary inverters. ISCAS 2008: 604-607
c26Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Héctor Pettenghi, Maria J. Avedillo, José M. Quintana: A novel contribution to the RTD-based threshold logic family. ISCAS 2008: 2350-2353
2007
c25Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Juan Núñez, José M. Quintana, Maria J. Avedillo: Operation limits in RTD-based ternary quantizers. ACM Great Lakes Symposium on VLSI 2007: 114-119
c24Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Héctor Pettenghi, Maria J. Avedillo, José M. Quintana: Non Return Mobile Logic Family. ISCAS 2007: 125-128
c23Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Juan Núñez, José M. Quintana, Maria J. Avedillo: Limits to a Correct Evaluation in RTD-Based Quaternary Inverters. ISMVL 2007: 51
c22Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Juan Núñez, José M. Quintana, Maria J. Avedillo: A quasi-differential quantizer based on SMOBILE. SBCCI 2007: 251-256
2006
c21Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
José M. Quintana, Maria J. Avedillo, Juan Núñez: Design Guides for a Correct DC Operation in RTD-based Threshold Gates. DSD 2006: 530-536
c20Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
José M. Quintana, Maria J. Avedillo, Héctor Pettenghi: Self-latching operation limits for MOBILE circuits. ISCAS 2006
2005
c19Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Maria J. Avedillo, José M. Quintana, Héctor Pettenghi: Logic Models Supporting the Design of MOBILE-based RTD Circuits. ASAP 2005: 254-259
c18Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Maria J. Avedillo, José M. Quintana, José L. Huertas: Robust frequency divider based on resonant tunneling devices. ISCAS (3) 2005: 2647-2650
2004
j5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Maria J. Avedillo, José M. Quintana, Raúl Jiménez-Naharro: Pass-transistor based implementations of threshold logic gates for WOS filtering. Microelectronics Journal 35(11): 869-873 (2004)
j4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Maria J. Avedillo, José M. Quintana, Hamid El Alami, Antonio Jiménez-Calderón: A Practical Parallel Architecture for Stacks Filters. VLSI Signal Processing 38(2): 91-100 (2004)
c17Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Maria J. Avedillo, José M. Quintana: A Threshold Logic Synthesis Tool for RTD Circuits. DSD 2004: 624-627
c16no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
José M. Quintana, Maria J. Avedillo, Héctor Pettenghi: Programmable logic gate based on resonant tunnelling devices. ISCAS (3) 2004: 697-700
2003
j3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Valeriu Beiu, José M. Quintana, Maria J. Avedillo: VLSI implementations of threshold logic-a comprehensive survey. IEEE Transactions on Neural Networks 14(5): 1217-1243 (2003)
c15Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Valeriu Beiu, Maria J. Avedillo, José M. Quintana: Review of Capacitive Threshold Gate Implementations. ICANN 2003: 737-744
c14no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Valeriu Beiu, José M. Quintana, Maria J. Avedillo: Review of Differential Threshold Gate Implementations. Neural Networks and Computational Intelligence 2003: 44-49
2002
c13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Manuel Martínez, Maria J. Avedillo, José M. Quintana, H. Süß, Manfred Koegst: An Encoding Technique for Low Power CMOS Implementations of Controllers. DATE 2002: 1083
c12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Esther Rodríguez-Villegas, José M. Quintana, Maria J. Avedillo, Adoración Rueda: High-speed low-power logic gates using floating gates. ISCAS (5) 2002: 389-392
c11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
José M. Quintana, Maria J. Avedillo, José L. Huertas: Simplified Reed-Muller expressions for residue threshold functions. ISCAS (4) 2002: 599-602
c10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Maria J. Avedillo, José M. Quintana, Esther Rodríguez-Villegas: Simple parallel weighted order statistic filter implementations. ISCAS (4) 2002: 607-610
2001
j2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
José M. Quintana, Maria J. Avedillo, José Luis Huertas: Efficient Realization of a Threshold Voter for Self-Purging Redundancy. J. Electronic Testing 17(1): 69-73 (2001)
c9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Manfred Koegst, Steffen Rülke, Günter Franke, Maria J. Avedillo: Two-Criterial Constraint-Driven FSM State Encoding for Low Power. DSD 2001: 94-101
c8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
José M. Quintana, Maria J. Avedillo, Raúl Jiménez, Esther Rodríguez-Villegas: Practical low-cost CPL implementations threshold logic functions. ACM Great Lakes Symposium on VLSI 2001: 139-144
c7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
José M. Quintana, Maria J. Avedillo: Reed-Muller descriptions of symmetric functions. ISCAS (4) 2001: 682-685
1999
c6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Manuel Martínez, Maria J. Avedillo, José M. Quintana, José L. Huertas: An Algorithm for Face-Constrained Encoding of Symbols Using Minimum Code Length. DATE 1999: 521-525
c5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Esther Rodríguez-Villegas, Maria J. Avedillo, José M. Quintana, Gloria Huertas, Adoración Rueda: vMOS-based sorters for multiplier implementations. ISCAS (1) 1999: 338-341
1998
c4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Manuel Martínez, Maria J. Avedillo, José M. Quintana, José L. Huertas: A Dynamic Model for the State Assignment Problem. DATE 1998: 835-839
1995
j1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Maria J. Avedillo, José M. Quintana, José Luis Huertas: Constrained state assignment of easily testable FSMs. J. Electronic Testing 6(1): 133-138 (1995)
c3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
José M. Quintana, Maria J. Avedillo, Maria P. Parra, José L. Huertas: Optimum PLA folding through boolean satisfiability. ASP-DAC 1995
1993
c2no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Maria J. Avedillo, José M. Quintana, José L. Huertas: Easily Testable PLA-based FSMS. ISCAS 1993: 1603-1606
1990
c1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Maria J. Avedillo, José M. Quintana, José Luis Huertas: A new method for the state reduction of incompletely specified finite sequential machines. EURO-DAC 1990: 552-556

Coauthor Index

1Hamid El Alami
[j4]
2Valeriu Beiu
[j3] [c15] [c14]
3Ricardo Chaves
[c29]
4Günter Franke
[c9]
5Gloria Huertas
[c5]
6José Luis Huertas (José L. Huertas)
[c18] [c11] [j2] [c6] [c4] [j1] [c3] [c2] [c1]
7Raúl Jiménez
[c8]
8Antonio Jiménez-Calderón
[j4]
9Raúl Jiménez-Naharro
[j5]
10Manfred Koegst
[c13] [c9]
11Manuel Martínez
[c13] [c6] [c4]
12Juan Núñez
[c34] [c33] [c32] [c31] [c30] [j7] [c28] [c27] [c25] [c23] [c22] [c21]
13Maria P. Parra
[c3]
14Héctor Pettenghi
[c29] [j7] [j6] [c26] [c24] [c20] [c19] [c16]
15José M. Quintana
[c34] [c33] [c32] [c31] [c30] [j7] [c28] [j6] [c27] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [c19] [c18] [j5] [j4] [c17] [c16] [j3] [c15] [c14] [c13] [c12] [c11] [c10] [j2] [c8] [c7] [c6] [c5] [c4] [j1] [c3] [c2] [c1]
16Esther Rodríguez-Villegas
[c12] [c10] [c8] [c5]
17Adoración Rueda
[c12] [c5]
18Steffen Rülke
[c9]
19Leonel Sousa (Leonel Augusto Sousa)
[c29]
20H. Süß
[c13]
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