Elisardo Antelo

Lois Orosa, Elisardo Antelo, Javier D. Bruguera: FlexSig: Implementing flexible hardware signatures. TACO 8(4): 30 (2012)

Elisardo Antelo, David Hough, Paolo Ienne: Guest Editors' Introduction: Special Section on Computer Arithmetic. IEEE Trans. Computers 61(8): 1057-1058 (2012)

Álvaro Vázquez, Julio Villalba-Moreno, Elisardo Antelo, Emilio L. Zapata: Redundant Floating-Point Decimal CORDIC Algorithm. IEEE Trans. Computers 61(11): 1551-1562 (2012)

Fabrizio Lamberti, Nikolaos Andrikos, Elisardo Antelo, Paolo Montuschi: Reducing the Computation Time in (Short Bit-Width) Two's Complement Multipliers. IEEE Trans. Computers 60(2): 148-156 (2011)

Elisardo Antelo, David Hough, Paolo Ienne (Eds.): 20th IEEE Symposium on Computer Arithmetic, ARITH 2011, Tübingen, Germany, 25-27 July 2011. IEEE Computer Society 2011, isbn 978-0-7695-4318-5

Álvaro Vázquez, Elisardo Antelo, Paolo Montuschi: Improved Design of High-Performance Parallel Decimal Multipliers. IEEE Trans. Computers 59(5): 679-693 (2010)

Elisardo Antelo: A Comment on "Beyond Fat-tree: Unidirectional Load-Balanced Multistage Interconnection Network". Computer Architecture Letters 8(1): 33-34 (2009)

Álvaro Vázquez, Elisardo Antelo: A High-Performance Significand BCD Adder with IEEE 754-2008 Decimal Rounding. IEEE Symposium on Computer Arithmetic 2009: 135-144

Álvaro Vázquez, Julio Villalba, Elisardo Antelo: Computation of Decimal Transcendental Functions Using the CORDIC Algorithm. IEEE Symposium on Computer Arithmetic 2009: 179-186

Elisardo Antelo, Julio Villalba, Emilio L. Zapata: A Low-Latency Pipelined 2D and 3D CORDIC Processors. IEEE Trans. Computers 57(3): 404-417 (2008)

Álvaro Vázquez, Elisardo Antelo: New insights on Ling adders. ASAP 2008: 227-232

Álvaro Vázquez, Elisardo Antelo, Paolo Montuschi: A New Family of High.Performance Parallel Decimal Multipliers. IEEE Symposium on Computer Arithmetic 2007: 195-204

Álvaro Vázquez, Elisardo Antelo, Paolo Montuschi: A radix-10 SRT divider based on alternative BCD codings. ICCD 2007: 280-287

Tomás Lang, Elisardo Antelo: High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics. IEEE Trans. Computers 54(3): 347-361 (2005)

Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli: Digit-Recurrence Dividers with Reduced Logical Depth. IEEE Trans. Computers 54(7): 837-851 (2005)

Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli: Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture. IEEE Symposium on Computer Arithmetic 2005: 147-154

Elisardo Antelo, Julio Villalba: Low Latency Pipelined Circular CORDIC. IEEE Symposium on Computer Arithmetic 2005: 280-287

Tomás Lang, Elisardo Antelo: Radix-4 Reciprocal Square-Root and Its Combination with Division and Square Root. IEEE Trans. Computers 52(9): 1100-1114 (2003)

Álvaro Vázquez, Elisardo Antelo: Implementation of the Exponential Function in a Floating-Point Unit. VLSI Signal Processing 33(1-2): 125-145 (2003)

Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli: Fast Radix-4 Retimed Division with Selection by Comparisons. ASAP 2002: 185-196

Tomás Lang, Elisardo Antelo: Correctly Rounded Reciprocal Square-Root by Digit Recurrence and Radix-4 Implementation. IEEE Symposium on Computer Arithmetic 2001: 83-93

Elisardo Antelo, Tomás Lang, Javier D. Bruguera: Very-High Radix Circular CORDIC: Vectoring and Unified Rotation/Vectoring. IEEE Trans. Computers 49(7): 727-739 (2000)

Tomás Lang, Elisardo Antelo: CORDIC-Based Computation of ArcCos. VLSI Signal Processing 25(1): 19-38 (2000)

Elisardo Antelo, Tomás Lang, Javier D. Bruguera: Very-High Radix CORDIC Rotation Based on Selection by Rounding. VLSI Signal Processing 25(2): 141-153 (2000)

Elisardo Antelo, Tomás Lang, Javier D. Bruguera: Very-High Radix CORDIC Vectoring with Scalings and Selection by Rounding. IEEE Symposium on Computer Arithmetic 1999: 204-

Elisardo Antelo, Tomás Lang, Javier D. Bruguera: Computation of sqrt(x/d) in a Very High Radix Combined Division/Square-Root Unit with Scaling. IEEE Trans. Computers 47(2): 152-161 (1998)

Tomás Lang, Elisardo Antelo: CORDIC Vectoring with Arbitrary Target Value. IEEE Trans. Computers 47(7): 736-749 (1998)

Elisardo Antelo, Montserrat Bóo, Javier D. Bruguera, Emilio L. Zapata: A novel design of a two operand normalization circuit. IEEE Trans. VLSI Syst. 6(1): 173-176 (1998)

Julio Villalba, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera: Radix-4 Vectoring CORDIC Algorithm and Architectures. VLSI Signal Processing 19(2): 127-147 (1998)

Elisardo Antelo, Julio Villalba, Javier D. Bruguera, Emilio L. Zapata: High Performance Rotation Architectures Based on the Radix-4 CORDIC Algorithm. IEEE Trans. Computers 46(8): 855-870 (1997)

Elisardo Antelo, Javier D. Bruguera, Tomás Lang, Emilio L. Zapata: Error Analysis and Reduction for Angle Calculation Using the CORDIC Algorithm. IEEE Trans. Computers 46(11): 1264-1271 (1997)

Tomás Lang, Elisardo Antelo: CORDIC Vectoring with Arbitrary Target Value. IEEE Symposium on Computer Arithmetic 1997: 108-115

Tomás Lang, Elisardo Antelo: CORDIC-based computation of arccos and arcsin. ASAP 1997: 132-143

Elisardo Antelo, Javier D. Bruguera, Emilio L. Zapata: Unified Mixed Radix 2-4 Redundant CORDIC Processor. IEEE Trans. Computers 45(9): 1068-1073 (1996)

Julio Villalba, J. C. Arrabal, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera: Radix-4 Vectoring Cordic Algorithm And Architectures. ASAP 1996: 55-64

Elisardo Antelo, Javier D. Bruguera, Tomás Lang, Julio Villalba, Emilio L. Zapata: High Radix Cordic Rotation Based on Selection by Rounding. Euro-Par, Vol. II 1996: 155-164

Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata: Redundant CORDIC Rotator Based on Parallel Prediction. IEEE Symposium on Computer Arithmetic 1995: 172-179

Roberto R. Osorio, Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata: Digit On-line Large Radix CORDIC Rotator. ASAP 1995: 246-257

Julio Villalba, J. A. Hidalgo, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera: CORDIC Architectures with Parallel Compensation of the Scale Factor. ASAP 1995: 258-269

Javier D. Bruguera, Elisardo Antelo, Emilio L. Zapata: Design of a Pipelined Radix 4 CORDIC Processor. Parallel Computing 19(7): 729-744 (1993)