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 | 2012 | |
|---|---|---|
| j2 |      | William V. Kritikos, Andrew G. Schmidt, Ron Sass, Erik K. Anderson, Matthew French: Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip. Int. J. Reconfig. Comp. 2012 (2012) |
| 2010 | ||
| c9 | | Andrew G. Schmidt, William V. Kritikos, Ron Sass, Erik K. Anderson, Matthew French: Merging Programming Models and On-chip Networks to Meet the Programmable and Performance Needs of Multi-core Systems on a Programmable Chip. ReConFig 2010: 334-339 |
| 2008 | ||
| j1 | | David L. Andrews, Ron Sass, Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp: Achieving Programming Model Abstractions for Reconfigurable Computing. IEEE Trans. VLSI Syst. 16(1): 34-44 (2008) |
| c8 |  | Erik K. Anderson, Matthew French, Dong-In Kang: System on a Programmable Chip Adaptation Through Active Partial Reconfiguration. ERSA 2008: 104-110 |
| c7 | | Matthew French, Erik K. Anderson, Dong-In Kang: Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration. FCCM 2008: 77-86 |
| 2007 | ||
| c6 | | Erik K. Anderson, Wesley Peck, Jim Stevens, Jason Agron, Fabrice Baijot, Seth Warn, David L. Andrews: Memory Hierarchy for MCSoPC Multithreaded Systems. ERSA 2007: 44-50 |
| c5 | | Erik K. Anderson, Wesley Peck, Jim Stevens, Jason Agron, Fabrice Baijot, Seth Warn, David L. Andrews: Supporting High Level Language Semantics Within Hardware Resident Threads. FPL 2007: 98-103 |
| 2006 | ||
| c4 | | David L. Andrews, Ron Sass, Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp: The Case for High Level Programming Models for Reconfigurable Computers. ERSA 2006: 21-32 |
| c3 | | Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp, Ron Sass, David L. Andrews: Enabling a Uniform Programming Model Across the Software/Hardware Boundary. FCCM 2006: 89-98 |
| c2 | | Wesley Peck, Erik K. Anderson, Jason Agron, Jim Stevens, Fabrice Baijot, David L. Andrews: Hthreads: A Computational Model for Reconfigurable Devices. FPL 2006: 1-4 |
| c1 | | Jason Agron, Wesley Peck, Erik K. Anderson, David L. Andrews, Ed Komp, Ron Sass, Fabrice Baijot, Jim Stevens: Run-Time Services for Hybrid CPU/FPGA Systems on Chip. RTSS 2006: 3-12 |
| 1 | Jason Agron | |
| 2 | David L. Andrews | |
| 3 | Fabrice Baijot | |
| 4 | Matthew French | |
| 5 | Dong-In Kang | |
| 6 | Ed Komp | |
| 7 | William V. Kritikos | |
| 8 | Wesley Peck | |
| 9 | Ron Sass (Ron R. Sass) | |
| 10 | Andrew G. Schmidt | |
| 11 | Jim Stevens | |
| 12 | Seth Warn |
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