Herschel A. Ainspan

Timothy O. Dickson, Yong Liu, Sergey V. Rylov, Bing Dang, Cornelia K. Tsang, Paul S. Andry, John F. Bulzacchelli, Herschel A. Ainspan, Xiaoxiong Gu, Lavanya Turlapati, Michael P. Beakes, Benjamin D. Parker, John U. Knickerbocker, Daniel J. Friedman: An 8x 10-Gb/s Source-Synchronous I/O System Based on High-Density Silicon Carrier Interconnects. J. Solid-State Circuits 47(4): 884-896 (2012)

John F. Bulzacchelli, Christian Menolfi, Troy J. Beukema, Daniel Storaska, Juergen Hertle, David Hanson, Ping-Hsuan Hsieh, Sergey V. Rylov, Daniel Furrer, Daniele Gardellini, Andrea Prati, Thomas Morf, Vivek Sharma, Ram Kelkar, Herschel A. Ainspan, W. R. Kelly, L. R. Chieco, Glenn Ritter, J. A. Sorice, Jon Garlett, Robert Callan, Matthias Braendli, Peter Buchmann, Marcel A. Kossel, Thomas Toifl, Daniel J. Friedman: A 28-Gb/s 4-Tap FFE/15-Tap DFE Serial Link Transceiver in 32-nm SOI CMOS Technology. J. Solid-State Circuits 47(12): 3232-3248 (2012)

John F. Bulzacchelli, Troy J. Beukema, Daniel Storaska, Ping-Hsuan Hsieh, Sergey V. Rylov, Daniel Furrer, Daniele Gardellini, Andrea Prati, Christian Menolfi, David Hanson, Juergen Hertle, Thomas Morf, Vivek Sharma, Ram Kelkar, Herschel A. Ainspan, William Kelly, Glenn Ritter, Jon Garlett, Robert Callan, Thomas Toifl, Daniel J. Friedman: A 28Gb/s 4-tap FFE/15-tap DFE serial link transceiver in 32nm SOI CMOS technology. ISSCC 2012: 324-326

Alexander Rylyakov, José A. Tierno, Herschel A. Ainspan, Jean-Olivier Plouchart, John F. Bulzacchelli, Zeynep Toprak Deniz, Daniel J. Friedman: Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications. ISSCC 2009: 94-95

John F. Bulzacchelli, Timothy O. Dickson, Zeynep Toprak Deniz, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Sergey V. Rylov, Daniel J. Friedman: A 78mW 11.1Gb/s 5-tap DFE receiver with digitally calibrated current-integrating summers in 65nm CMOS. ISSCC 2009: 368-369

Woogeun Rhee, Keith A. Jenkins, John Liobe, Herschel A. Ainspan: Experimental Analysis of Substrate Noise Effect on PLL Performance. IEEE Trans. on Circuits and Systems 55-II(7): 638-642 (2008)

Daniel J. Friedman, Mounir Meghelli, Benjamin D. Parker, Jungwook Yang, Herschel A. Ainspan, Alexander Rylyakov, Young Hoon Kwark, Mark B. Ritter, Lei Shan, Steven J. Zier, Michael Sorna, Mehmet Soyuer: SiGe BiCMOS integrated circuits for high-speed serial communication links. IBM Journal of Research and Development 47(2-3): 259-282 (2003)

Scott K. Reynolds, Brian A. Floyd, Troy J. Beukema, Thomas Zwick, Ullrich R. Pfeiffer, Herschel A. Ainspan: A direct-conversion receiver integrated circuit for WCDMA mobile systems. IBM Journal of Research and Development 47(2-3): 337-354 (2003)

Daniel M. Kuchta, Herschel A. Ainspan, Frank J. Canora, Richard P. Schneider Jr.: Performance of fiber-optic data links using 670-nm cw VCSELs and a monolithic Si photodetector and CMOS preamplifier. IBM Journal of Research and Development 39(1-2): 63-72 (1995)

John F. Ewen, Mehmet Soyuer, Albert X. Widmer, Kevin R. Wrenner, Benjamin D. Parker, Herschel A. Ainspan: CMOS circuits for Gb/s serial data communication. IBM Journal of Research and Development 39(1-2): 73-82 (1995)

Mehmet Soyuer, Herschel A. Ainspan, John F. Ewen: A 1.6-Gb/s CMOS Phase-Frequency Locked Loop for Timing Recovery. ISCAS 1995: 187-190