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BibTeX records: Woo-Seung Yang
@article{DBLP:journals/jcsc/YangK05, author = {Woo{-}Seung Yang and Chong{-}Min Kyung}, title = {Conscep: a Configurable Soc Emulation Platform for C-based Fast Prototyping}, journal = {J. Circuits Syst. Comput.}, volume = {14}, number = {1}, pages = {137--158}, year = {2005}, url = {https://doi.org/10.1142/S0218126605002210}, doi = {10.1142/S0218126605002210}, timestamp = {Tue, 25 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jcsc/YangK05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/LeeYKKK05, author = {Jae{-}Gon Lee and Woo{-}Seung Yang and Young{-}Su Kwon and Young{-}Il Kim and Chong{-}Min Kyung}, editor = {Tingao Tang}, title = {Simulation acceleration of transaction-level models for SoC with {RTL} sub-blocks}, booktitle = {Proceedings of the 2005 Conference on Asia South Pacific Design Automation, {ASP-DAC} 2005, Shanghai, China, January 18-21, 2005}, pages = {499--502}, publisher = {{ACM} Press}, year = {2005}, url = {https://doi.org/10.1145/1120725.1120921}, doi = {10.1145/1120725.1120921}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/aspdac/LeeYKKK05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/KimYKK04, author = {Young{-}Il Kim and Woo{-}Seung Yang and Young{-}Su Kwon and Chong{-}Min Kyung}, editor = {Sharad Malik and Limor Fix and Andrew B. Kahng}, title = {Communication-efficient hardware acceleration for fast functional simulation}, booktitle = {Proceedings of the 41th Design Automation Conference, {DAC} 2004, San Diego, CA, USA, June 7-11, 2004}, pages = {293--298}, publisher = {{ACM}}, year = {2004}, url = {https://doi.org/10.1145/996566.996654}, doi = {10.1145/996566.996654}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/KimYKK04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/KwonYK03, author = {Young{-}Su Kwon and Woo{-}Seung Yang and Chong{-}Min Kyung}, editor = {Manfred Glesner and Ricardo Augusto da Luz Reis and Hans Eveking and Vincent John Mooney III and Leandro Soares Indrusiak and Peter Zipf}, title = {Signal Scheduling Driven Circuit Partitioning for Multiple FPGAs with Time-multiplexed Interconnection}, booktitle = {{IFIP} VLSI-SoC 2003, {IFIP} {WG} 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003}, pages = {123--128}, publisher = {Technische Universit{\"{a}}t Darmstadt, Insitute of Microelectronic Systems}, year = {2003}, timestamp = {Thu, 07 Oct 2004 09:29:26 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/KwonYK03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/YangPK01, author = {Woo{-}Seung Yang and In{-}Cheol Park and Chong{-}Min Kyung}, editor = {Satoshi Goto}, title = {Low-power high-level synthesis using latches}, booktitle = {Proceedings of {ASP-DAC} 2001, Asia and South Pacific Design Automation Conference 2001, January 30-February 2, 2001, Yokohama, Japan}, pages = {462--466}, publisher = {{ACM}}, year = {2001}, url = {https://doi.org/10.1145/370155.370513}, doi = {10.1145/370155.370513}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/aspdac/YangPK01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cicc/KimYSMBP00, author = {Hansoo Kim and Woo{-}Seung Yang and Myoung{-}Cheol Shin and Seung{-}Jai Min and Seong{-}Ok Bae and In{-}Cheol Park}, title = {Multi-thread {VLIW} processor architecture for {HDTV} decoding}, booktitle = {Proceedings of the {IEEE} 2000 Custom Integrated Circuits Conference, {CICC} 2000, Orlando, FL, USA, May 21-24, 2000}, pages = {559--562}, publisher = {{IEEE}}, year = {2000}, url = {https://doi.org/10.1109/CICC.2000.852730}, doi = {10.1109/CICC.2000.852730}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cicc/KimYSMBP00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/YimPYOLCKLWLPK97, author = {Joon{-}Seo Yim and Chang{-}Jae Park and Woo{-}Seung Yang and Hun{-}Seung Oh and Hee{-}Choul Lee and Hoon Choi and Tae{-}Hoon Kim and Seungjong Lee and Nara Won and Yung{-}Hei Lee and In{-}Cheol Park and Chong{-}Min Kyung}, title = {Verification methodology of compatible microprocessors}, booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation Conference, Nippon Convention Center, Chiba, Japan, January 28-31, 1997}, pages = {173--180}, publisher = {{IEEE}}, year = {1997}, url = {https://doi.org/10.1109/ASPDAC.1997.600108}, doi = {10.1109/ASPDAC.1997.600108}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aspdac/YimPYOLCKLWLPK97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/YimHPCYOPK97, author = {Joon{-}Seo Yim and Yoon{-}Ho Hwang and Chang{-}Jae Park and Hoon Choi and Woo{-}Seung Yang and Hun{-}Seung Oh and In{-}Cheol Park and Chong{-}Min Kyung}, editor = {Ellen J. Yoffa and Giovanni De Micheli and Jan M. Rabaey}, title = {A C-Based {RTL} Design Verification Methodology for Complex Microprocessor}, booktitle = {Proceedings of the 34st Conference on Design Automation, Anaheim, California, USA, Anaheim Convention Center, June 9-13, 1997}, pages = {83--88}, publisher = {{ACM} Press}, year = {1997}, url = {https://doi.org/10.1145/266021.266040}, doi = {10.1145/266021.266040}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/YimHPCYOPK97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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