default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDBibTeX records: Chengyong Wu
@article{DBLP:journals/ijpp/LiLWFW17,
author = {Jing Li and
Lei Liu and
Yuan Wu and
Xiaobing Feng and
Chengyong Wu},
title = {Two-Level Task Scheduling for Irregular Applications on {GPU} Platform},
journal = {Int. J. Parallel Program.},
volume = {45},
number = {1},
pages = {79--93},
year = {2017},
url = {https://doi.org/10.1007/s10766-015-0387-0},
doi = {10.1007/S10766-015-0387-0},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/LiLWFW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcst/LiLWLGFW16,
author = {Jing Li and
Lei Liu and
Yuan Wu and
Xiang{-}Hua Liu and
Yi Gao and
Xiaobing Feng and
Chengyong Wu},
title = {Pragma Directed Shared Memory Centric Optimizations on GPUs},
journal = {J. Comput. Sci. Technol.},
volume = {31},
number = {2},
pages = {235--252},
year = {2016},
url = {https://doi.org/10.1007/s11390-016-1624-8},
doi = {10.1007/S11390-016-1624-8},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcst/LiLWLGFW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LiuLDYW16,
author = {Lei Liu and
Yong Li and
Chen Ding and
Hao Yang and
Chengyong Wu},
title = {Rethinking Memory Management in Modern Operating System: Horizontal,
Vertical or Random?},
journal = {{IEEE} Trans. Computers},
volume = {65},
number = {6},
pages = {1921--1935},
year = {2016},
url = {https://doi.org/10.1109/TC.2015.2462813},
doi = {10.1109/TC.2015.2462813},
timestamp = {Wed, 22 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LiuLDYW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/ChenDSWWCT15,
author = {Tianshi Chen and
Zidong Du and
Ninghui Sun and
Jia Wang and
Chengyong Wu and
Yunji Chen and
Olivier Temam},
title = {A High-Throughput Neural Network Accelerator},
journal = {{IEEE} Micro},
volume = {35},
number = {3},
pages = {24--32},
year = {2015},
url = {https://doi.org/10.1109/MM.2015.41},
doi = {10.1109/MM.2015.41},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/ChenDSWWCT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/FangXCETCW015,
author = {Shuangde Fang and
Wenwen Xu and
Yang Chen and
Lieven Eeckhout and
Olivier Temam and
Yunji Chen and
Chengyong Wu and
Xiaobing Feng},
title = {Practical Iterative Optimization for the Data Center},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {12},
number = {2},
pages = {15:1--15:26},
year = {2015},
url = {https://doi.org/10.1145/2739048},
doi = {10.1145/2739048},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/FangXCETCW015.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DuLCPTW15,
author = {Zidong Du and
Avinash Lingamneni and
Yunji Chen and
Krishna V. Palem and
Olivier Temam and
Chengyong Wu},
title = {Leveraging the Error Resilience of Neural Networks for Designing Highly
Energy Efficient Accelerators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {8},
pages = {1223--1235},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2419628},
doi = {10.1109/TCAD.2015.2419628},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DuLCPTW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tocs/ChenZLDLGLWWSCT15,
author = {Tianshi Chen and
Shijin Zhang and
Shaoli Liu and
Zidong Du and
Tao Luo and
Yuan Gao and
Junjie Liu and
Dongsheng Wang and
Chengyong Wu and
Ninghui Sun and
Yunji Chen and
Olivier Temam},
title = {A Small-Footprint Accelerator for Large-Scale Neural Networks},
journal = {{ACM} Trans. Comput. Syst.},
volume = {33},
number = {2},
pages = {6:1--6:27},
year = {2015},
url = {https://doi.org/10.1145/2701417},
doi = {10.1145/2701417},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tocs/ChenZLDLGLWWSCT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/DengFDWLTINLCW15,
author = {Jiachao Deng and
Yuntan Fang and
Zidong Du and
Ying Wang and
Huawei Li and
Olivier Temam and
Paolo Ienne and
David Novo and
Xiaowei Li and
Yunji Chen and
Chengyong Wu},
editor = {Wolfgang Nebel and
David Atienza},
title = {Retraining-based timing error mitigation for hardware neural networks},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {593--596},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755887},
timestamp = {Thu, 11 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/DengFDWLTINLCW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/DuRCHCZWT15,
author = {Zidong Du and
Daniel D. Ben{-}Dayan Rubin and
Yunji Chen and
Liqiang He and
Tianshi Chen and
Lei Zhang and
Chengyong Wu and
Olivier Temam},
editor = {Milos Prvulovic},
title = {Neuromorphic accelerators: a comparison between neuroscience and machine-learning
approaches},
booktitle = {Proceedings of the 48th International Symposium on Microarchitecture,
{MICRO} 2015, Waikiki, HI, USA, December 5-9, 2015},
pages = {494--507},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2830772.2830789},
doi = {10.1145/2830772.2830789},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/DuRCHCZWT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/LiuCLBCW14,
author = {Lei Liu and
Zehan Cui and
Yong Li and
Yungang Bao and
Mingyu Chen and
Chengyong Wu},
title = {{BPM/BPM+:} Software-based dynamic memory partitioning mechanisms
for mitigating {DRAM} bank-/channel-level interferences in multicore
systems},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {11},
number = {1},
pages = {5:1--5:28},
year = {2014},
url = {https://doi.org/10.1145/2579672},
doi = {10.1145/2579672},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/LiuCLBCW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/FangDFHCETLCW14,
author = {Shuangde Fang and
Zidong Du and
Yuntan Fang and
Yuanjie Huang and
Yang Chen and
Lieven Eeckhout and
Olivier Temam and
Huawei Li and
Yunji Chen and
Chengyong Wu},
title = {Performance Portability Across Heterogeneous SoCs Using a Generalized
Library-Based Approach},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {11},
number = {2},
pages = {21:1--21:25},
year = {2014},
url = {https://doi.org/10.1145/2608253},
doi = {10.1145/2608253},
timestamp = {Fri, 12 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/FangDFHCETLCW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/DuPATCW14,
author = {Zidong Du and
Krishna V. Palem and
Lingamneni Avinash and
Olivier Temam and
Yunji Chen and
Chengyong Wu},
title = {Leveraging the error resilience of machine-learning applications for
designing highly energy efficient accelerators},
booktitle = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2014, Singapore, January 20-23, 2014},
pages = {201--206},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ASPDAC.2014.6742890},
doi = {10.1109/ASPDAC.2014.6742890},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/DuPATCW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/ChenDSWWCT14,
author = {Tianshi Chen and
Zidong Du and
Ninghui Sun and
Jia Wang and
Chengyong Wu and
Yunji Chen and
Olivier Temam},
editor = {Rajeev Balasubramonian and
Al Davis and
Sarita V. Adve},
title = {DianNao: a small-footprint high-throughput accelerator for ubiquitous
machine-learning},
booktitle = {Architectural Support for Programming Languages and Operating Systems,
{ASPLOS} 2014, Salt Lake City, UT, USA, March 1-5, 2014},
pages = {269--284},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2541940.2541967},
doi = {10.1145/2541940.2541967},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/ChenDSWWCT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HuangHTICW14,
author = {Jing Huang and
Yuanjie Huang and
Olivier Temam and
Paolo Ienne and
Yunji Chen and
Chengyong Wu},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {A low-cost memory interface for high-throughput accelerators},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {11:1--11:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656109},
doi = {10.1145/2656106.2656109},
timestamp = {Mon, 15 May 2023 22:11:16 +0200},
biburl = {https://dblp.org/rec/conf/cases/HuangHTICW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/LiuLCBCW14,
author = {Lei Liu and
Yong Li and
Zehan Cui and
Yungang Bao and
Mingyu Chen and
Chengyong Wu},
title = {Going vertical in memory management: Handling multiplicity by multi-policy},
booktitle = {{ACM/IEEE} 41st International Symposium on Computer Architecture,
{ISCA} 2014, Minneapolis, MN, USA, June 14-18, 2014},
pages = {169--180},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISCA.2014.6853214},
doi = {10.1109/ISCA.2014.6853214},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/LiuLCBCW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/LuoCWLF14,
author = {Lianjie Luo and
Yang Chen and
Chengyong Wu and
Shun Long and
Grigori Fursin},
title = {Finding representative sets of optimizations for adaptive multiversioning
applications},
journal = {CoRR},
volume = {abs/1407.4075},
year = {2014},
url = {http://arxiv.org/abs/1407.4075},
eprinttype = {arXiv},
eprint = {1407.4075},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/LuoCWLF14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HuangITCW13,
author = {Yuanjie Huang and
Paolo Ienne and
Olivier Temam and
Yunji Chen and
Chengyong Wu},
editor = {Brad L. Hutchings and
Vaughn Betz},
title = {Elastic CGRAs},
booktitle = {The 2013 {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} '13, Monterey, CA, USA, February 11-13, 2013},
pages = {171--180},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2435264.2435296},
doi = {10.1145/2435264.2435296},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/HuangITCW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/LiHCETW12,
author = {Hengjie Li and
Wenting He and
Yang Chen and
Lieven Eeckhout and
Olivier Temam and
Chengyong Wu},
title = {{SWAP:} Parallelization through Algorithm Substitution},
journal = {{IEEE} Micro},
volume = {32},
number = {4},
pages = {54--67},
year = {2012},
url = {https://doi.org/10.1109/MM.2012.53},
doi = {10.1109/MM.2012.53},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/LiHCETW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/ChenFHEFTW12,
author = {Yang Chen and
Shuangde Fang and
Yuanjie Huang and
Lieven Eeckhout and
Grigori Fursin and
Olivier Temam and
Chengyong Wu},
title = {Deconstructing iterative optimization},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {9},
number = {3},
pages = {21:1--21:30},
year = {2012},
url = {https://doi.org/10.1145/2355585.2355594},
doi = {10.1145/2355585.2355594},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/ChenFHEFTW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEcit/LuWL12,
author = {You Lu and
Chengyong Wu and
Guanghui Liu},
title = {Novel Iterative Channel Estimation Method for {DTMB} System},
booktitle = {12th {IEEE} International Conference on Computer and Information Technology,
{CIT} 2012, Chengdu, Sichuan, China, October 27-29, 2012},
pages = {254--257},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/CIT.2012.69},
doi = {10.1109/CIT.2012.69},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEcit/LuWL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEcit/WuLL12,
author = {Chengyong Wu and
You Lu and
Guanghui Liu},
title = {An Improved Clipping Scheme Based on {TR} for {PAPR} Reduction in
{OFDM} Systems},
booktitle = {12th {IEEE} International Conference on Computer and Information Technology,
{CIT} 2012, Chengdu, Sichuan, China, October 27-29, 2012},
pages = {598--601},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/CIT.2012.128},
doi = {10.1109/CIT.2012.128},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEcit/WuLL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/LiuCXBCW12,
author = {Lei Liu and
Zehan Cui and
Mingjie Xing and
Yungang Bao and
Mingyu Chen and
Chengyong Wu},
editor = {Pen{-}Chung Yew and
Sangyeun Cho and
Luiz DeRose and
David J. Lilja},
title = {A software memory partition approach for eliminating bank-level interference
in multicore systems},
booktitle = {International Conference on Parallel Architectures and Compilation
Techniques, {PACT} '12, Minneapolis, MN, {USA} - September 19 - 23,
2012},
pages = {367--376},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2370816.2370869},
doi = {10.1145/2370816.2370869},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/LiuCXBCW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/ChenFETW12,
author = {Yang Chen and
Shuangde Fang and
Lieven Eeckhout and
Olivier Temam and
Chengyong Wu},
editor = {Tim Harris and
Michael L. Scott},
title = {Iterative optimization for the data center},
booktitle = {Proceedings of the 17th International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2012, London, UK, March 3-7, 2012},
pages = {49--60},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2150976.2150983},
doi = {10.1145/2150976.2150983},
timestamp = {Wed, 07 Jul 2021 13:23:08 +0200},
biburl = {https://dblp.org/rec/conf/asplos/ChenFETW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sasp/BreugheLCETWE11,
author = {Maximilien Breughe and
Zheng Li and
Yang Chen and
Stijn Eyerman and
Olivier Temam and
Chengyong Wu and
Lieven Eeckhout},
title = {How sensitive is processor customization to the workload's input datasets?},
booktitle = {{IEEE} 9th Symposium on Application Specific Processors, {SASP} 2011,
San Diego, CA, USA, June 5-6, 2011},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/SASP.2011.5941070},
doi = {10.1109/SASP.2011.5941070},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sasp/BreugheLCETWE11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pldi/ChenHEFPTW10,
author = {Yang Chen and
Yuanjie Huang and
Lieven Eeckhout and
Grigori Fursin and
Liang Peng and
Olivier Temam and
Chengyong Wu},
editor = {Benjamin G. Zorn and
Alex Aiken},
title = {Evaluating iterative optimization across 1000 datasets},
booktitle = {Proceedings of the 2010 {ACM} {SIGPLAN} Conference on Programming
Language Design and Implementation, {PLDI} 2010, Toronto, Ontario,
Canada, June 5-10, 2010},
pages = {448--459},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1806596.1806647},
doi = {10.1145/1806596.1806647},
timestamp = {Mon, 22 Jul 2024 10:17:08 +0200},
biburl = {https://dblp.org/rec/conf/pldi/ChenHEFPTW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/csie/LiYWHW09,
author = {Hua Li and
Xinming Ye and
Chengyong Wu and
Chengbao Hang and
Lingling Wang},
editor = {Mark Burgin and
Masud H. Chowdhury and
Chan H. Ham and
Simone A. Ludwig and
Weilian Su and
Sumanth Yenduri},
title = {Modeling Nondeterministic Feature with Petri Net for Network Protocol
in Interoperability Testing},
booktitle = {{CSIE} 2009, 2009 {WRI} World Congress on Computer Science and Information
Engineering, March 31 - April 2, 2009, Los Angeles, California, USA,
7 Volumes},
pages = {825--829},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/CSIE.2009.466},
doi = {10.1109/CSIE.2009.466},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/csie/LiYWHW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aPcsac/ChenFZW08,
author = {Yang Chen and
Bin Fan and
Lujie Zhong and
Chengyong Wu},
title = {Diva: {A} dataflow programming model and its runtime support in Java
virtual machine},
booktitle = {13th Asia-Pacific Computer Systems Architecture Conference, {ACSAC}
2008, Hsinchu, China, August 4-6, 2008},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/APCSAC.2008.4625447},
doi = {10.1109/APCSAC.2008.4625447},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aPcsac/ChenFZW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/LiuCW008,
author = {Lei Liu and
Li Chen and
Chengyong Wu and
Xiaobing Feng},
editor = {Emilio Luque and
Tom{\`{a}}s Margalef and
Domingo Benitez},
title = {Global Tiling for Communication Minimal Parallelization on Distributed
Memory Systems},
booktitle = {Euro-Par 2008 - Parallel Processing, 14th International Euro-Par Conference,
Las Palmas de Gran Canaria, Spain, August 26-29, 2008, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5168},
pages = {382--391},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-85451-7\_41},
doi = {10.1007/978-3-540-85451-7\_41},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/europar/LiuCW008.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aPcsac/ZhouZWZ05,
author = {Feng Zhou and
Junchao Zhang and
Chengyong Wu and
Zhaoqing Zhang},
editor = {Thambipillai Srikanthan and
Jingling Xue and
Chip{-}Hong Chang},
title = {A Register Allocation Framework for Banked Register Files with Access
Constraints},
booktitle = {Advances in Computer Systems Architecture, 10th Asia-Pacific Conference,
{ACSAC} 2005, Singapore, October 24-26, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3740},
pages = {269--280},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11572961\_22},
doi = {10.1007/11572961\_22},
timestamp = {Tue, 14 May 2019 10:00:42 +0200},
biburl = {https://dblp.org/rec/conf/aPcsac/ZhouZWZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lcpc/LiuLLWJ05,
author = {Tao Liu and
Xiao{-}Feng Li and
Lixia Liu and
Chengyong Wu and
Roy Ju},
editor = {Eduard Ayguad{\'{e}} and
Gerald Baumgartner and
J. Ramanujam and
P. Sadayappan},
title = {Optimizing Packet Accesses for a Domain Specific Language on Network
Processors},
booktitle = {Languages and Compilers for Parallel Computing, 18th International
Workshop, {LCPC} 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised
Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {4339},
pages = {47--61},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/978-3-540-69330-7\_4},
doi = {10.1007/978-3-540-69330-7\_4},
timestamp = {Tue, 14 May 2019 10:00:47 +0200},
biburl = {https://dblp.org/rec/conf/lcpc/LiuLLWJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jilp/ChenLJFYW04,
author = {Dong{-}yuan Chen and
Lixia Liu and
Roy Dz{-}Ching Ju and
Chen Fu and
Shuxin Yang and
Chengyong Wu},
title = {Efficient Modeling of Itanium Architecture during Instruction Scheduling
using Extended Finite State Automata},
journal = {J. Instr. Level Parallelism},
volume = {6},
year = {2004},
url = {http://www.jilp.org/vol6/v6paper2.pdf},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jilp/ChenLJFYW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lcpc/WuLZJCLFZ04,
author = {Chengyong Wu and
Ruiqi Lian and
Junchao Zhang and
Roy Ju and
Sun Chan and
Lixia Liu and
Xiaobing Feng and
Zhaoqing Zhang},
editor = {Rudolf Eigenmann and
Zhiyuan Li and
Samuel P. Midkiff},
title = {An Overview of the Open Research Compiler},
booktitle = {Languages and Compilers for High Performance Computing, 17th International
Workshop, {LCPC} 2004, West Lafayette, IN, USA, September 22-24, 2004,
Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {3602},
pages = {17--31},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/11532378\_3},
doi = {10.1007/11532378\_3},
timestamp = {Wed, 20 Nov 2019 17:19:17 +0100},
biburl = {https://dblp.org/rec/conf/lcpc/WuLZJCLFZ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/ChenLFYWJ03,
author = {Dong{-}yuan Chen and
Lixia Liu and
Chen Fu and
Shuxin Yang and
Chengyong Wu and
Roy Dz{-}Ching Ju},
title = {Efficient Resource Management during Instruction Scheduling for the
{EPIC} Architecture},
booktitle = {12th International Conference on Parallel Architectures and Compilation
Techniques {(PACT} 2003), 27 September - 1 October 2003, New Orleans,
LA, {USA}},
pages = {36--45},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/PACT.2003.1238000},
doi = {10.1109/PACT.2003.1238000},
timestamp = {Tue, 31 May 2022 13:36:44 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/ChenLFYWJ03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-04-24 23:11 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
