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BibTeX records: John-David Wellman
@inproceedings{DBLP:conf/isscc/SantosJZCGLSTZBCGMPTTWYAJMPSABBCSW24, author = {Maico Cassel dos Santos and Tianyu Jia and Joseph Zuckerman and Martin Cochet and Davide Giri and Erik Jens Loscalzo and Karthik Swaminathan and Thierry Tambe and Jeff Jun Zhang and Alper Buyuktosunoglu and Kuan{-}Lin Chiu and Giuseppe Di Guglielmo and Paolo Mantovani and Luca Piccolboni and Gabriele Tombesi and David Trilla and John{-}David Wellman and En{-}Yu Yang and Aporva Amarnath and Ying Jing and Bakshree Mishra and Joshua Park and Vignesh Suresh and Sarita V. Adve and Pradip Bose and David Brooks and Luca P. Carloni and Kenneth L. Shepard and Gu{-}Yeon Wei}, title = {14.5 {A} 12nm Linux-SMP-Capable {RISC-V} SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration}, booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2024, San Francisco, CA, USA, February 18-22, 2024}, pages = {262--264}, publisher = {{IEEE}}, year = {2024}, url = {https://doi.org/10.1109/ISSCC49657.2024.10454572}, doi = {10.1109/ISSCC49657.2024.10454572}, timestamp = {Tue, 19 Mar 2024 09:04:31 +0100}, biburl = {https://dblp.org/rec/conf/isscc/SantosJZCGLSTZBCGMPTTWYAJMPSABBCSW24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/cal/HossainBWBM23, author = {Naorin Hossain and Alper Buyuktosunoglu and John{-}David Wellman and Pradip Bose and Margaret Martonosi}, title = {SoCurity: {A} Design Approach for Enhancing SoC Security}, journal = {{IEEE} Comput. Archit. Lett.}, volume = {22}, number = {2}, pages = {105--108}, year = {2023}, url = {https://doi.org/10.1109/LCA.2023.3301448}, doi = {10.1109/LCA.2023.3301448}, timestamp = {Sun, 24 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/cal/HossainBWBM23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/esscirc/JiaMSGZLCSTZCWT22, author = {Tianyu Jia and Paolo Mantovani and Maico Cassel dos Santos and Davide Giri and Joseph Zuckerman and Erik Jens Loscalzo and Martin Cochet and Karthik Swaminathan and Gabriele Tombesi and Jeff Jun Zhang and Nandhini Chandramoorthy and John{-}David Wellman and Kevin Tien and Luca P. Carloni and Kenneth L. Shepard and David Brooks and Gu{-}Yeon Wei and Pradip Bose}, title = {A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous {IP} Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC}, booktitle = {48th {IEEE} European Solid State Circuits Conference, {ESSCIRC} 2022, Milan, Italy, September 19-22, 2022}, pages = {269--272}, publisher = {{IEEE}}, year = {2022}, url = {https://doi.org/10.1109/ESSCIRC55480.2022.9911456}, doi = {10.1109/ESSCIRC55480.2022.9911456}, timestamp = {Tue, 27 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/esscirc/JiaMSGZLCSTZCWT22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccad/SantosJCSZMGZLT22, author = {Maico Cassel dos Santos and Tianyu Jia and Martin Cochet and Karthik Swaminathan and Joseph Zuckerman and Paolo Mantovani and Davide Giri and Jeff Jun Zhang and Erik Jens Loscalzo and Gabriele Tombesi and Kevin Tien and Nandhini Chandramoorthy and John{-}David Wellman and David Brooks and Gu{-}Yeon Wei and Kenneth L. Shepard and Luca P. Carloni and Pradip Bose}, editor = {Tulika Mitra and Evangeline F. Y. Young and Jinjun Xiong}, title = {A Scalable Methodology for Agile Chip Development with Open-Source Hardware Components}, booktitle = {Proceedings of the 41st {IEEE/ACM} International Conference on Computer-Aided Design, {ICCAD} 2022, San Diego, California, USA, 30 October 2022 - 3 November 2022}, pages = {20:1--20:9}, publisher = {{ACM}}, year = {2022}, url = {https://doi.org/10.1145/3508352.3561102}, doi = {10.1145/3508352.3561102}, timestamp = {Tue, 06 Jun 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/iccad/SantosJCSZMGZLT22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-2203-13396, author = {Aporva Amarnath and Subhankar Pal and Hiwot Kassa and Augusto Vega and Alper Buyuktosunoglu and Hubertus Franke and John{-}David Wellman and Ronald G. Dreslinski and Pradip Bose}, title = {HetSched: Quality-of-Mission Aware Scheduling for Autonomous Vehicle SoCs}, journal = {CoRR}, volume = {abs/2203.13396}, year = {2022}, url = {https://doi.org/10.48550/arXiv.2203.13396}, doi = {10.48550/ARXIV.2203.13396}, eprinttype = {arXiv}, eprint = {2203.13396}, timestamp = {Tue, 29 Mar 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-2203-13396.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/cal/AmarnathPKVBFWD21, author = {Aporva Amarnath and Subhankar Pal and Hiwot Tadese Kassa and Augusto Vega and Alper Buyuktosunoglu and Hubertus Franke and John{-}David Wellman and Ronald Dreslinski Jr. and Pradip Bose}, title = {Heterogeneity-Aware Scheduling on SoCs for Autonomous Vehicles}, journal = {{IEEE} Comput. Archit. Lett.}, volume = {20}, number = {2}, pages = {82--85}, year = {2021}, url = {https://doi.org/10.1109/LCA.2021.3085505}, doi = {10.1109/LCA.2021.3085505}, timestamp = {Thu, 16 Sep 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/cal/AmarnathPKVBFWD21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/ThomptoNMBJERGB21, author = {Brian W. Thompto and Dung Q. Nguyen and Jos{\'{e}} E. Moreira and Ramon Bertran and Hans M. Jacobson and Richard J. Eickemeyer and Rahul M. Rao and Michael Goulet and Marcy Byers and Christopher J. Gonzalez and Karthik Swaminathan and Nagu R. Dhanwada and Silvia M. M{\"{u}}ller and Andreas Wagner and Satish Kumar Sadasivam and Robert K. Montoye and William J. Starke and Christian G. Zoellin and Michael S. Floyd and Jeffrey Stuecheli and Nandhini Chandramoorthy and John{-}David Wellman and Alper Buyuktosunoglu and Matthias Pflanz and Balaram Sinharoy and Pradip Bose}, title = {Energy Efficiency Boost in the AI-Infused {POWER10} Processor}, booktitle = {48th {ACM/IEEE} Annual International Symposium on Computer Architecture, {ISCA} 2021, Virtual Event / Valencia, Spain, June 14-18, 2021}, pages = {29--42}, publisher = {{IEEE}}, year = {2021}, url = {https://doi.org/10.1109/ISCA52012.2021.00012}, doi = {10.1109/ISCA52012.2021.00012}, timestamp = {Mon, 19 Feb 2024 07:32:07 +0100}, biburl = {https://dblp.org/rec/conf/isca/ThomptoNMBJERGB21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/micro/TrillaWBB21, author = {David Trilla and John{-}David Wellman and Alper Buyuktosunoglu and Pradip Bose}, title = {{NOVIA:} {A} Framework for Discovering Non-Conventional Inline Accelerators}, booktitle = {{MICRO} '21: 54th Annual {IEEE/ACM} International Symposium on Microarchitecture, Virtual Event, Greece, October 18-22, 2021}, pages = {507--521}, publisher = {{ACM}}, year = {2021}, url = {https://doi.org/10.1145/3466752.3480094}, doi = {10.1145/3466752.3480094}, timestamp = {Tue, 19 Oct 2021 15:51:04 +0200}, biburl = {https://dblp.org/rec/conf/micro/TrillaWBB21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-2007-14371, author = {Augusto Vega and Aporva Amarnath and John{-}David Wellman and Hiwot Kassa and Subhankar Pal and Hubertus Franke and Alper Buyuktosunoglu and Ronald G. Dreslinski and Pradip Bose}, title = {{STOMP:} {A} Tool for Evaluation of Scheduling Policies in Heterogeneous Multi-Processors}, journal = {CoRR}, volume = {abs/2007.14371}, year = {2020}, url = {https://arxiv.org/abs/2007.14371}, eprinttype = {arXiv}, eprint = {2007.14371}, timestamp = {Mon, 03 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-2007-14371.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/BertranBBBBCCCE17, author = {Ramon Bertran and Pradip Bose and David M. Brooks and Jeff Burns and Alper Buyuktosunoglu and Nandhini Chandramoorthy and Eric Cheng and Martin Cochet and Schuyler Eldridge and Daniel Friedman and Hans M. Jacobson and Rajiv V. Joshi and Subhasish Mitra and Robert K. Montoye and Arun Paidimarri and Pritish Parida and Kevin Skadron and Mircea Stan and Karthik Swaminathan and Augusto Vega and Swagath Venkataramani and Christos Vezyrtzis and Gu{-}Yeon Wei and John{-}David Wellman and Matthew M. Ziegler}, title = {Very Low Voltage {(VLV)} Design}, booktitle = {2017 {IEEE} International Conference on Computer Design, {ICCD} 2017, Boston, MA, USA, November 5-8, 2017}, pages = {601--604}, publisher = {{IEEE} Computer Society}, year = {2017}, url = {https://doi.org/10.1109/ICCD.2017.105}, doi = {10.1109/ICCD.2017.105}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/BertranBBBBCCCE17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ibmrd/RiversBKWSCA08, author = {Jude A. Rivers and Pradip Bose and Prabhakar Kudva and John{-}David Wellman and Pia N. Sanda and Ethan H. Cannon and Luiz C. Alves}, title = {Phaser: Phased methodology for modeling the system-level effects of soft errors}, journal = {{IBM} J. Res. Dev.}, volume = {52}, number = {3}, pages = {293--306}, year = {2008}, url = {https://doi.org/10.1147/rd.523.0293}, doi = {10.1147/RD.523.0293}, timestamp = {Fri, 13 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ibmrd/RiversBKWSCA08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/islped/RiversAWM03, author = {Jude A. Rivers and Sameh W. Asaad and John{-}David Wellman and Jaime H. Moreno}, editor = {Ingrid Verbauwhede and Hyung Roh}, title = {Reducing instruction fetch energy with backwards branch control information and buffering}, booktitle = {Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003}, pages = {322--325}, publisher = {{ACM}}, year = {2003}, url = {https://doi.org/10.1145/871506.871586}, doi = {10.1145/871506.871586}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/islped/RiversAWM03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/micro/BrooksBSJKBWZGC00, author = {David M. Brooks and Pradip Bose and Stanley Schuster and Hans M. Jacobson and Prabhakar Kudva and Alper Buyuktosunoglu and John{-}David Wellman and Victor V. Zyuban and Manish Gupta and Peter W. Cook}, title = {Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors}, journal = {{IEEE} Micro}, volume = {20}, number = {6}, pages = {26--44}, year = {2000}, url = {https://doi.org/10.1109/40.888701}, doi = {10.1109/40.888701}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/micro/BrooksBSJKBWZGC00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/pacs/BrooksMWB00, author = {David M. Brooks and Margaret Martonosi and John{-}David Wellman and Pradip Bose}, editor = {Babak Falsafi and T. N. Vijaykumar}, title = {Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor}, booktitle = {Power-Aware Computer Systems, First International Workshop, {PACS} 2000, Cambridge, MA, USA, November 12, 2000, Revised Papers}, series = {Lecture Notes in Computer Science}, volume = {2008}, pages = {126--136}, publisher = {Springer}, year = {2000}, url = {https://doi.org/10.1007/3-540-44572-2\_10}, doi = {10.1007/3-540-44572-2\_10}, timestamp = {Tue, 14 May 2019 10:00:41 +0200}, biburl = {https://dblp.org/rec/conf/pacs/BrooksMWB00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/micro/MoudgillWM99, author = {Mayan Moudgill and John{-}David Wellman and Jaime H. Moreno}, title = {Environment for PowerPC microarchitecture exploration}, journal = {{IEEE} Micro}, volume = {19}, number = {3}, pages = {15--25}, year = {1999}, url = {https://doi.org/10.1109/40.768496}, doi = {10.1109/40.768496}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/micro/MoudgillWM99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@phdthesis{DBLP:phd/us/Wellman96, author = {John{-}David Wellman}, title = {Processor modeling and evaluation techniques for early design stage performance comparison}, school = {University of Michigan, {USA}}, year = {1996}, url = {http://hdl.handle.net/2027.42/130159}, timestamp = {Thu, 12 May 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/phd/us/Wellman96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/WellmanD95, author = {John{-}David Wellman and Edward S. Davidson}, title = {The resource conflict methodology for early-stage design space exploration of superscalar {RISC} processors}, booktitle = {1995 International Conference on Computer Design {(ICCD} '95), {VLSI} in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings}, pages = {110--115}, publisher = {{IEEE} Computer Society}, year = {1995}, url = {https://doi.org/10.1109/ICCD.1995.528798}, doi = {10.1109/ICCD.1995.528798}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/WellmanD95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ics/BoydWAD93, author = {Eric L. Boyd and John{-}David Wellman and Santosh G. Abraham and Edward S. Davidson}, editor = {Yoichi Muraoka}, title = {Evaluating the Communication Performance of MPPs Using Synthetic Sparse Matrix Multiplication Workloads}, booktitle = {Proceedings of the 7th international conference on Supercomputing, {ICS} 1993, Tokyo, Japan, July 20-22, 1993}, pages = {240--250}, publisher = {{ACM}}, year = {1993}, url = {https://doi.org/10.1145/165939.165974}, doi = {10.1145/165939.165974}, timestamp = {Tue, 06 Nov 2018 11:07:02 +0100}, biburl = {https://dblp.org/rec/conf/ics/BoydWAD93.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsid/BoseW93, author = {Pradip Bose and John{-}David Wellman}, title = {MIPS-Driven Early Design and Analysis of {VLSI} {CPU} Chips}, booktitle = {Proceedings of the Sixth International Conference on {VLSI} Design, {VLSI} Design 1993, Bombay, India, January 3-6, 1993}, pages = {256--259}, publisher = {{IEEE} Computer Society}, year = {1993}, url = {https://doi.org/10.1109/ICVD.1993.669691}, doi = {10.1109/ICVD.1993.669691}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsid/BoseW93.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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