BibTeX records: Shang-Wei Tu

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@article{DBLP:journals/tcad/TuCJ06,
  author       = {Shang{-}Wei Tu and
                  Yao{-}Wen Chang and
                  Jing{-}Yang Jou},
  title        = {{RLC} Coupling-Aware Simulation and On-Chip Bus Encoding for Delay
                  Reduction},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {25},
  number       = {10},
  pages        = {2258--2264},
  year         = {2006},
  url          = {https://doi.org/10.1109/TCAD.2005.860956},
  doi          = {10.1109/TCAD.2005.860956},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/TuCJ06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/TuJC05,
  author       = {Shang{-}Wei Tu and
                  Jing{-}Yang Jou and
                  Yao{-}Wen Chang},
  title        = {{RLC} coupling-aware simulation for on-chip buses and their encoding
                  for delay reduction},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
                  May 2005, Kobe, Japan},
  pages        = {4134--4137},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ISCAS.2005.1465541},
  doi          = {10.1109/ISCAS.2005.1465541},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TuJC05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/TuJC04,
  author       = {Shang{-}Wei Tu and
                  Jing{-}Yang Jou and
                  Yao{-}Wen Chang},
  editor       = {Masaharu Imai},
  title        = {Layout techniques for on-chip interconnect inductance reduction},
  booktitle    = {Proceedings of the 2004 Conference on Asia South Pacific Design Automation:
                  Electronic Design and Solution Fair 2004, Yokohama, Japan, January
                  27-30, 2004},
  pages        = {269--273},
  publisher    = {{IEEE} Computer Society},
  year         = {2004},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ASPDAC.2004.127},
  doi          = {10.1109/ASPDAC.2004.127},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/TuJC04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/TuJC04,
  author       = {Shang{-}Wei Tu and
                  Jing{-}Yang Jou and
                  Yao{-}Wen Chang},
  title        = {{RLC} effects on worst-case switching pattern for on-chip buses},
  booktitle    = {Proceedings of the 2004 International Symposium on Circuits and Systems,
                  {ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
  pages        = {945--948},
  publisher    = {{IEEE}},
  year         = {2004},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TuJC04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}