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ORCIDBibTeX records: Nur A. Touba
@inproceedings{DBLP:conf/dft/DuttaCDT23,
author = {Shruti Dutta and
Sai Charan Rachamadugu Chinni and
Abhishek Das and
Nur A. Touba},
editor = {Luca Cassano and
Mihalis Psarakis and
Marcello Traiola and
Alberto Bosio},
title = {Highly Efficient Layered Syndrome-based Double Error Correction Utilizing
Current Summing in {RRAM} Cells to Simplify Decoder},
booktitle = {{IEEE} International Symposium on Defect and Fault Tolerance in {VLSI}
and Nanotechnology Systems, {DFT} 2023, Juan-Les-Pins, France, October
3-5, 2023},
pages = {1--4},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DFT59622.2023.10313572},
doi = {10.1109/DFT59622.2023.10313572},
timestamp = {Tue, 21 Nov 2023 12:38:06 +0100},
biburl = {https://dblp.org/rec/conf/dft/DuttaCDT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ImranKTY22,
author = {Muhammad Imran and
Taehyun Kwon and
Nur A. Touba and
Joon{-}Sung Yang},
title = {CEnT: An Efficient Architecture to Eliminate Intra-Array Write Disturbance
in {PCM}},
journal = {{IEEE} Trans. Computers},
volume = {71},
number = {5},
pages = {992--1007},
year = {2022},
url = {https://doi.org/10.1109/TC.2021.3068577},
doi = {10.1109/TC.2021.3068577},
timestamp = {Wed, 27 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ImranKTY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/DasT20,
author = {Abhishek Das and
Nur A. Touba},
title = {A New Class of Single Burst Error Correcting Codes with Parallel Decoding},
journal = {{IEEE} Trans. Computers},
volume = {69},
number = {2},
pages = {253--259},
year = {2020},
url = {https://doi.org/10.1109/TC.2019.2947425},
doi = {10.1109/TC.2019.2947425},
timestamp = {Thu, 06 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/DasT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DasT20,
author = {Abhishek Das and
Nur A. Touba},
title = {Selective Checksum based On-line Error Correction for {RRAM} based
Matrix Operations},
booktitle = {38th {IEEE} {VLSI} Test Symposium, {VTS} 2020, San Diego, CA, USA,
April 5-8, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VTS48691.2020.9107606},
doi = {10.1109/VTS48691.2020.9107606},
timestamp = {Thu, 25 Jun 2020 15:32:49 +0200},
biburl = {https://dblp.org/rec/conf/vts/DasT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/DasT19,
author = {Abhishek Das and
Nur A. Touba},
title = {Online Correction of Hard Errors and Soft Errors via One-Step Decodable
{OLS} Codes for Emerging Last Level Caches},
booktitle = {{IEEE} Latin American Test Symposium, {LATS} 2019, Santiago, Chile,
March 11-13, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/LATW.2019.8704568},
doi = {10.1109/LATW.2019.8704568},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/latw/DasT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DasT19,
author = {Abhishek Das and
Nur A. Touba},
title = {A Graph Theory Approach towards {IJTAG} Security via Controlled Scan
Chain Isolation},
booktitle = {37th {IEEE} {VLSI} Test Symposium, {VTS} 2019, Monterey, CA, USA,
April 23-25, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VTS.2019.8758608},
doi = {10.1109/VTS.2019.8758608},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vts/DasT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DasT19a,
author = {Abhishek Das and
Nur A. Touba},
title = {Layered-ECC: {A} Class of Double Error Correcting Codes for High Density
Memory Systems},
booktitle = {37th {IEEE} {VLSI} Test Symposium, {VTS} 2019, Monterey, CA, USA,
April 23-25, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VTS.2019.8758647},
doi = {10.1109/VTS.2019.8758647},
timestamp = {Mon, 15 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/DasT19a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/DasT18,
author = {Abhishek Das and
Nur A. Touba},
title = {Efficient Non-Binary Hamming Codes for Limited Magnitude Errors in
{MLC} PCMs},
booktitle = {2018 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFT} 2018, Chicago, IL, USA,
October 8-10, 2018},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/DFT.2018.8602848},
doi = {10.1109/DFT.2018.8602848},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/DasT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DasT18,
author = {Abhishek Das and
Nur A. Touba},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Low Complexity Burst Error Correcting Codes to Correct MBUs in SRAMs},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {219--224},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194570},
doi = {10.1145/3194554.3194570},
timestamp = {Wed, 10 Mar 2021 14:55:38 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DasT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DasT18,
author = {Abhishek Das and
Nur A. Touba},
title = {Systematic b-adjacent symbol error correcting reed-solomon codes with
parallel decoding},
booktitle = {36th {IEEE} {VLSI} Test Symposium, {VTS} 2018, San Francisco, CA,
USA, April 22-25, 2018},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VTS.2018.8368650},
doi = {10.1109/VTS.2018.8368650},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DasT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LeeTY17,
author = {Taehee Lee and
Nur A. Touba and
Joon{-}Sung Yang},
title = {Enhancing Test Compression With Dependency Analysis for Multiple Expansion
Ratios},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {36},
number = {9},
pages = {1571--1579},
year = {2017},
url = {https://doi.org/10.1109/TCAD.2017.2681063},
doi = {10.1109/TCAD.2017.2681063},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LeeTY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HanTY17,
author = {Hyunseung Han and
Nur A. Touba and
Joon{-}Sung Yang},
title = {Exploiting Unused Spare Columns and Replaced Columns to Enhance Memory
{ECC}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {36},
number = {9},
pages = {1580--1591},
year = {2017},
url = {https://doi.org/10.1109/TCAD.2017.2682639},
doi = {10.1109/TCAD.2017.2682639},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HanTY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/desec/LeeT17,
author = {Yu{-}Wei Lee and
Nur A. Touba},
title = {Computing with obfuscated data in arbitrary logic circuits via noise
insertion and cancellation},
booktitle = {{IEEE} Conference on Dependable and Secure Computing, {DSC} 2017,
Taipei, Taiwan, August 7-10, 2017},
pages = {146--152},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/DESEC.2017.8073840},
doi = {10.1109/DESEC.2017.8073840},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/desec/LeeT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/LeeT17,
author = {Yu{-}Wei Lee and
Nur A. Touba},
title = {Improving test compression with multiple-polynomial LFSRs},
booktitle = {{IEEE} International Symposium on Defect and Fault Tolerance in {VLSI}
and Nanotechnology Systems, {DFT} 2017, Cambridge, United Kingdom,
October 23-25, 2017},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/DFT.2017.8244465},
doi = {10.1109/DFT.2017.8244465},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/LeeT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/DasT17,
author = {Abhishek Das and
Nur A. Touba},
title = {Limited Magnitude Error Correction Using {OLS} Codes for Memories
with Multilevel Cells},
booktitle = {2017 {IEEE} International Conference on Computer Design, {ICCD} 2017,
Boston, MA, USA, November 5-8, 2017},
pages = {391--394},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ICCD.2017.67},
doi = {10.1109/ICCD.2017.67},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/DasT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangCT16,
author = {Joon{-}Sung Yang and
Jinsuk Chung and
Nur A. Touba},
title = {Enhancing Superset X-Canceling Method With Relaxed Constraints on
Fault Observation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {35},
number = {2},
pages = {298--308},
year = {2016},
url = {https://doi.org/10.1109/TCAD.2015.2459035},
doi = {10.1109/TCAD.2015.2459035},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangCT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KangTY16,
author = {Jin{-}Hyun Kang and
Nur A. Touba and
Joon{-}Sung Yang},
title = {Reducing control bit overhead for X-masking/X-canceling hybrid architecture
via pattern partitioning},
booktitle = {Proceedings of the 53rd Annual Design Automation Conference, {DAC}
2016, Austin, TX, USA, June 5-9, 2016},
pages = {59:1--59:6},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2897937.2898078},
doi = {10.1145/2897937.2898078},
timestamp = {Tue, 06 Nov 2018 16:58:19 +0100},
biburl = {https://dblp.org/rec/conf/dac/KangTY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SaleemT16,
author = {Kamran Saleem and
Nur A. Touba},
title = {Using symbolic canceling to improve diagnosis from compacted response},
booktitle = {2016 {IEEE} International Test Conference, {ITC} 2016, Fort Worth,
TX, USA, November 15-17, 2016},
pages = {1--7},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/TEST.2016.7805823},
doi = {10.1109/TEST.2016.7805823},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/itc/SaleemT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/SaleemMT15,
author = {Kamran Saleem and
Sreenivaas S. Muthyala and
Nur A. Touba},
title = {Compacting output responses containing unknowns using an embedded
processor},
booktitle = {2015 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFTS} 2015, Amherst, MA, USA,
October 12-14, 2015},
pages = {155--160},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/DFT.2015.7315154},
doi = {10.1109/DFT.2015.7315154},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/SaleemMT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/BawaT15,
author = {Asad Amin Bawa and
Nur A. Touba},
title = {Improving X-tolerant combinational output compaction via input rotation},
booktitle = {2015 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFTS} 2015, Amherst, MA, USA,
October 12-14, 2015},
pages = {167--170},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/DFT.2015.7315156},
doi = {10.1109/DFT.2015.7315156},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/BawaT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/LeeT15,
author = {Yu{-}Wei Lee and
Nur A. Touba},
title = {Improving logic obfuscation via logic cone analysis},
booktitle = {16th Latin-American Test Symposium, {LATS} 2015, Puerto Vallarta,
Mexico, March 25-27, 2015},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/LATW.2015.7102410},
doi = {10.1109/LATW.2015.7102410},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/latw/LeeT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangLT14,
author = {Joon{-}Sung Yang and
Jinkyu Lee and
Nur A. Touba},
title = {Utilizing {ATE} Vector Repeat With Linear Decompressor for Test Vector
Compression},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {33},
number = {8},
pages = {1219--1230},
year = {2014},
url = {https://doi.org/10.1109/TCAD.2014.2314307},
doi = {10.1109/TCAD.2014.2314307},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangLT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/RabBT14,
author = {Muhammad Tauseef Rab and
Asad Amin Bawa and
Nur A. Touba},
title = {Reducing Cost of Yield Enhancement in 3-D Stacked Memories Via Asymmetric
Layer Repair Capability},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {22},
number = {9},
pages = {2017--2024},
year = {2014},
url = {https://doi.org/10.1109/TVLSI.2013.2280593},
doi = {10.1109/TVLSI.2013.2280593},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/RabBT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MuthyalaT14,
author = {Sreenivaas S. Muthyala and
Nur A. Touba},
title = {Improving test compression with scan feedforward techniques},
booktitle = {2014 International Test Conference, {ITC} 2014, Seattle, WA, USA,
October 20-23, 2014},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/TEST.2014.7035358},
doi = {10.1109/TEST.2014.7035358},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MuthyalaT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MuthyalaT14,
author = {Sreenivaas S. Muthyala and
Nur A. Touba},
editor = {Lorena Garcia},
title = {Reducing test time for 3D-ICs by improved utilization of test elevators},
booktitle = {22nd International Conference on Very Large Scale Integration, VLSI-SoC,
Playa del Carmen, Mexico, October 6-8, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/VLSI-SoC.2014.7004157},
doi = {10.1109/VLSI-SOC.2014.7004157},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/MuthyalaT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MuthyalaT14a,
author = {Sreenivaas S. Muthyala and
Nur A. Touba},
editor = {Luc Claesen and
Mar{\'{\i}}a Teresa Sanz{-}Pascual and
Ricardo Reis and
Arturo Sarmiento{-}Reyes},
title = {Efficient Utilization of Test Elevators to Reduce Test Time in 3D-ICs},
booktitle = {VLSI-SoC: Internet of Things Foundations - 22nd {IFIP} {WG} 10.5/IEEE
International Conference on Very Large Scale Integration, VLSI-SoC
2014, Playa del Carmen, Mexico, October 6-8, 2014, Revised and Extended
Selected Papers},
series = {{IFIP} Advances in Information and Communication Technology},
volume = {464},
pages = {21--38},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-25279-7\_2},
doi = {10.1007/978-3-319-25279-7\_2},
timestamp = {Tue, 22 Oct 2019 15:21:19 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/MuthyalaT14a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/YangT13,
author = {Joon{-}Sung Yang and
Nur A. Touba},
title = {Improved Trace Buffer Observation via Selective Data Capture Using
2-D Compaction for Post-Silicon Debug},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {2},
pages = {320--328},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2183399},
doi = {10.1109/TVLSI.2012.2183399},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/YangT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/BawaRT13,
author = {Asad Amin Bawa and
Muhammad Tauseef Rab and
Nur A. Touba},
title = {Efficient compression of x-masking control data via dynamic channel
allocation},
booktitle = {2013 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFTS} 2013, New York City,
NY, USA, October 2-4, 2013},
pages = {125--130},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DFT.2013.6653594},
doi = {10.1109/DFT.2013.6653594},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/BawaRT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/ReviriegoLMLTD13,
author = {Pedro Reviriego and
Shih{-}Fu Liu and
Juan Antonio Maestro and
S. Lee and
Nur A. Touba and
Rudrajit Datta},
title = {Implementing triple adjacent Error Correction in double error correction
Orthogonal Latin Squares Codes},
booktitle = {2013 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFTS} 2013, New York City,
NY, USA, October 2-4, 2013},
pages = {167--171},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DFT.2013.6653601},
doi = {10.1109/DFT.2013.6653601},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/ReviriegoLMLTD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/LeeT13,
author = {Yu{-}Wei Lee and
Nur A. Touba},
title = {Unified 3D test architecture for variable test data bandwidth across
pre-bond, partial stack, and post-bond test},
booktitle = {2013 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFTS} 2013, New York City,
NY, USA, October 2-4, 2013},
pages = {184--189},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DFT.2013.6653604},
doi = {10.1109/DFT.2013.6653604},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/LeeT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MuthyalaT13,
author = {Sreenivaas S. Muthyala and
Nur A. Touba},
title = {{SOC} test compression scheme using sequential linear decompressors
with retained free variables},
booktitle = {31st {IEEE} {VLSI} Test Symposium, {VTS} 2013, Berkeley, CA, USA,
April 29 - May 2, 2013},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/VTS.2013.6548884},
doi = {10.1109/VTS.2013.6548884},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MuthyalaT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/YangTN12,
author = {Joon{-}Sung Yang and
Nur A. Touba and
Benoit Nadeau{-}Dostie},
title = {Test Point Insertion with Control Points Driven by Existing Functional
Flip-Flops},
journal = {{IEEE} Trans. Computers},
volume = {61},
number = {10},
pages = {1473--1483},
year = {2012},
url = {https://doi.org/10.1109/TC.2011.189},
doi = {10.1109/TC.2011.189},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/YangTN12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangT12,
author = {Joon{-}Sung Yang and
Nur A. Touba},
title = {Efficient Trace Signal Selection for Silicon Debug by Error Transmission
Analysis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {31},
number = {3},
pages = {442--446},
year = {2012},
url = {https://doi.org/10.1109/TCAD.2011.2171184},
doi = {10.1109/TCAD.2011.2171184},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangT12a,
author = {Joon{-}Sung Yang and
Nur A. Touba},
title = {X-Canceling {MISR} Architectures for Output Response Compaction With
Unknown Values},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {31},
number = {9},
pages = {1417--1427},
year = {2012},
url = {https://doi.org/10.1109/TCAD.2012.2193579},
doi = {10.1109/TCAD.2012.2193579},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangT12a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/BawaRT12,
author = {Asad Amin Bawa and
Muhammad Tauseef Rab and
Nur A. Touba},
title = {Using partial masking in X-chains to increase output compaction for
an X-canceling {MISR}},
booktitle = {2012 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFT} 2012, Austin, TX, USA,
October 3-5, 2012},
pages = {19--24},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/DFT.2012.6378193},
doi = {10.1109/DFT.2012.6378193},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/BawaRT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/RabBT12,
author = {Muhammad Tauseef Rab and
Asad Amin Bawa and
Nur A. Touba},
title = {Implementing defect tolerance in 3D-ICs by exploiting degrees of freedom
in assembly},
booktitle = {2012 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFT} 2012, Austin, TX, USA,
October 3-5, 2012},
pages = {178--181},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/DFT.2012.6378220},
doi = {10.1109/DFT.2012.6378220},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/RabBT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MuthyalaT12,
author = {Sreenivaas S. Muthyala and
Nur A. Touba},
title = {Improving test compression by retaining non-pivot free variables in
sequential linear decompressors},
booktitle = {2012 {IEEE} International Test Conference, {ITC} 2012, Anaheim, CA,
USA, November 5-8, 2012},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/TEST.2012.6401557},
doi = {10.1109/TEST.2012.6401557},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MuthyalaT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/RabBT12,
author = {Muhammad Tauseef Rab and
Asad Amin Bawa and
Nur A. Touba},
editor = {Srinivas Katkoori and
Matthew R. Guthaus and
Ayse K. Coskun and
Andreas Burg and
Ricardo Reis},
title = {Using asymmetric layer repair capability to reduce the cost of yield
enhancement in 3D stacked memories},
booktitle = {20th {IEEE/IFIP} International Conference on {VLSI} and System-on-Chip,
VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012},
pages = {195--200},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/VLSI-SoC.2012.6379029},
doi = {10.1109/VLSI-SOC.2012.6379029},
timestamp = {Tue, 06 Sep 2022 16:02:54 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/RabBT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChungT12,
author = {Jinsuk Chung and
Nur A. Touba},
title = {Exploiting X-correlation in output compression via superset X-canceling},
booktitle = {30th {IEEE} {VLSI} Test Symposium, {VTS} 2012, Maui, Hawaii, USA,
23-26 April 2012},
pages = {182--187},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VTS.2012.6231100},
doi = {10.1109/VTS.2012.6231100},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChungT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/DattaT11,
author = {Rudrajit Datta and
Nur A. Touba},
title = {X-Stacking - {A} Method for Reducing Control Data for Output Compaction},
booktitle = {2011 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFT} 2011, Vancouver, BC, Canada,
October 3-5, 2011},
pages = {332--338},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/DFT.2011.64},
doi = {10.1109/DFT.2011.64},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/DattaT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/DattaT11a,
author = {Rudrajit Datta and
Nur A. Touba},
title = {Generating Burst-Error Correcting Codes from Orthogonal Latin Square
Codes - {A} Graph Theoretic Approach},
booktitle = {2011 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFT} 2011, Vancouver, BC, Canada,
October 3-5, 2011},
pages = {367--373},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/DFT.2011.3},
doi = {10.1109/DFT.2011.3},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/DattaT11a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DattaT11,
author = {Rudrajit Datta and
Nur A. Touba},
title = {Designing a fast and adaptive error correction scheme for increasing
the lifetime of phase change memories},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {134--139},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783773},
doi = {10.1109/VTS.2011.5783773},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vts/DattaT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LeeT10,
author = {Jinkyu Lee and
Nur A. Touba},
title = {Correlation-Based Rectangular Encoding},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {10},
pages = {1483--1492},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2025882},
doi = {10.1109/TVLSI.2009.2025882},
timestamp = {Mon, 22 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/LeeT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/WuWYFWJTZLCLJ10,
author = {Shianling Wu and
Laung{-}Terng Wang and
Lizhen Yu and
Hiroshi Furukawa and
Xiaoqing Wen and
Wen{-}Ben Jone and
Nur A. Touba and
FeiFei Zhao and
Jinsong Liu and
Hao{-}Jan Chao and
Fangfang Li and
Zhigang Jiang},
title = {Logic {BIST} Architecture Using Staggered Launch-on-Shift for Testing
Designs Containing Asynchronous Clock Domains},
booktitle = {25th {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} Systems, {DFT} 2010, Kyoto, Japan, October 6-8, 2010},
pages = {358--366},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DFT.2010.50},
doi = {10.1109/DFT.2010.50},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/WuWYFWJTZLCLJ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/DattaT10,
author = {Rudrajit Datta and
Nur A. Touba},
editor = {Ron Press and
Erik H. Volkerink},
title = {Post-manufacturing {ECC} customization based on Orthogonal Latin Square
codes and its application to ultra-low power caches},
booktitle = {2011 {IEEE} International Test Conference, {ITC} 2010, Austin, TX,
USA, November 2-4, 2010},
pages = {212--218},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/TEST.2010.5699221},
doi = {10.1109/TEST.2010.5699221},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/DattaT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/WangTJWHL10,
author = {Laung{-}Terng Wang and
Nur A. Touba and
Zhigang Jiang and
Shianling Wu and
Jiun{-}Lang Huang and
James Chien{-}Mo Li},
title = {{CSER:} BISER-based concurrent soft-error resilience},
booktitle = {28th {IEEE} {VLSI} Test Symposium, {VTS} 2010, April 19-22, 2010,
Santa Cruz, California, {USA}},
pages = {153--158},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/VTS.2010.5469588},
doi = {10.1109/VTS.2010.5469588},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vts/WangTJWHL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/YangNT09,
author = {Joon{-}Sung Yang and
Benoit Nadeau{-}Dostie and
Nur A. Touba},
editor = {Dimitris Gizopoulos and
Susumu Horiguchi and
Spyros Tragoudas and
Mohammad Tehranipoor},
title = {Reducing Test Point Area for {BIST} through Greater Use of Functional
Flip-Flops to Drive Control Points},
booktitle = {24th {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} Systems, {DFT} 2009, Chicago, Illinois, USA, October 7-9,
2009},
pages = {20--28},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/DFT.2009.33},
doi = {10.1109/DFT.2009.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/YangNT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/RabBT09,
author = {Muhammad Tauseef Rab and
Asad Amin Bawa and
Nur A. Touba},
editor = {Dimitris Gizopoulos and
Susumu Horiguchi and
Spyros Tragoudas and
Mohammad Tehranipoor},
title = {Improving Memory Repair by Selective Row Partitioning},
booktitle = {24th {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} Systems, {DFT} 2009, Chicago, Illinois, USA, October 7-9,
2009},
pages = {211--219},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/DFT.2009.20},
doi = {10.1109/DFT.2009.20},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/RabBT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/YangNT09,
author = {Joon{-}Sung Yang and
Benoit Nadeau{-}Dostie and
Nur A. Touba},
editor = {Gordon W. Roberts and
Bill Eklow},
title = {Test point insertion using functional flip-flops to drive control
points},
booktitle = {2009 {IEEE} International Test Conference, {ITC} 2009, Austin, TX,
USA, November 1-6, 2009},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/TEST.2009.5355688},
doi = {10.1109/TEST.2009.5355688},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/YangNT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/YangTYM09,
author = {Joon{-}Sung Yang and
Nur A. Touba and
Shih{-}Yu Yang and
T. M. Mak},
editor = {Gordon W. Roberts and
Bill Eklow},
title = {An industrial case study for X-canceling {MISR}},
booktitle = {2009 {IEEE} International Test Conference, {ITC} 2009, Austin, TX,
USA, November 1-6, 2009},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/TEST.2009.5355687},
doi = {10.1109/TEST.2009.5355687},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/YangTYM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DattaT09,
author = {Rudrajit Datta and
Nur A. Touba},
title = {Exploiting Unused Spare Columns to Improve Memory {ECC}},
booktitle = {27th {IEEE} {VLSI} Test Symposium, {VTS} 2009, May 3-7, 2009, Santa
Cruz, California, {USA}},
pages = {47--52},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/VTS.2009.52},
doi = {10.1109/VTS.2009.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DattaT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YangT09,
author = {Joon{-}Sung Yang and
Nur A. Touba},
title = {Automated Selection of Signals to Observe for Efficient Silicon Debug},
booktitle = {27th {IEEE} {VLSI} Test Symposium, {VTS} 2009, May 3-7, 2009, Santa
Cruz, California, {USA}},
pages = {79--84},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/VTS.2009.51},
doi = {10.1109/VTS.2009.51},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/YangT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/DavidsonT08,
author = {Scott Davidson and
Nur A. Touba},
title = {Guest Editors' Introduction: Progress in Test Compression},
journal = {{IEEE} Des. Test Comput.},
volume = {25},
number = {2},
pages = {112--113},
year = {2008},
url = {https://doi.org/10.1109/MDT.2008.38},
doi = {10.1109/MDT.2008.38},
timestamp = {Sat, 09 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/DavidsonT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/Touba08,
author = {Nur A. Touba},
title = {{ITC} 2008 Highlights},
journal = {{IEEE} Des. Test Comput.},
volume = {25},
number = {5},
pages = {398--399},
year = {2008},
url = {https://doi.org/10.1109/MDT.2008.144},
doi = {10.1109/MDT.2008.144},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/Touba08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/ToubaSC08,
author = {Nur A. Touba and
Adelio Salsano and
Minsu Choi},
title = {Guest Editorial},
journal = {J. Electron. Test.},
volume = {24},
number = {1-3},
pages = {9--10},
year = {2008},
url = {https://doi.org/10.1007/s10836-008-5067-1},
doi = {10.1007/S10836-008-5067-1},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/ToubaSC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/YangT08,
author = {Joon{-}Sung Yang and
Nur A. Touba},
editor = {Cristiana Bolchini and
Yong{-}Bin Kim and
Dimitris Gizopoulos and
Mohammad Tehranipoor},
title = {Enhancing Silicon Debug via Periodic Monitoring},
booktitle = {23rd {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2008), 1-3 October 2008, Boston, MA, {USA}},
pages = {125--133},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DFT.2008.57},
doi = {10.1109/DFT.2008.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/YangT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GargPT08,
author = {Ritesh Garg and
Richard Putman and
Nur A. Touba},
title = {Increasing Output Compaction in Presence of Unknowns Using an X-Canceling
{MISR} with Deterministic Observation},
booktitle = {26th {IEEE} {VLSI} Test Symposium {(VTS} 2008), April 27 - May 1,
2008, San Diego, California, {USA}},
pages = {35--42},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VTS.2008.42},
doi = {10.1109/VTS.2008.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GargPT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YangT08,
author = {Joon{-}Sung Yang and
Nur A. Touba},
title = {Expanding Trace Buffer Observation Window for In-System Silicon Debug
through Selective Capture},
booktitle = {26th {IEEE} {VLSI} Test Symposium {(VTS} 2008), April 27 - May 1,
2008, San Diego, California, {USA}},
pages = {345--351},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VTS.2008.41},
doi = {10.1109/VTS.2008.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/YangT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/itc/2008,
editor = {Douglas Young and
Nur A. Touba},
title = {2008 {IEEE} International Test Conference, {ITC} 2008, Santa Clara,
California, USA, October 26-31, 2008},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://ieeexplore.ieee.org/xpl/conhome/4690905/proceeding},
isbn = {978-1-4244-2403-0},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/2008.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BalakrishnanT07,
author = {Kedarnath J. Balakrishnan and
Nur A. Touba},
title = {Relationship Between Entropy and Test Data Compression},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {26},
number = {2},
pages = {386--395},
year = {2007},
url = {https://doi.org/10.1109/TCAD.2006.882600},
doi = {10.1109/TCAD.2006.882600},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BalakrishnanT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LeeT07,
author = {Jinkyu Lee and
Nur A. Touba},
title = {LFSR-Reseeding Scheme Achieving Low-Power Dissipation During Test},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {26},
number = {2},
pages = {396--401},
year = {2007},
url = {https://doi.org/10.1109/TCAD.2006.882509},
doi = {10.1109/TCAD.2006.882509},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LeeT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/DuttaT07,
author = {Avijit Dutta and
Nur A. Touba},
editor = {Cristiana Bolchini and
Yong{-}Bin Kim and
Adelio Salsano and
Nur A. Touba},
title = {Reliable Network-on-Chip Using a Low Cost Unequal Error Protection
Code},
booktitle = {22nd {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2007), 26-28 September 2007, Rome, Italy},
pages = {3--11},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/DFT.2007.20},
doi = {10.1109/DFT.2007.20},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/DuttaT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Touba07,
author = {Nur A. Touba},
editor = {Jill Sibert and
Janusz Rajski},
title = {X-canceling {MISR} - An X-tolerant methodology for compacting output
responses with unknowns using a {MISR}},
booktitle = {2007 {IEEE} International Test Conference, {ITC} 2007, Santa Clara,
California, USA, October 21-26, 2007},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/TEST.2007.4437576},
doi = {10.1109/TEST.2007.4437576},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Touba07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PutmanT07,
author = {Richard Putman and
Nur A. Touba},
title = {Using Multiple Expansion Ratios and Dependency Analysis to Improve
Test Compression},
booktitle = {25th {IEEE} {VLSI} Test Symposium {(VTS} 2007), 6-10 May 2007, Berkeley,
California, {USA}},
pages = {211--218},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/VTS.2007.87},
doi = {10.1109/VTS.2007.87},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PutmanT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DuttaT07,
author = {Avijit Dutta and
Nur A. Touba},
title = {Multiple Bit Upset Tolerant Memory Using a Selective Cycle Avoidance
Based {SEC-DED-DAEC} Code},
booktitle = {25th {IEEE} {VLSI} Test Symposium {(VTS} 2007), 6-10 May 2007, Berkeley,
California, {USA}},
pages = {349--354},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/VTS.2007.40},
doi = {10.1109/VTS.2007.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DuttaT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/dft/2007,
editor = {Cristiana Bolchini and
Yong{-}Bin Kim and
Adelio Salsano and
Nur A. Touba},
title = {22nd {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2007), 26-28 September 2007, Rome, Italy},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://ieeexplore.ieee.org/xpl/conhome/4358358/proceeding},
isbn = {0-7695-2885-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dft/2007.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/Touba06,
author = {Nur A. Touba},
title = {Survey of Test Vector Compression Techniques},
journal = {{IEEE} Des. Test Comput.},
volume = {23},
number = {4},
pages = {294--303},
year = {2006},
url = {https://doi.org/10.1109/MDT.2006.105},
doi = {10.1109/MDT.2006.105},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/Touba06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/MacDonaldT06,
author = {Eric W. MacDonald and
Nur A. Touba},
title = {Delay testing of partially depleted silicon-on-insulator {(PD-SOI)}
circuits},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {14},
number = {6},
pages = {587--595},
year = {2006},
url = {https://doi.org/10.1109/TVLSI.2006.878209},
doi = {10.1109/TVLSI.2006.878209},
timestamp = {Fri, 10 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/MacDonaldT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/BalakrishnanT06,
author = {Kedarnath J. Balakrishnan and
Nur A. Touba},
title = {Improving Linear Test Data Compression},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {14},
number = {11},
pages = {1227--1237},
year = {2006},
url = {https://doi.org/10.1109/TVLSI.2006.886417},
doi = {10.1109/TVLSI.2006.886417},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/BalakrishnanT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LeeT06,
author = {Jinkyu Lee and
Nur A. Touba},
title = {Efficiently Utilizing {ATE} Vector Repeat for Compression by Scan
Vector Decomposition},
booktitle = {15th Asian Test Symposium, {ATS} 2006, Fukuoka, Japan, November 20-23,
2006},
pages = {237--244},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ATS.2006.261026},
doi = {10.1109/ATS.2006.261026},
timestamp = {Mon, 07 Nov 2022 17:39:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/LeeT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/DuttaT06,
author = {Avijit Dutta and
Nur A. Touba},
title = {Synthesis of Efficient Linear Test Pattern Generators},
booktitle = {21th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2006), 4-6 October 2006, Arlington, Virginia,
{USA}},
pages = {206--214},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DFT.2006.61},
doi = {10.1109/DFT.2006.61},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/DuttaT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/DuttaT06,
author = {Avijit Dutta and
Nur A. Touba},
editor = {Scott Davidson and
Anne Gattiker},
title = {Using Limited Dependence Sequential Expansion for Decompressing Test
Vectors},
booktitle = {2006 {IEEE} International Test Conference, {ITC} 2006, Santa Clara,
CA, USA, October 22-27, 2006},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/TEST.2006.297662},
doi = {10.1109/TEST.2006.297662},
timestamp = {Tue, 12 Dec 2023 09:46:27 +0100},
biburl = {https://dblp.org/rec/conf/itc/DuttaT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DuttaT06,
author = {Avijit Dutta and
Nur A. Touba},
title = {Iterative {OPDD} Based Signal Probability Calculation},
booktitle = {24th {IEEE} {VLSI} Test Symposium {(VTS} 2006), 30 April - 4 May 2006,
Berkeley, California, {USA}},
pages = {72--77},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VTS.2006.43},
doi = {10.1109/VTS.2006.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DuttaT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LeeT06,
author = {Jinkyu Lee and
Nur A. Touba},
title = {Combining Linear and Non-Linear Test Vector Compression Using Correlation-Based
Rectangular Encoding},
booktitle = {24th {IEEE} {VLSI} Test Symposium {(VTS} 2006), 30 April - 4 May 2006,
Berkeley, California, {USA}},
pages = {252--257},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VTS.2006.25},
doi = {10.1109/VTS.2006.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LeeT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/GhoshBT05,
author = {Shalini Ghosh and
Sugato Basu and
Nur A. Touba},
title = {Selecting Error Correcting Codes to Minimize Power in Memory Checker
Circuits},
journal = {J. Low Power Electron.},
volume = {1},
number = {1},
pages = {63--72},
year = {2005},
url = {https://doi.org/10.1166/jolpe.2005.007},
doi = {10.1166/JOLPE.2005.007},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/GhoshBT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/BalakrishnanTP05,
author = {Kedarnath J. Balakrishnan and
Nur A. Touba and
Srinivas Patil},
title = {Compressing Functional Tests for Microprocessors},
booktitle = {14th Asian Test Symposium {(ATS} 2005), 18-21 December 2005, Calcutta,
India},
pages = {428--433},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ATS.2005.38},
doi = {10.1109/ATS.2005.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/BalakrishnanTP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BalakrishnanT05,
author = {Kedarnath J. Balakrishnan and
Nur A. Touba},
title = {Reconfigurable Linear Decompressors Using Symbolic Gaussian Elimination},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {1130--1135},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.255},
doi = {10.1109/DATE.2005.255},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/BalakrishnanT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/LeeT05,
author = {Jinkyu Lee and
Nur A. Touba},
title = {Low Power {BIST} Based on Scan Partitioning},
booktitle = {20th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2005), 3-5 October 2005, Monterey, CA, {USA}},
pages = {33--41},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DFTVS.2005.43},
doi = {10.1109/DFTVS.2005.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/LeeT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/WardST05,
author = {Samuel I. Ward and
Chris Schattauer and
Nur A. Touba},
title = {Using Statistical Transformations to Improve Compression for Linear
Decompressors},
booktitle = {20th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2005), 3-5 October 2005, Monterey, CA, {USA}},
pages = {42--50},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DFTVS.2005.68},
doi = {10.1109/DFTVS.2005.68},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/WardST05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/DuttaRT05,
author = {Avijit Dutta and
Terence Rodrigues and
Nur A. Touba},
title = {Low Cost Test Vector Compression/Decompression Scheme for Circuits
with a Reconfigurable Serial Multiplier},
booktitle = {2005 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2005), New Frontiers in {VLSI} Design, 11-12 May 2005, Tampa, FL,
{USA}},
pages = {200--205},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISVLSI.2005.49},
doi = {10.1109/ISVLSI.2005.49},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/DuttaRT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Touba05,
author = {Nur A. Touba},
title = {Methods for improving test compression},
booktitle = {Proceedings 2005 {IEEE} International Test Conference, {ITC} 2005,
Austin, TX, USA, November 8-10, 2005},
pages = {2},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/TEST.2005.1584115},
doi = {10.1109/TEST.2005.1584115},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Touba05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/DuttaT05,
author = {Avijit Dutta and
Nur A. Touba},
title = {Synthesis of nonintrusive concurrent error detection using an even
error detecting function},
booktitle = {Proceedings 2005 {IEEE} International Test Conference, {ITC} 2005,
Austin, TX, USA, November 8-10, 2005},
pages = {8},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/TEST.2005.1584072},
doi = {10.1109/TEST.2005.1584072},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/DuttaT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GhoshBT05,
author = {Shalini Ghosh and
Sugato Basu and
Nur A. Touba},
title = {Synthesis of Low Power {CED} Circuits Based on Parity Codes},
booktitle = {23rd {IEEE} {VLSI} Test Symposium {(VTS} 2005), 1-5 May 2005, Palm
Springs, CA, {USA}},
pages = {315--320},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/VTS.2005.80},
doi = {10.1109/VTS.2005.80},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GhoshBT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/BalakrishnanT04,
author = {Kedarnath J. Balakrishnan and
Nur A. Touba},
title = {Matrix-based software test data decompression for systems-on-a-chip},
journal = {J. Syst. Archit.},
volume = {50},
number = {5},
pages = {247--256},
year = {2004},
url = {https://doi.org/10.1016/j.sysarc.2003.08.007},
doi = {10.1016/J.SYSARC.2003.08.007},
timestamp = {Tue, 19 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/BalakrishnanT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/KrishnaJT04,
author = {C. V. Krishna and
Abhijit Jas and
Nur A. Touba},
title = {Achieving high encoding efficiency with partial dynamic {LFSR} reseeding},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {9},
number = {4},
pages = {500--516},
year = {2004},
url = {https://doi.org/10.1145/1027084.1027089},
doi = {10.1145/1027084.1027089},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/KrishnaJT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/JasPT04,
author = {Abhijit Jas and
Bahram Pouya and
Nur A. Touba},
title = {Test data compression technique for embedded cores using virtual scan
chains},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {12},
number = {7},
pages = {775--781},
year = {2004},
url = {https://doi.org/10.1109/TVLSI.2004.830911},
doi = {10.1109/TVLSI.2004.830911},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/JasPT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/MohanramT04,
author = {Kartik Mohanram and
Nur A. Touba},
title = {Lowering power consumption in concurrent checkers via input ordering},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {12},
number = {11},
pages = {1234--1243},
year = {2004},
url = {https://doi.org/10.1109/TVLSI.2004.836318},
doi = {10.1109/TVLSI.2004.836318},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/MohanramT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/JasKT04,
author = {Abhijit Jas and
C. V. Krishna and
Nur A. Touba},
title = {Weighted pseudorandom hybrid {BIST}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {12},
number = {12},
pages = {1277--1283},
year = {2004},
url = {https://doi.org/10.1109/TVLSI.2004.837985},
doi = {10.1109/TVLSI.2004.837985},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/JasKT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/BalakrishnanT04,
author = {Kedarnath J. Balakrishnan and
Nur A. Touba},
title = {Relating entropy theory to test data compression},
booktitle = {9th European Test Symposium, {ETS} 2004, Ajaccio, France, May 23-26,
2004},
pages = {94--99},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ETSYM.2004.1347615},
doi = {10.1109/ETSYM.2004.1347615},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/BalakrishnanT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GhoshMBT04,
author = {Shalini Ghosh and
Eric W. MacDonald and
Sugato Basu and
Nur A. Touba},
editor = {David Garrett and
John C. Lach and
Charles A. Zukowski},
title = {Low-power weighted pseudo-random {BIST} using special scan cells},
booktitle = {Proceedings of the 14th {ACM} Great Lakes Symposium on {VLSI} 2004,
Boston, MA, USA, April 26-28, 2004},
pages = {86--91},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/988952.988974},
doi = {10.1145/988952.988974},
timestamp = {Fri, 10 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/GhoshMBT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LeeT04,
author = {Jinkyu Lee and
Nur A. Touba},
title = {Low Power Test Data Compression Based on {LFSR} Reseeding},
booktitle = {22nd {IEEE} International Conference on Computer Design: {VLSI} in
Computers {\&} Processors {(ICCD} 2004), 11-13 October 2004, San
Jose, CA, USA, Proceedings},
pages = {180--185},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ICCD.2004.1347919},
doi = {10.1109/ICCD.2004.1347919},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LeeT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/BalakrishnanT04,
author = {Kedarnath J. Balakrishnan and
Nur A. Touba},
title = {Improving Encoding Efficiency for Linear Decompressors Using Scan
Inversion},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {936--944},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1387358},
doi = {10.1109/TEST.2004.1387358},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/BalakrishnanT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/GhoshTB04,
author = {Shalini Ghosh and
Nur A. Touba and
Sugato Basu},
title = {Reducing Power Consumption in Memory {ECC} Checkers},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {1322--1331},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1387407},
doi = {10.1109/TEST.2004.1387407},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/GhoshTB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KrishnaT04,
author = {C. V. Krishna and
Nur A. Touba},
title = {3-Stage Variable Length Continuous-Flow Scan Vector Decompression
Scheme},
booktitle = {22nd {IEEE} {VLSI} Test Symposium {(VTS} 2004), 25-29 April 2004,
Napa Valley, CA, {USA}},
pages = {79--86},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/VTEST.2004.1299229},
doi = {10.1109/VTEST.2004.1299229},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KrishnaT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JasGNT03,
author = {Abhijit Jas and
Jayabrata Ghosh{-}Dastidar and
Mom{-}Eng Ng and
Nur A. Touba},
title = {An efficient test vector compression scheme using selective Huffman
coding},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {22},
number = {6},
pages = {797--806},
year = {2003},
url = {https://doi.org/10.1109/TCAD.2003.811452},
doi = {10.1109/TCAD.2003.811452},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JasGNT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LiCT03,
author = {Lei Li and
Krishnendu Chakrabarty and
Nur A. Touba},
title = {Test data compression using dictionaries with selective entries and
fixed-length indices},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {8},
number = {4},
pages = {470--490},
year = {2003},
url = {https://doi.org/10.1145/944027.944032},
doi = {10.1145/944027.944032},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/LiCT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/BalakrishnanT03,
author = {Kedarnath J. Balakrishnan and
Nur A. Touba},
title = {Scan-Based {BIST} Diagnosis Using an Embedded Processor},
booktitle = {18th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2003), 3-5 November 2003, Boston, MA, USA,
Proceedings},
pages = {209--216},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/DFTVS.2003.1250114},
doi = {10.1109/DFTVS.2003.1250114},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/BalakrishnanT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/KrishnaT03,
author = {C. V. Krishna and
Nur A. Touba},
title = {Hybrid {BIST} Using an Incrementally Guided {LFSR}},
booktitle = {18th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2003), 3-5 November 2003, Boston, MA, USA,
Proceedings},
pages = {217--224},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/DFTVS.2003.1250115},
doi = {10.1109/DFTVS.2003.1250115},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/KrishnaT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MohanramT03,
author = {Kartik Mohanram and
Nur A. Touba},
title = {Partial Error Masking to Reduce Soft Error Failure Rate in Logic Circuits},
booktitle = {18th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2003), 3-5 November 2003, Boston, MA, USA,
Proceedings},
pages = {433},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/DFTVS.2003.1250141},
doi = {10.1109/DFTVS.2003.1250141},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MohanramT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/KrishnaT03,
author = {C. V. Krishna and
Nur A. Touba},
title = {Adjustable Width Linear Combinational Scan Vector Decompression},
booktitle = {2003 International Conference on Computer-Aided Design, {ICCAD} 2003,
San Jose, CA, USA, November 9-13, 2003},
pages = {863--866},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2003},
url = {https://doi.ieeecomputersociety.org/10.1109/ICCAD.2003.1257909},
doi = {10.1109/ICCAD.2003.1257909},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/KrishnaT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/MohanramySGT03,
author = {Kartik Mohanram and
Egor S. Sogomonyan and
Michael G{\"{o}}ssel and
Nur A. Touba},
title = {Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits},
booktitle = {9th {IEEE} International On-Line Testing Symposium {(IOLTS} 2003),
7-9 July 2003, Kos Island, Greece},
pages = {35},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/OLT.2003.1214364},
doi = {10.1109/OLT.2003.1214364},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/MohanramySGT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/GhoshBT03,
author = {Shalini Ghosh and
Sugato Basu and
Nur A. Touba},
title = {Joint Minimization of Power and Area in Scan Testing by Scan Cell
Reordering},
booktitle = {2003 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2003), New Trends and Technologies for {VLSI} Systems Design, 20-21
February 2003, Tampa, FL, {USA}},
pages = {246--249},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ISVLSI.2003.1183485},
doi = {10.1109/ISVLSI.2003.1183485},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/GhoshBT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MohanramT03,
author = {Kartik Mohanram and
Nur A. Touba},
title = {Cost-Effective Approach for Reducing Soft Error Failure Rate in Logic
Circuits},
booktitle = {Proceedings 2003 International Test Conference {(ITC} 2003), Breaking
Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte,
NC, {USA}},
pages = {893--901},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/TEST.2003.1271075},
doi = {10.1109/TEST.2003.1271075},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MohanramT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MohanramT03,
author = {Kartik Mohanram and
Nur A. Touba},
title = {Eliminating Non-Determinism During Test of High-Speed Source Synchronous
Differential Buses},
booktitle = {21st {IEEE} {VLSI} Test Symposium {(VTS} 2003), 27 April - 1 May 2003,
Napa Valley, CA, {USA}},
pages = {121--127},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/VTEST.2003.1197642},
doi = {10.1109/VTEST.2003.1197642},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MohanramT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BalakrishnanT03,
author = {Kedarnath J. Balakrishnan and
Nur A. Touba},
title = {Deterministic Test Vector Decompression in Software Using Linear Operations},
booktitle = {21st {IEEE} {VLSI} Test Symposium {(VTS} 2003), 27 April - 1 May 2003,
Napa Valley, CA, {USA}},
pages = {225--231},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/VTEST.2003.1197655},
doi = {10.1109/VTEST.2003.1197655},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BalakrishnanT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/JasT02,
author = {Abhijit Jas and
Nur A. Touba},
title = {Deterministic Test Vector Compression/Decompression for Systems-on-a-Chip
Using an Embedded Processor},
journal = {J. Electron. Test.},
volume = {18},
number = {4-5},
pages = {503--514},
year = {2002},
url = {https://doi.org/10.1023/A:1016505926570},
doi = {10.1023/A:1016505926570},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/JasT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/Touba02,
author = {Nur A. Touba},
title = {Circular {BIST} with state skipping},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {10},
number = {5},
pages = {668--672},
year = {2002},
url = {https://doi.org/10.1109/TVLSI.2002.801564},
doi = {10.1109/TVLSI.2002.801564},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/Touba02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/delta/SankaralingamT02,
author = {Ranganathan Sankaralingam and
Nur A. Touba},
title = {Reducing Test Power During Test Using Programmable Scan Chain Disable},
booktitle = {1st {IEEE} International Workshop on Electronic Design, Test and Applications
{(DELTA} 2002), 29-31 January 2002, Christchurch, New Zealand},
pages = {159--166},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DELTA.2002.994606},
doi = {10.1109/DELTA.2002.994606},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/delta/SankaralingamT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MohanramT02,
author = {Kartik Mohanram and
Nur A. Touba},
title = {Input Ordering in Concurrent Checkers to Reduce Power Consumption},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {87--98},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173505},
doi = {10.1109/DFTVS.2002.1173505},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MohanramT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/SankaralingamT02,
author = {Ranganathan Sankaralingam and
Nur A. Touba},
title = {Inserting Test Points to Control Peak Power During Scan Testing},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {138--146},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173510},
doi = {10.1109/DFTVS.2002.1173510},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/SankaralingamT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/BalakrishnanT02,
author = {Kedarnath J. Balakrishnan and
Nur A. Touba},
title = {Matrix-Based Test Vector Decompression Using an Embedded Processor},
booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC,
Canada, Proceedings},
pages = {159--165},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DFTVS.2002.1173512},
doi = {10.1109/DFTVS.2002.1173512},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/BalakrishnanT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MohanramKT02,
author = {Kartik Mohanram and
C. V. Krishna and
Nur A. Touba},
title = {A methodology for automated insertion of concurrent error detection
hardware in synthesizable Verilog {RTL}},
booktitle = {Proceedings of the 2002 International Symposium on Circuits and Systems,
{ISCAS} 2002, Scottsdale, Arizona, USA, May 26-29, 2002},
pages = {577--580},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/ISCAS.2002.1009906},
doi = {10.1109/ISCAS.2002.1009906},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MohanramKT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/KrishnaT02,
author = {C. V. Krishna and
Nur A. Touba},
title = {Reducing Test Dat Volume Using {LFSR} Reseeding with Seed Compression},
booktitle = {Proceedings {IEEE} International Test Conference 2002, Baltimore,
MD, USA, October 7-10, 2002},
pages = {321--330},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/TEST.2002.1041775},
doi = {10.1109/TEST.2002.1041775},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/KrishnaT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MacDonaldT02,
author = {Eric W. MacDonald and
Nur A. Touba},
title = {Very Low Voltage Testing of {SOI} Integrated Circuits},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {25--30},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011106},
doi = {10.1109/VTS.2002.1011106},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MacDonaldT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SankaralingamT02,
author = {Ranganathan Sankaralingam and
Nur A. Touba},
title = {Controlling Peak Power During Scan Testing},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {153--159},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011127},
doi = {10.1109/VTS.2002.1011127},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SankaralingamT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ToubaM01,
author = {Nur A. Touba and
Edward J. McCluskey},
title = {Bit-fixing in pseudorandom sequences for scan {BIST}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {20},
number = {4},
pages = {545--555},
year = {2001},
url = {https://doi.org/10.1109/43.918212},
doi = {10.1109/43.918212},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ToubaM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/Ghosh-DastidarT01,
author = {Jayabrata Ghosh{-}Dastidar and
Nur A. Touba},
title = {Improving Diagnostic Resolution of Delay Faults in FPGAs by Exploiting
Reconfigurability},
booktitle = {16th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2001), 24-26 October 2001, San Francisco,
CA, USA, Proceedings},
pages = {215--220},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/DFTVS.2001.966773},
doi = {10.1109/DFTVS.2001.966773},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/Ghosh-DastidarT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/KrishnaJT01,
author = {C. V. Krishna and
Abhijit Jas and
Nur A. Touba},
title = {Test vector encoding using partial {LFSR} reseeding},
booktitle = {Proceedings {IEEE} International Test Conference 2001, Baltimore,
MD, USA, 30 October - 1 November 2001},
pages = {885--893},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/TEST.2001.966711},
doi = {10.1109/TEST.2001.966711},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/KrishnaJT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JasKT01,
author = {Abhijit Jas and
C. V. Krishna and
Nur A. Touba},
title = {Hybrid {BIST} Based on Weighted Pseudo-Random Testing: {A} New Test
Resource Partitioning Scheme},
booktitle = {19th {IEEE} {VLSI} Test Symposium {(VTS} 2001), Test and Diagnosis
in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA,
{USA}},
pages = {2--8},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/VTS.2001.923409},
doi = {10.1109/VTS.2001.923409},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/JasKT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SankaralingamTP01,
author = {Ranganathan Sankaralingam and
Nur A. Touba and
Bahram Pouya},
title = {Reducing Power Dissipation during Test Using Scan Chain Disable},
booktitle = {19th {IEEE} {VLSI} Test Symposium {(VTS} 2001), Test and Diagnosis
in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA,
{USA}},
pages = {319--325},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/VTS.2001.923456},
doi = {10.1109/VTS.2001.923456},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SankaralingamTP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/MacDonaldT00,
author = {Eric W. MacDonald and
Nur A. Touba},
title = {Testing domino circuits in {SOI} technology},
booktitle = {9th Asian Test Symposium {(ATS} 2000), 4-6 December 2000, Taipei,
Taiwan},
pages = {441--446},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ATS.2000.893664},
doi = {10.1109/ATS.2000.893664},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/MacDonaldT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/Ghosh-DastidarT00,
author = {Jayabrata Ghosh{-}Dastidar and
Nur A. Touba},
title = {Diagnosing resistive bridges using adaptive techniques},
booktitle = {Proceedings of the {IEEE} 2000 Custom Integrated Circuits Conference,
{CICC} 2000, Orlando, FL, USA, May 21-24, 2000},
pages = {79--82},
publisher = {{IEEE}},
year = {2000},
url = {https://doi.org/10.1109/CICC.2000.852622},
doi = {10.1109/CICC.2000.852622},
timestamp = {Mon, 10 Oct 2022 09:13:21 +0200},
biburl = {https://dblp.org/rec/conf/cicc/Ghosh-DastidarT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/DasTSG00,
author = {Debaleena Das and
Nur A. Touba and
Markus Seuring and
Michael G{\"{o}}ssel},
title = {Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes},
booktitle = {6th {IEEE} International On-Line Testing Workshop {(IOLTW} 2000),
3-5 July 2000, Palma de Mallorca, Spain},
pages = {171},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/OLT.2000.856633},
doi = {10.1109/OLT.2000.856633},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/DasTSG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/DasT00,
author = {Debaleena Das and
Nur A. Touba},
title = {Reducing test data volume using external/LBIST hybrid test patterns},
booktitle = {Proceedings {IEEE} International Test Conference 2000, Atlantic City,
NJ, USA, October 2000},
pages = {115--122},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/TEST.2000.894198},
doi = {10.1109/TEST.2000.894198},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/DasT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SankaralingamOT00,
author = {Ranganathan Sankaralingam and
Rama Rao Oruganti and
Nur A. Touba},
title = {Static Compaction Techniques to Control Scan Vector Power Dissipation},
booktitle = {18th {IEEE} {VLSI} Test Symposium {(VTS} 2000), 30 April - 4 May 2000,
Montreal, Canada},
pages = {35--42},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/VTEST.2000.843824},
doi = {10.1109/VTEST.2000.843824},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SankaralingamOT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JasPT00,
author = {Abhijit Jas and
Bahram Pouya and
Nur A. Touba},
title = {Virtual Scan Chains: {A} Means for Reducing Scan Length in Cores},
booktitle = {18th {IEEE} {VLSI} Test Symposium {(VTS} 2000), 30 April - 4 May 2000,
Montreal, Canada},
pages = {73--78},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/VTEST.2000.843829},
doi = {10.1109/VTEST.2000.843829},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/JasPT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Ghosh-DastidarT00,
author = {Jayabrata Ghosh{-}Dastidar and
Nur A. Touba},
title = {A Rapid and Scalable Diagnosis Scheme for {BIST} Environments with
a Large Number of Scan Chains},
booktitle = {18th {IEEE} {VLSI} Test Symposium {(VTS} 2000), 30 April - 4 May 2000,
Montreal, Canada},
pages = {79--88},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/VTEST.2000.843830},
doi = {10.1109/VTEST.2000.843830},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Ghosh-DastidarT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/DasT99,
author = {Debaleena Das and
Nur A. Touba},
title = {Synthesis of Circuits with Low-Cost Concurrent Error Detection Based
on Bose-Lin Codes},
journal = {J. Electron. Test.},
volume = {15},
number = {1-2},
pages = {145--155},
year = {1999},
url = {https://doi.org/10.1023/A:1008344603814},
doi = {10.1023/A:1008344603814},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/DasT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ToubaM99,
author = {Nur A. Touba and
Edward J. McCluskey},
title = {{RP-SYN:} synthesis of random pattern testable circuits with test
point insertion},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {18},
number = {8},
pages = {1202--1213},
year = {1999},
url = {https://doi.org/10.1109/43.775638},
doi = {10.1109/43.775638},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ToubaM99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/JasMT99,
author = {Abhijit Jas and
Kartik Mohanram and
Nur A. Touba},
title = {An Embedded Core {DFT} Scheme to Obtain Highly Compressed Test Sets},
booktitle = {8th Asian Test Symposium {(ATS} '99), 16-18 November 1999, Shanghai,
China},
pages = {275},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ATS.1999.810763},
doi = {10.1109/ATS.1999.810763},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/JasMT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/JasT99,
author = {Abhijit Jas and
Nur A. Touba},
title = {Using an Embedded Processor for Efficient Deterministic Testing of
Systems-on-a-Chip},
booktitle = {Proceedings of the {IEEE} International Conference On Computer Design,
{VLSI} in Computers and Processors, {ICCD} '99, Austin, Texas, USA,
October 10-13, 1999},
pages = {418},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICCD.1999.808576},
doi = {10.1109/ICCD.1999.808576},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/JasT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/QuddusJT99,
author = {W. Quddus and
Abhijit Jas and
Nur A. Touba},
title = {Configuration self-test in FPGA-based reconfigurable systems},
booktitle = {Proceedings of the 1999 International Symposium on Circuits and Systems,
{ISCAS} 1999, Orlando, Florida, USA, May 30 - June 2, 1999},
pages = {97--100},
publisher = {{IEEE}},
year = {1999},
url = {https://doi.org/10.1109/ISCAS.1999.777814},
doi = {10.1109/ISCAS.1999.777814},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/QuddusJT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JainiT99,
author = {P. K. Jaini and
Nur A. Touba},
title = {Observing test response of embedded cores through surrounding logic},
booktitle = {Proceedings of the 1999 International Symposium on Circuits and Systems,
{ISCAS} 1999, Orlando, Florida, USA, May 30 - June 2, 1999},
pages = {119--123},
publisher = {{IEEE}},
year = {1999},
url = {https://doi.org/10.1109/ISCAS.1999.777819},
doi = {10.1109/ISCAS.1999.777819},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JainiT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Ghosh-DastidarDT99,
author = {Jayabrata Ghosh{-}Dastidar and
Debaleena Das and
Nur A. Touba},
title = {Fault diagnosis in scan-based {BIST} using both time and space information},
booktitle = {Proceedings {IEEE} International Test Conference 1999, Atlantic City,
NJ, USA, 27-30 September 1999},
pages = {95--102},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/TEST.1999.805618},
doi = {10.1109/TEST.1999.805618},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Ghosh-DastidarDT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MacDonaldT99,
author = {Eric W. MacDonald and
Nur A. Touba},
title = {Delay testing of {SOI} circuits: Challenges with the history effect},
booktitle = {Proceedings {IEEE} International Test Conference 1999, Atlantic City,
NJ, USA, 27-30 September 1999},
pages = {269--275},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/TEST.1999.805640},
doi = {10.1109/TEST.1999.805640},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MacDonaldT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DasT99,
author = {Debaleena Das and
Nur A. Touba},
title = {A Low Cost Approach for Detecting, Locating, and Avoiding Interconnect
Faults in FPGA-Based Reconfigurable Systems},
booktitle = {12th International Conference on {VLSI} Design {(VLSI} Design 1999),
10-13 January 1999, Goa, India},
pages = {266--269},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICVD.1999.745159},
doi = {10.1109/ICVD.1999.745159},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DasT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JasGT99,
author = {Abhijit Jas and
Jayabrata Ghosh{-}Dastidar and
Nur A. Touba},
title = {Scan Vector Compression/Decompression Using Statistical Coding},
booktitle = {17th {IEEE} {VLSI} Test Symposium {(VTS} '99), 25-30 April 1999, San
Diego, CA, {USA}},
pages = {114--120},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/VTEST.1999.766654},
doi = {10.1109/VTEST.1999.766654},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/JasGT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Ghosh-DastidarT99,
author = {Jayabrata Ghosh{-}Dastidar and
Nur A. Touba},
title = {Adaptive Techniques for Improving Delay Fault Diagnosis},
booktitle = {17th {IEEE} {VLSI} Test Symposium {(VTS} '99), 25-30 April 1999, San
Diego, CA, {USA}},
pages = {168--172},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/VTEST.1999.766661},
doi = {10.1109/VTEST.1999.766661},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Ghosh-DastidarT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DasT99,
author = {Debaleena Das and
Nur A. Touba},
title = {Weight-Based Codes and Their Application to Concurrent Error Detection
of Multilevel Circuits},
booktitle = {17th {IEEE} {VLSI} Test Symposium {(VTS} '99), 25-30 April 1999, San
Diego, CA, {USA}},
pages = {370--377},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/VTEST.1999.766691},
doi = {10.1109/VTEST.1999.766691},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DasT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/KarkalaTW98,
author = {Madhavi Karkala and
Nur A. Touba and
Hans{-}Joachim Wunderlich},
title = {Special {ATPG} to Correlate Test Patterns for Low-Overhead Mixed-Mode
{BIST}},
booktitle = {7th Asian Test Symposium {(ATS} '98), 2-4 December 1998, Singapore},
pages = {492--499},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ATS.1998.741662},
doi = {10.1109/ATS.1998.741662},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/KarkalaTW98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/Ghosh-DastidarT98,
author = {Jayabrata Ghosh{-}Dastidar and
Nur A. Touba},
title = {A Systematic Approach for Diagnosing Multiple Delay Faults},
booktitle = {13th International Symposium on Defect and Fault-Tolerance in {VLSI}
Systems {(DFT} '98), 2-4 November 1998, Austin, TX, USA, Proceedings},
pages = {211--216},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/DFTVS.1998.732168},
doi = {10.1109/DFTVS.1998.732168},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/Ghosh-DastidarT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ZhaoPT98,
author = {Zhe Zhao and
Bahram Pouya and
Nur A. Touba},
title = {{BETSY:} synthesizing circuits for a specified {BIST} environment},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {144--153},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743147},
doi = {10.1109/TEST.1998.743147},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ZhaoPT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/JasT98,
author = {Abhijit Jas and
Nur A. Touba},
title = {Test vector decompression via cyclical scan chains and its application
to testing core-based designs},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {458--464},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743186},
doi = {10.1109/TEST.1998.743186},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/JasT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PouyaT98,
author = {Bahram Pouya and
Nur A. Touba},
title = {Synthesis of Zero-Aliasing Elementary-Tree Space Compactors},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {70--77},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670851},
doi = {10.1109/VTEST.1998.670851},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PouyaT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DasT98,
author = {Debaleena Das and
Nur A. Touba},
title = {Synthesis of Circuits with Low-Cost Concurrent Error Detection Based
on Bose-Lin Codes},
booktitle = {16th {IEEE} {VLSI} Test Symposium {(VTS} '98), 28 April - 1 May 1998,
Princeton, NJ, {USA}},
pages = {309--317},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/VTEST.1998.670885},
doi = {10.1109/VTEST.1998.670885},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/DasT98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/ToubaP97,
author = {Nur A. Touba and
Bahram Pouya},
title = {Using Partial Isolation Rings to Test Core-Based Designs},
journal = {{IEEE} Des. Test Comput.},
volume = {14},
number = {4},
pages = {52--59},
year = {1997},
url = {https://doi.org/10.1109/54.632881},
doi = {10.1109/54.632881},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/ToubaP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ToubaM97,
author = {Nur A. Touba and
Edward J. McCluskey},
title = {Logic synthesis of multilevel circuits with concurrent error detection},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {16},
number = {7},
pages = {783--789},
year = {1997},
url = {https://doi.org/10.1109/43.644041},
doi = {10.1109/43.644041},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ToubaM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ToubaM97,
author = {Nur A. Touba and
Edward J. McCluskey},
title = {Pseudo-Random Pattern Testing of Bridging Faults},
booktitle = {Proceedings 1997 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '97, Austin, Texas, USA,
October 12-15, 1997},
pages = {54--60},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICCD.1997.628849},
doi = {10.1109/ICCD.1997.628849},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ToubaM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/PouyaT97,
author = {Bahram Pouya and
Nur A. Touba},
title = {Modifying User-Defined Logic for Test Access to Embedded Cores},
booktitle = {Proceedings {IEEE} International Test Conference 1997, Washington,
DC, USA, November 3-5, 1997},
pages = {60--68},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/TEST.1997.639594},
doi = {10.1109/TEST.1997.639594},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/PouyaT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ToubaP97,
author = {Nur A. Touba and
Bahram Pouya},
title = {Testing Embedded Cores Using Partial Isolation Rings},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {10--16},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599435},
doi = {10.1109/VTEST.1997.599435},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ToubaP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Touba97,
author = {Nur A. Touba},
title = {Obtaining High Fault Coverage with Circular {BIST} Via State Skipping},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {410--415},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.600320},
doi = {10.1109/VTEST.1997.600320},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Touba97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ToubaM96,
author = {Nur A. Touba and
Edward J. McCluskey},
title = {Altering a Pseudo-Random Bit Sequence for Scan-Based {BIST}},
booktitle = {Proceedings {IEEE} International Test Conference 1996, Test and Design
Validity, Washington, DC, USA, October 20-25, 1996},
pages = {167--175},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/TEST.1996.556959},
doi = {10.1109/TEST.1996.556959},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ToubaM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ToubaM96,
author = {Nur A. Touba and
Edward J. McCluskey},
title = {Test point insertion based on path tracing},
booktitle = {14th {IEEE} {VLSI} Test Symposium (VTS'96), April 28 - May 1, 1996,
Princeton, NJ, {USA}},
pages = {2--8},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/VTEST.1996.510828},
doi = {10.1109/VTEST.1996.510828},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ToubaM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ToubaM96a,
author = {Nur A. Touba and
Edward J. McCluskey},
title = {Applying two-pattern tests using scan-mapping},
booktitle = {14th {IEEE} {VLSI} Test Symposium (VTS'96), April 28 - May 1, 1996,
Princeton, NJ, {USA}},
pages = {393--399},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/VTEST.1996.510884},
doi = {10.1109/VTEST.1996.510884},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ToubaM96a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ToubaM95,
author = {Nur A. Touba and
Edward J. McCluskey},
title = {Synthesis of Mapping Logic for Generating Transformed Pseudo-Random
Patterns for {BIST}},
booktitle = {Proceedings {IEEE} International Test Conference 1995, Driving Down
the Cost of Test, Washington, DC, USA, October 21-25, 1995},
pages = {674--682},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/TEST.1995.529897},
doi = {10.1109/TEST.1995.529897},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ToubaM95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ToubaM95,
author = {Nur A. Touba and
Edward J. McCluskey},
title = {Transformed pseudo-random patterns for {BIST}},
booktitle = {13th {IEEE} {VLSI} Test Symposium (VTS'95), April 30 - May 3, 1995,
Princeton, New Jersey, {USA}},
pages = {410--416},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/VTEST.1995.512668},
doi = {10.1109/VTEST.1995.512668},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ToubaM95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ToubaM94,
author = {Nur A. Touba and
Edward J. McCluskey},
editor = {Jochen A. G. Jess and
Richard L. Rudell},
title = {Logic synthesis techniques for reduced area implementation of multilevel
circuits with concurrent error detection},
booktitle = {Proceedings of the 1994 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1994, San Jose, California, USA, November 6-10, 1994},
pages = {651--654},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1994},
url = {https://doi.org/10.1109/ICCAD.1994.629891},
doi = {10.1109/ICCAD.1994.629891},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ToubaM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ToubaM94,
author = {Nur A. Touba and
Edward J. McCluskey},
title = {Automated Logic Synthesis of Random-Pattern-Testable Circuits},
booktitle = {Proceedings {IEEE} International Test Conference 1994, {TEST:} The
Next 25 Years, Washington, DC, USA, October 2-6, 1994},
pages = {174--183},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/TEST.1994.527948},
doi = {10.1109/TEST.1994.527948},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ToubaM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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