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ORCIDBibTeX records: Russell Tessier
@article{DBLP:journals/pieee/StojilovicRRTT23,
author = {Mirjana Stojilovic and
Kasper Rasmussen and
Francesco Regazzoni and
Mehdi B. Tahoori and
Russell Tessier},
title = {A Visionary Look at the Security of Reconfigurable Cloud Computing},
journal = {Proc. {IEEE}},
volume = {111},
number = {12},
pages = {1548--1571},
year = {2023},
url = {https://doi.org/10.1109/JPROC.2023.3330729},
doi = {10.1109/JPROC.2023.3330729},
timestamp = {Sun, 31 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pieee/StojilovicRRTT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/LiSPTH23,
author = {Xiang Li and
Peter Stanwicks and
George Provelengios and
Russell Tessier and
Daniel E. Holcomb},
title = {Jitter-based Adaptive True Random Number Generation Circuits for FPGAs
in the Cloud},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {16},
number = {1},
pages = {3:1--3:20},
year = {2023},
url = {https://doi.org/10.1145/3487554},
doi = {10.1145/3487554},
timestamp = {Thu, 16 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/trets/LiSPTH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/MoiniDLPBTH23,
author = {Shayan Moini and
Aleksa Deric and
Xiang Li and
George Provelengios and
Wayne P. Burleson and
Russell Tessier and
Daniel E. Holcomb},
title = {Voltage Sensor Implementations for Remote Power Attacks on FPGAs},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {16},
number = {1},
pages = {11:1--11:21},
year = {2023},
url = {https://doi.org/10.1145/3555048},
doi = {10.1145/3555048},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/MoiniDLPBTH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TianMHTS23,
author = {Shanquan Tian and
Shayan Moini and
Daniel E. Holcomb and
Russell Tessier and
Jakub Szefer},
title = {A Practical Remote Power Attack on Machine Learning Accelerators in
Cloud FPGAs},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2023, Antwerp, Belgium, April 17-19, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.23919/DATE56975.2023.10136956},
doi = {10.23919/DATE56975.2023.10136956},
timestamp = {Wed, 07 Jun 2023 22:08:03 +0200},
biburl = {https://dblp.org/rec/conf/date/TianMHTS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/BouazzatiTTG23,
author = {Mohamed El Bouazzati and
Russell Tessier and
Philippe A. Tanguy and
Guy Gogniat},
editor = {Maksim Jenihhin and
Hana Kub{\'{a}}tov{\'{a}} and
Nele Metens and
Jaan Raik and
Foisal Ahmed and
Jan Belohoubek},
title = {A Lightweight Intrusion Detection System against IoT Memory Corruption
Attacks},
booktitle = {26th International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, {DDECS} 2023, Tallinn, Estonia, May 3-5, 2023},
pages = {118--123},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DDECS57882.2023.10139718},
doi = {10.1109/DDECS57882.2023.10139718},
timestamp = {Wed, 07 Jun 2023 22:08:03 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/BouazzatiTTG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/AlbartusEMFPT23,
author = {Nils Albartus and
Maik Ender and
Jan{-}Niklas M{\"{o}}ller and
Marc Fyrbiak and
Christof Paar and
Russell Tessier},
title = {On the Malicious Potential of Xilinx' Internal Configuration Access
Port {(ICAP)}},
booktitle = {International Conference on Field Programmable Technology, {ICFPT}
2023, Yokohama, Japan, December 12-14, 2023},
pages = {1},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ICFPT59805.2023.00059},
doi = {10.1109/ICFPT59805.2023.00059},
timestamp = {Sat, 24 Feb 2024 20:42:47 +0100},
biburl = {https://dblp.org/rec/conf/fpt/AlbartusEMFPT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MoiniKHT23,
author = {Shayan Moini and
Dhruv Kansagara and
Daniel E. Holcomb and
Russell Tessier},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Fault Recovery from Multi-Tenant {FPGA} Voltage Attacks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {557--562},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590246},
doi = {10.1145/3583781.3590246},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MoiniKHT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/BobdaMCETVEKHLH22,
author = {Christophe Bobda and
Joel Mandebi Mbongue and
Paul Chow and
Mohammad Ewais and
Naif Tarafdar and
Juan Camilo Vega and
Ken Eguro and
Dirk Koch and
Suranga Handagala and
Miriam Leeser and
Martin C. Herbordt and
Hafsah Shahzad and
H. Peter Hofstee and
Burkhard Ringlein and
Jakub Szefer and
Ahmed Sanaullah and
Russell Tessier},
title = {The Future of {FPGA} Acceleration in Datacenters and the Cloud},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {15},
number = {3},
pages = {34:1--34:42},
year = {2022},
url = {https://doi.org/10.1145/3506713},
doi = {10.1145/3506713},
timestamp = {Tue, 19 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/trets/BobdaMCETVEKHLH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/LiTH22,
author = {Xiang Li and
Russell Tessier and
Daniel E. Holcomb},
title = {Precise Fault Injection to Enable {DFIA} for Attacking {AES} in Remote
FPGAs},
booktitle = {30th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2022, New York City, NY, USA, May 15-18,
2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/FCCM53951.2022.9786154},
doi = {10.1109/FCCM53951.2022.9786154},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fccm/LiTH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esticas/MoiniTHST21,
author = {Shayan Moini and
Shanquan Tian and
Daniel E. Holcomb and
Jakub Szefer and
Russell Tessier},
title = {Power Side-Channel Attacks on {BNN} Accelerators in Remote FPGAs},
journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
volume = {11},
number = {2},
pages = {357--370},
year = {2021},
url = {https://doi.org/10.1109/JETCAS.2021.3074608},
doi = {10.1109/JETCAS.2021.3074608},
timestamp = {Tue, 13 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esticas/MoiniTHST21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tches/StolzASKNGFPGT21,
author = {Florian Stolz and
Nils Albartus and
Julian Speith and
Simon Klix and
Clemens Nasenberg and
Aiden Gula and
Marc Fyrbiak and
Christof Paar and
Tim G{\"{u}}neysu and
Russell Tessier},
title = {LifeLine for {FPGA} Protection: Obfuscated Cryptography for Real-World
Security},
journal = {{IACR} Trans. Cryptogr. Hardw. Embed. Syst.},
volume = {2021},
number = {4},
pages = {412--446},
year = {2021},
url = {https://doi.org/10.46586/tches.v2021.i4.412-446},
doi = {10.46586/TCHES.V2021.I4.412-446},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tches/StolzASKNGFPGT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MoiniTHST21,
author = {Shayan Moini and
Shanquan Tian and
Daniel E. Holcomb and
Jakub Szefer and
Russell Tessier},
title = {Remote Power Side-Channel Attacks on {BNN} Accelerators in FPGAs},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {1639--1644},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9473915},
doi = {10.23919/DATE51398.2021.9473915},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MoiniTHST21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/TianMWHTS21,
author = {Shanquan Tian and
Shayan Moini and
Adam Wolnikowski and
Daniel E. Holcomb and
Russell Tessier and
Jakub Szefer},
title = {Remote Power Attacks on the Versatile Tensor Accelerator in Multi-Tenant
FPGAs},
booktitle = {29th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2021, Orlando, FL, USA, May 9-12, 2021},
pages = {242--246},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/FCCM51124.2021.00037},
doi = {10.1109/FCCM51124.2021.00037},
timestamp = {Mon, 07 Jun 2021 17:13:01 +0200},
biburl = {https://dblp.org/rec/conf/fccm/TianMWHTS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/uss/AlbartusNSFPT21,
author = {Nils Albartus and
Clemens Nasenberg and
Florian Stolz and
Marc Fyrbiak and
Christof Paar and
Russell Tessier},
editor = {Michael D. Bailey and
Rachel Greenstadt},
title = {On the Design and Misuse of Microcoded (Embedded) Processors - {A}
Cautionary Note},
booktitle = {30th {USENIX} Security Symposium, {USENIX} Security 2021, August 11-13,
2021},
pages = {267--284},
publisher = {{USENIX} Association},
year = {2021},
url = {https://www.usenix.org/conference/usenixsecurity21/presentation/albartus},
timestamp = {Mon, 20 Nov 2023 08:57:49 +0100},
biburl = {https://dblp.org/rec/conf/uss/AlbartusNSFPT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/AlbartusNSFPT21,
author = {Nils Albartus and
Clemens Nasenberg and
Florian Stolz and
Marc Fyrbiak and
Christof Paar and
Russell Tessier},
title = {On the Design and Misuse of Microcoded (Embedded) Processors - {A}
Cautionary Note},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {663},
year = {2021},
url = {https://eprint.iacr.org/2021/663},
timestamp = {Mon, 07 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iacr/AlbartusNSFPT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/StolzASKNGFPGT21,
author = {Florian Stolz and
Nils Albartus and
Julian Speith and
Simon Klix and
Clemens Nasenberg and
Aiden Gula and
Marc Fyrbiak and
Christof Paar and
Tim G{\"{u}}neysu and
Russell Tessier},
title = {LifeLine for {FPGA} Protection: Obfuscated Cryptography for Real-World
Security},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {1277},
year = {2021},
url = {https://eprint.iacr.org/2021/1277},
timestamp = {Mon, 25 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iacr/StolzASKNGFPGT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/ZhangSPD0T20,
author = {Xuzhi Zhang and
Xiaozhe Shao and
George Provelengios and
Naveen Kumar Dumpala and
Lixin Gao and
Russell Tessier},
title = {CoNFV: {A} Heterogeneous Platform for Scalable Network Function Virtualization},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {14},
number = {1},
pages = {1:1--1:29},
year = {2020},
url = {https://doi.org/10.1145/3409113},
doi = {10.1145/3409113},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/ZhangSPD0T20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ProvelengiosHT20,
author = {George Provelengios and
Daniel E. Holcomb and
Russell Tessier},
title = {Power Distribution Attacks in Multitenant FPGAs},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {28},
number = {12},
pages = {2685--2698},
year = {2020},
url = {https://doi.org/10.1109/TVLSI.2020.3027711},
doi = {10.1109/TVLSI.2020.3027711},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/ProvelengiosHT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ProvelengiosHT20,
author = {George Provelengios and
Daniel E. Holcomb and
Russell Tessier},
editor = {Nele Mentens and
Leonel Sousa and
Pedro Trancoso and
Miquel Peric{\`{a}}s and
Ioannis Sourdis},
title = {Power Wasting Circuits for Cloud {FPGA} Attacks},
booktitle = {30th International Conference on Field-Programmable Logic and Applications,
{FPL} 2020, Gothenburg, Sweden, August 31 - September 4, 2020},
pages = {231--235},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/FPL50879.2020.00046},
doi = {10.1109/FPL50879.2020.00046},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ProvelengiosHT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icfpt/LiSPTH20,
author = {Xiang Li and
Peter Stanwicks and
George Provelengios and
Russell Tessier and
Daniel E. Holcomb},
title = {Jitter-based Adaptive True Random Number Generation for FPGAs in the
Cloud},
booktitle = {International Conference on Field-Programmable Technology, {(IC)FPT}
2020, Maui, HI, USA, December 9-11, 2020},
pages = {112--119},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ICFPT51103.2020.00024},
doi = {10.1109/ICFPT51103.2020.00024},
timestamp = {Tue, 11 May 2021 10:41:35 +0200},
biburl = {https://dblp.org/rec/conf/icfpt/LiSPTH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icfpt/ZhangT20,
author = {Xuzhi Zhang and
Russell Tessier},
title = {Service Chaining for Heterogeneous Middleboxes},
booktitle = {International Conference on Field-Programmable Technology, {(IC)FPT}
2020, Maui, HI, USA, December 9-11, 2020},
pages = {263--267},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ICFPT51103.2020.00045},
doi = {10.1109/ICFPT51103.2020.00045},
timestamp = {Tue, 11 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icfpt/ZhangT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/MoiniLSPBTH20,
author = {Shayan Moini and
Xiang Li and
Peter Stanwicks and
George Provelengios and
Wayne P. Burleson and
Russell Tessier and
Daniel E. Holcomb},
title = {Understanding and Comparing the Capabilities of On-Chip Voltage Sensors
against Remote Power Attacks on FPGAs},
booktitle = {63rd {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2020, Springfield, MA, USA, August 9-12, 2020},
pages = {941--944},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/MWSCAS48704.2020.9184683},
doi = {10.1109/MWSCAS48704.2020.9184683},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/MoiniLSPBTH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/ZhangPT20,
author = {Xuzhi Zhang and
Narendra Prabhu and
Russell Tessier},
title = {NestedNet: {A} Container-based Prototyping Tool for Hierarchical Software
Defined Networks},
booktitle = {International Workshop on Rapid System Prototyping, {RSP} 2020, Hamburg,
Germany, September 24-25, 2020},
pages = {1--7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/RSP51120.2020.9244858},
doi = {10.1109/RSP51120.2020.9244858},
timestamp = {Tue, 10 Nov 2020 11:00:25 +0100},
biburl = {https://dblp.org/rec/conf/rsp/ZhangPT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2011-07603,
author = {Shayan Moini and
Shanquan Tian and
Jakub Szefer and
Daniel E. Holcomb and
Russell Tessier},
title = {Remote Power Side-Channel Attacks on {CNN} Accelerators in FPGAs},
journal = {CoRR},
volume = {abs/2011.07603},
year = {2020},
url = {https://arxiv.org/abs/2011.07603},
eprinttype = {arXiv},
eprint = {2011.07603},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2011-07603.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tdsc/FyrbiakWSHHWWTP19,
author = {Marc Fyrbiak and
Sebastian Wallat and
Pawel Swierczynski and
Max Hoffmann and
Sebastian Hoppach and
Matthias Wilhelm and
Tobias Weidlich and
Russell Tessier and
Christof Paar},
title = {{HAL} - The Missing Piece of the Puzzle for Hardware Reverse Engineering,
Trojan Detection and Insertion},
journal = {{IEEE} Trans. Dependable Secur. Comput.},
volume = {16},
number = {3},
pages = {498--510},
year = {2019},
url = {https://doi.org/10.1109/TDSC.2018.2812183},
doi = {10.1109/TDSC.2018.2812183},
timestamp = {Thu, 09 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tdsc/FyrbiakWSHHWWTP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/DumpalaPHT19,
author = {Naveen Kumar Dumpala and
Shivukumar B. Patil and
Daniel E. Holcomb and
Russell Tessier},
title = {Loop Unrolling for Energy Efficiency in Low-Cost Field-Programmable
Gate Arrays},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {11},
number = {4},
pages = {26:1--26:23},
year = {2019},
url = {https://doi.org/10.1145/3289186},
doi = {10.1145/3289186},
timestamp = {Fri, 07 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/DumpalaPHT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/BobdaTEK19,
author = {Christophe Bobda and
Russell Tessier and
Ken Eguro and
Ryan Kastner},
title = {Introduction to the Special Section on Security in FPGA-accelerated
Cloud and Datacenters},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {12},
number = {3},
year = {2019},
url = {https://doi.org/10.1145/3352060},
doi = {10.1145/3352060},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/BobdaTEK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/UsmaniKMSTH19,
author = {Mohammad A. Usmani and
Shahrzad Keshavarz and
Eric Matthews and
Lesley Shannon and
Russell Tessier and
Daniel E. Holcomb},
title = {Efficient PUF-Based Key Generation in FPGAs Using Per-Device Configuration},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {27},
number = {2},
pages = {364--375},
year = {2019},
url = {https://doi.org/10.1109/TVLSI.2018.2877438},
doi = {10.1109/TVLSI.2018.2877438},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/UsmaniKMSTH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ProvelengiosRPE19,
author = {George Provelengios and
Chethan Ramesh and
Shivukumar B. Patil and
Ken Eguro and
Russell Tessier and
Daniel E. Holcomb},
editor = {Kia Bazargan and
Stephen Neuendorffer},
title = {Characterization of Long Wire Data Leakage in Deep Submicron FPGAs},
booktitle = {Proceedings of the 2019 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} 2019, Seaside, CA, USA, February 24-26, 2019},
pages = {292--297},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3289602.3293923},
doi = {10.1145/3289602.3293923},
timestamp = {Fri, 07 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/ProvelengiosRPE19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ProvelengiosHT19,
author = {George Provelengios and
Daniel E. Holcomb and
Russell Tessier},
editor = {Ioannis Sourdis and
Christos{-}Savvas Bouganis and
Carlos {\'{A}}lvarez and
Leonel Antonio Toledo D{\'{\i}}az and
Pedro Valero{-}Lara and
Xavier Martorell},
title = {Characterizing Power Distribution Attacks in Multi-User {FPGA} Environments},
booktitle = {29th International Conference on Field Programmable Logic and Applications,
{FPL} 2019, Barcelona, Spain, September 8-12, 2019},
pages = {194--201},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FPL.2019.00038},
doi = {10.1109/FPL.2019.00038},
timestamp = {Fri, 07 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/ProvelengiosHT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/XiaSZJTD19,
author = {Lijuan Xia and
Ahmed Soltan and
Xuzhi Zhang and
Andrew Jackson and
Russell Tessier and
Patrick Degenaar},
title = {Closed-Loop Proportion-Derivative Control of Suppressing Seizures
in a Neural Mass Model},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
Sapporo, Japan, May 26-29, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISCAS.2019.8702385},
doi = {10.1109/ISCAS.2019.8702385},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/XiaSZJTD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/FyrbiakWDABTP19,
author = {Marc Fyrbiak and
Sebastian Wallat and
Jonathan D{\'{e}}chelotte and
Nils Albartus and
Sinan B{\"{o}}cker and
Russell Tessier and
Christof Paar},
title = {On the Difficulty of FSM-based Hardware Obfuscation},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {1163},
year = {2019},
url = {https://eprint.iacr.org/2019/1163},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iacr/FyrbiakWDABTP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/FyrbiakRBTP18,
author = {Marc Fyrbiak and
Simon Rokicki and
Nicolai Bissantz and
Russell Tessier and
Christof Paar},
title = {Hybrid Obfuscation to Protect Against Disclosure Attacks on Embedded
Microprocessors},
journal = {{IEEE} Trans. Computers},
volume = {67},
number = {3},
pages = {307--321},
year = {2018},
url = {https://doi.org/10.1109/TC.2017.2649520},
doi = {10.1109/TC.2017.2649520},
timestamp = {Mon, 19 Feb 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/FyrbiakRBTP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tches/FyrbiakWDABTP18,
author = {Marc Fyrbiak and
Sebastian Wallat and
Jonathan D{\'{e}}chelotte and
Nils Albartus and
Sinan B{\"{o}}cker and
Russell Tessier and
Christof Paar},
title = {On the Difficulty of FSM-based Hardware Obfuscation},
journal = {{IACR} Trans. Cryptogr. Hardw. Embed. Syst.},
volume = {2018},
number = {3},
pages = {293--330},
year = {2018},
url = {https://doi.org/10.13154/tches.v2018.i3.293-330},
doi = {10.13154/TCHES.V2018.I3.293-330},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tches/FyrbiakWDABTP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/PatilLT18,
author = {Shivukumar B. Patil and
Tianqi Liu and
Russell Tessier},
title = {A Bandwidth-Optimized Routing Algorithm for Hybrid {FPGA} Networks-on-Chip},
booktitle = {26th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2018, Boulder, CO, USA, April 29 - May
1, 2018},
pages = {25--28},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FCCM.2018.00013},
doi = {10.1109/FCCM.2018.00013},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/PatilLT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/RameshPDPPHT18,
author = {Chethan Ramesh and
Shivukumar B. Patil and
Siva Nishok Dhanuskodi and
George Provelengios and
S{\'{e}}bastien Pillement and
Daniel E. Holcomb and
Russell Tessier},
title = {{FPGA} Side Channel Attacks without Physical Access},
booktitle = {26th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2018, Boulder, CO, USA, April 29 - May
1, 2018},
pages = {45--52},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FCCM.2018.00016},
doi = {10.1109/FCCM.2018.00016},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/RameshPDPPHT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DechelotteTDC18,
author = {Jonathan D{\'{e}}chelotte and
Russell Tessier and
Dominique Dallet and
J{\'{e}}r{\'{e}}mie Crenne},
title = {Lynq: {A} Lightweight Software Layer for Rapid SoC {FPGA} Prototyping},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {372--375},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00070},
doi = {10.1109/FPL.2018.00070},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/DechelotteTDC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ProvelengiosPTW18,
author = {George Provelengios and
Arman Pouraghily and
Russell Tessier and
Tilman Wolf},
title = {A Hardware Monitor to Protect Linux System Calls},
booktitle = {2018 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2018,
Hong Kong, China, July 8-11, 2018},
pages = {551--556},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ISVLSI.2018.00106},
doi = {10.1109/ISVLSI.2018.00106},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/ProvelengiosPTW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MiglioreSRLTFGT17,
author = {Vincent Migliore and
C{\'{e}}dric Seguin and
Maria Mendez Real and
Vianney Lapotre and
Arnaud Tisserand and
Caroline Fontaine and
Guy Gogniat and
Russell Tessier},
title = {A High-Speed Accelerator for Homomorphic Encryption using the Karatsuba
Algorithm},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {138:1--138:17},
year = {2017},
url = {https://doi.org/10.1145/3126558},
doi = {10.1145/3126558},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/MiglioreSRLTFGT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PouraghilyWT17,
author = {Arman Pouraghily and
Tilman Wolf and
Russell Tessier},
title = {Hardware support for embedded operating system security},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {61--66},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995260},
doi = {10.1109/ASAP.2017.7995260},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PouraghilyWT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/DumpalaPHT17,
author = {Naveen Kumar Dumpala and
Shivukumar B. Patil and
Daniel E. Holcomb and
Russell Tessier},
title = {Energy Efficient Loop Unrolling for Low-Cost FPGAs},
booktitle = {25th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2017, Napa, CA, USA, April 30 - May 2,
2017},
pages = {117--120},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/FCCM.2017.22},
doi = {10.1109/FCCM.2017.22},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/DumpalaPHT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/ZhangSPDGT17,
author = {Xuzhi Zhang and
Xiaozhe Shao and
George Provelengios and
Naveen Kumar Dumpala and
Lixin Gao and
Russell Tessier},
title = {Scalable Network Function Virtualization for Heterogeneous Middleboxes},
booktitle = {25th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2017, Napa, CA, USA, April 30 - May 2,
2017},
pages = {219--226},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/FCCM.2017.24},
doi = {10.1109/FCCM.2017.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/ZhangSPDGT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/FyrbiakWSHHWWTP17,
author = {Marc Fyrbiak and
Sebastian Wallat and
Pawel Swierczynski and
Max Hoffmann and
Sebastian Hoppach and
Matthias Wilhelm and
Tobias Weidlich and
Russell Tessier and
Christof Paar},
title = {{HAL-} The Missing Piece of the Puzzle for Hardware Reverse Engineering,
Trojan Detection and Insertion},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {783},
year = {2017},
url = {http://eprint.iacr.org/2017/783},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iacr/FyrbiakWSHHWWTP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/HuCGTW16,
author = {Kekai Hu and
Harikrishnan Kumarapillai Chandrikakutty and
Zachary Goodman and
Russell Tessier and
Tilman Wolf},
title = {Dynamic Hardware Monitors for Network Processor Protection},
journal = {{IEEE} Trans. Computers},
volume = {65},
number = {3},
pages = {860--872},
year = {2016},
url = {https://doi.org/10.1109/TC.2015.2435750},
doi = {10.1109/TC.2015.2435750},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/HuCGTW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HuriauxST16,
author = {Christophe Huriaux and
Olivier Sentieys and
Russell Tessier},
editor = {Paolo Ienne and
Walid A. Najjar and
Jason Helge Anderson and
Philip Brisk and
Walter Stechele},
title = {Effects of {I/O} routing through column interfaces in embedded {FPGA}
fabrics},
booktitle = {26th International Conference on Field Programmable Logic and Applications,
{FPL} 2016, Lausanne, Switzerland, August 29 - September 2, 2016},
pages = {1--9},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/FPL.2016.7577376},
doi = {10.1109/FPL.2016.7577376},
timestamp = {Fri, 17 Jan 2020 17:11:15 +0100},
biburl = {https://dblp.org/rec/conf/fpl/HuriauxST16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VyasDTH16,
author = {Shrikant Vyas and
Naveen Kumar Dumpala and
Russell Tessier and
Daniel E. Holcomb},
editor = {Paolo Ienne and
Walid A. Najjar and
Jason Helge Anderson and
Philip Brisk and
Walter Stechele},
title = {Improving the efficiency of PUF-based key generation in FPGAs using
variation-aware placement},
booktitle = {26th International Conference on Field Programmable Logic and Applications,
{FPL} 2016, Lausanne, Switzerland, August 29 - September 2, 2016},
pages = {1--4},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/FPL.2016.7577307},
doi = {10.1109/FPL.2016.7577307},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/VyasDTH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/LiuDT16,
author = {Tianqi Liu and
Naveen Kumar Dumpala and
Russell Tessier},
editor = {Yuchen Song and
Shaojun Wang and
Brent Nelson and
Junbao Li and
Yu Peng},
title = {Hybrid hard NoCs for efficient {FPGA} communication},
booktitle = {2016 International Conference on Field-Programmable Technology, {FPT}
2016, Xi'an, China, December 7-9, 2016},
pages = {157--164},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/FPT.2016.7929522},
doi = {10.1109/FPT.2016.7929522},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/LiuDT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/AndrycTT16,
author = {Kevin Andryc and
Tedy Thomas and
Russell Tessier},
title = {Soft GPGPUs for Embedded FPGAs: An Architectural Evaluation},
journal = {CoRR},
volume = {abs/1606.06454},
year = {2016},
url = {http://arxiv.org/abs/1606.06454},
eprinttype = {arXiv},
eprint = {1606.06454},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/AndrycTT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pieee/TessierPD15,
author = {Russell Tessier and
Kenneth L. Pocek and
Andr{\'{e}} DeHon},
title = {Reconfigurable Computing Architectures},
journal = {Proc. {IEEE}},
volume = {103},
number = {3},
pages = {332--354},
year = {2015},
url = {https://doi.org/10.1109/JPROC.2014.2386883},
doi = {10.1109/JPROC.2014.2386883},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pieee/TessierPD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tdsc/WolfCHUT15,
author = {Tilman Wolf and
Harikrishnan Kumarapillai Chandrikakutty and
Kekai Hu and
Deepak Unnikrishnan and
Russell Tessier},
title = {Securing Network Processors with High-Performance Hardware Monitors},
journal = {{IEEE} Trans. Dependable Secur. Comput.},
volume = {12},
number = {6},
pages = {652--664},
year = {2015},
url = {https://doi.org/10.1109/TDSC.2014.2373378},
doi = {10.1109/TDSC.2014.2373378},
timestamp = {Thu, 09 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tdsc/WolfCHUT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ThomasPHTW15,
author = {Tedy Thomas and
Arman Pouraghily and
Kekai Hu and
Russell Tessier and
Tilman Wolf},
title = {Multi-task support for security-enabled embedded processors},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {136--143},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245721},
doi = {10.1109/ASAP.2015.7245721},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ThomasPHTW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KainthKNVT15,
author = {Meha Kainth and
Lekshmi Krishnan and
Chaitra Narayana and
Sandesh Gubbi Virupaksha and
Russell Tessier},
editor = {Wolfgang Nebel and
David Atienza},
title = {Hardware-assisted code obfuscation for {FPGA} soft microprocessors},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {127--132},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755781},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/KainthKNVT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/SwierczynskiFPH15,
author = {Pawel Swierczynski and
Marc Fyrbiak and
Christof Paar and
Christophe Huriaux and
Russell Tessier},
title = {Protecting against Cryptographic Trojans in FPGAs},
booktitle = {23rd {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2015, Vancouver, BC, Canada, May 2-6, 2015},
pages = {151--154},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/FCCM.2015.55},
doi = {10.1109/FCCM.2015.55},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/SwierczynskiFPH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiuTBT15,
author = {Xiaobin Liu and
Tedy Thomas and
Alan Boguslawski and
Russell Tessier},
title = {Adaptive MRAM-based CGRAs},
booktitle = {25th International Conference on Field Programmable Logic and Applications,
{FPL} 2015, London, United Kingdom, September 2-4, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/FPL.2015.7293984},
doi = {10.1109/FPL.2015.7293984},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LiuTBT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LuTB15,
author = {Shiting (Justin) Lu and
Russell Tessier and
Wayne P. Burleson},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Reinforcement Learning for Thermal-aware Many-core Task Allocation},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {379--384},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742078},
doi = {10.1145/2742060.2742078},
timestamp = {Tue, 23 Jul 2019 15:03:09 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LuTB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LuTB14,
author = {Shiting (Justin) Lu and
Russell Tessier and
Wayne P. Burleson},
title = {Dynamic On-Chip Thermal Sensor Calibration Using Performance Counters},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {33},
number = {6},
pages = {853--866},
year = {2014},
url = {https://doi.org/10.1109/TCAD.2014.2302384},
doi = {10.1109/TCAD.2014.2302384},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LuTB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HuWTT14,
author = {Kekai Hu and
Tilman Wolf and
Thiago Teixeira and
Russell Tessier},
title = {System-Level Security for Network Processors with Hardware Monitors},
booktitle = {The 51st Annual Design Automation Conference 2014, {DAC} '14, San
Francisco, CA, USA, June 1-5, 2014},
pages = {211:1--211:6},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2593069.2593226},
doi = {10.1145/2593069.2593226},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HuWTT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/HuriauxST14,
author = {Christophe Huriaux and
Olivier Sentieys and
Russell Tessier},
title = {{FPGA} Architecture Enhancements to Support Heterogeneous Partially
Reconfigurable Regions},
booktitle = {22nd {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2014, Boston, MA, USA, May 11-13, 2014},
pages = {30},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/FCCM.2014.17},
doi = {10.1109/FCCM.2014.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/HuriauxST14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HuriauxST14,
author = {Christophe Huriaux and
Olivier Sentieys and
Russell Tessier},
title = {{FPGA} architecture support for heterogeneous, relocatable partial
bitstreams},
booktitle = {24th International Conference on Field Programmable Logic and Applications,
{FPL} 2014, Munich, Germany, 2-4 September, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/FPL.2014.6927494},
doi = {10.1109/FPL.2014.6927494},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HuriauxST14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ZhaoLBT14,
author = {Jia Zhao and
Shiting (Justin) Lu and
Wayne P. Burleson and
Russell Tessier},
title = {A Broadcast-Enabled Sensing System for Embedded Multi-core Processors},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2014, Tampa,
FL, USA, July 9-11, 2014},
pages = {190--195},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISVLSI.2014.18},
doi = {10.1109/ISVLSI.2014.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/ZhaoLBT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taes/LuSVCT13,
author = {Shiting (Justin) Lu and
Paul Siqueira and
Vishwas Vijayendra and
Harikrishnan Chandrikakutty and
Russell Tessier},
title = {Real-Time Differential Signal Phase Estimation for Space-Based Systems
using FPGAs},
journal = {{IEEE} Trans. Aerosp. Electron. Syst.},
volume = {49},
number = {2},
pages = {1192--1209},
year = {2013},
url = {https://doi.org/10.1109/TAES.2013.6494407},
doi = {10.1109/TAES.2013.6494407},
timestamp = {Thu, 16 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taes/LuSVCT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/UnnikrishnanVLCGT13,
author = {Deepak Unnikrishnan and
Ramakrishna Vadlamani and
Yong Liao and
J{\'{e}}r{\'{e}}mie Crenne and
Lixin Gao and
Russell Tessier},
title = {Reconfigurable Data Planes for Scalable Network Virtualization},
journal = {{IEEE} Trans. Computers},
volume = {62},
number = {12},
pages = {2476--2488},
year = {2013},
url = {https://doi.org/10.1109/TC.2012.155},
doi = {10.1109/TC.2012.155},
timestamp = {Sat, 21 Apr 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/UnnikrishnanVLCGT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/CrenneVGDTU13,
author = {J{\'{e}}r{\'{e}}mie Crenne and
Romain Vaslin and
Guy Gogniat and
Jean{-}Philippe Diguet and
Russell Tessier and
Deepak Unnikrishnan},
title = {Configurable memory security in embedded systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {12},
number = {3},
pages = {71:1--71:23},
year = {2013},
url = {https://doi.org/10.1145/2442116.2442121},
doi = {10.1145/2442116.2442121},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/CrenneVGDTU13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cns/HuCTW13,
author = {Kekai Hu and
Harikrishnan Chandrikakutty and
Russell Tessier and
Tilman Wolf},
title = {Scalable hardware monitors to protect network processors from data
plane attacks},
booktitle = {{IEEE} Conference on Communications and Network Security, {CNS} 2013,
National Harbor, MD, USA, October 14-16, 2013},
pages = {314--322},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CNS.2013.6682721},
doi = {10.1109/CNS.2013.6682721},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/cns/HuCTW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ChandrikakuttyUTW13,
author = {Harikrishnan Chandrikakutty and
Deepak Unnikrishnan and
Russell Tessier and
Tilman Wolf},
title = {High-performance hardware monitors to protect network processors from
data plane attacks},
booktitle = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin,
TX, USA, May 29 - June 07, 2013},
pages = {80:1--80:6},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2463209.2488832},
doi = {10.1145/2463209.2488832},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ChandrikakuttyUTW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZhaoLBT13,
author = {Jia Zhao and
Shiting (Justin) Lu and
Wayne P. Burleson and
Russell Tessier},
editor = {Enrico Macii},
title = {Run-time probabilistic detection of miscalibrated thermal sensors
in many-core systems},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {1395--1398},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.285},
doi = {10.7873/DATE.2013.285},
timestamp = {Mon, 06 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ZhaoLBT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Gomez-PradoCT13,
author = {Daniel Gomez{-}Prado and
Maciej J. Ciesielski and
Russell Tessier},
editor = {Enrico Macii},
title = {{FPGA} latency optimization using system-level transformations and
{DFG} restructuring},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {1553--1558},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.316},
doi = {10.7873/DATE.2013.316},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/Gomez-PradoCT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/UnnikrishnanVKGT13,
author = {Deepak Unnikrishnan and
Sandesh Gubbi Virupaksha and
Lekshmi Krishnan and
Lixin Gao and
Russell Tessier},
title = {Accelerating iterative algorithms with asynchronous accumulative updates
on FPGAs},
booktitle = {2013 International Conference on Field-Programmable Technology, {FPT}
2013, Kyoto, Japan, December 9-11, 2013},
pages = {66--73},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPT.2013.6718332},
doi = {10.1109/FPT.2013.6718332},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/UnnikrishnanVKGT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/AndrycMT13,
author = {Kevin Andryc and
Murtaza Merchant and
Russell Tessier},
title = {FlexGrip: {A} soft {GPGPU} for FPGAs},
booktitle = {2013 International Conference on Field-Programmable Technology, {FPT}
2013, Kyoto, Japan, December 9-11, 2013},
pages = {230--237},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPT.2013.6718358},
doi = {10.1109/FPT.2013.6718358},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/AndrycMT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/GormanST13,
author = {Cory Gorman and
Paul Siqueira and
Russell Tessier},
title = {An open-source {SATA} core for Virtex-4 FPGAs},
booktitle = {2013 International Conference on Field-Programmable Technology, {FPT}
2013, Kyoto, Japan, December 9-11, 2013},
pages = {454--457},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/FPT.2013.6718413},
doi = {10.1109/FPT.2013.6718413},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/GormanST13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhaoTB12,
author = {Jia Zhao and
Russell Tessier and
Wayne P. Burleson},
editor = {Erik Brunvard and
Ken Stevens and
Joseph R. Cavallaro and
Tong Zhang},
title = {Distributed sensor data processing for many-cores},
booktitle = {Great Lakes Symposium on {VLSI} 2012, GLSVLSI'12, Salt Lake City,
UT, USA, May 3-4, 2012},
pages = {159--164},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2206781.2206821},
doi = {10.1145/2206781.2206821},
timestamp = {Mon, 06 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhaoTB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icc/HanayLTW12,
author = {Y. Sinan Hanay and
Wei Li and
Russell Tessier and
Tilman Wolf},
title = {Saving energy and improving {TCP} throughput with rate adaptation
in Ethernet},
booktitle = {Proceedings of {IEEE} International Conference on Communications,
{ICC} 2012, Ottawa, ON, Canada, June 10-15, 2012},
pages = {1249--1254},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ICC.2012.6364655},
doi = {10.1109/ICC.2012.6364655},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/icc/HanayLTW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LuTB12,
author = {Shiting (Justin) Lu and
Russell Tessier and
Wayne P. Burleson},
editor = {Alan J. Hu},
title = {Collaborative calibration of on-chip thermal sensors using performance
counters},
booktitle = {2012 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 2012, San Jose, CA, USA, November 5-8, 2012},
pages = {15--22},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2429384.2429388},
doi = {10.1145/2429384.2429388},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/LuTB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ccr/YinULGT11,
author = {Dong Yin and
Deepak Unnikrishnan and
Yong Liao and
Lixin Gao and
Russell Tessier},
title = {Customizing virtual networks with partial {FPGA} reconfiguration},
journal = {Comput. Commun. Rev.},
volume = {41},
number = {1},
pages = {125--132},
year = {2011},
url = {https://doi.org/10.1145/1925861.1925882},
doi = {10.1145/1925861.1925882},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ccr/YinULGT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/comcom/WolfTP11,
author = {Tilman Wolf and
Russell Tessier and
Gayatri Prabhu},
title = {Securing the data path of next-generation router systems},
journal = {Comput. Commun.},
volume = {34},
number = {4},
pages = {598--606},
year = {2011},
url = {https://doi.org/10.1016/j.comcom.2010.03.019},
doi = {10.1016/J.COMCOM.2010.03.019},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/comcom/WolfTP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ZhaoMVBT11,
author = {Jia Zhao and
Sailaja Madduri and
Ramakrishna Vadlamani and
Wayne P. Burleson and
Russell Tessier},
title = {A Dedicated Monitoring Infrastructure for Multicore Processors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {19},
number = {6},
pages = {1011--1022},
year = {2011},
url = {https://doi.org/10.1109/TVLSI.2010.2043964},
doi = {10.1109/TVLSI.2010.2043964},
timestamp = {Mon, 06 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/ZhaoMVBT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ahs/VijayendraSCKT11,
author = {Vishwas Vijayendra and
Paul Siqueira and
Harikrishnan Chandrikakutty and
Akilesh Krishnamurthy and
Russell Tessier},
editor = {David Merodio and
Tughrul Arslan and
Umeshkumar D. Patel and
Didier Keymeulen and
Khaled Benkrid and
Ahmet T. Erdogan and
Michael Newell and
Luca Fossati and
Duane Armstrong},
title = {Real-time estimates of differential signal phase for spaceborne systems
using FPGAs},
booktitle = {2011 {NASA/ESA} Conference on Adaptive Hardware and Systems, {AHS}
2011, San Diego, California, USA, June 6-9, 2011},
pages = {121--128},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/AHS.2011.5963925},
doi = {10.1109/AHS.2011.5963925},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/ahs/VijayendraSCKT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ancs/UnnikrishnanLGT11,
author = {Deepak Unnikrishnan and
Shiting (Justin) Lu and
Lixin Gao and
Russell Tessier},
title = {ReClick - {A} Modular Dataplane Design Framework for FPGA-Based Network
Virtualization},
booktitle = {2011 {ACM/IEEE} Symposium on Architectures for Networking and Communications
Systems (ANCS), Brooklyn, NY, USA, October 3-4, 2011},
pages = {145--155},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ANCS.2011.31},
doi = {10.1109/ANCS.2011.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ancs/UnnikrishnanLGT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SeguinTKJ11,
author = {Emmanuel Seguin and
Russell Tessier and
Eric J. Knapp and
Robert W. Jackson},
title = {A Dynamically-Reconfigurable Phased Array Radar Processing System},
booktitle = {International Conference on Field Programmable Logic and Applications,
{FPL} 2011, September 5-7, Chania, Crete, Greece},
pages = {258--263},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/FPL.2011.52},
doi = {10.1109/FPL.2011.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SeguinTKJ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/CrenneCGTD11,
author = {J{\'{e}}r{\'{e}}mie Crenne and
Pascal Cotret and
Guy Gogniat and
Russell Tessier and
Jean{-}Philippe Diguet},
editor = {Russell Tessier},
title = {Efficient key-dependent message authentication in reconfigurable hardware},
booktitle = {2011 International Conference on Field-Programmable Technology, {FPT}
2011, New Delhi, India, December 12-14, 2011},
pages = {1--6},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/FPT.2011.6132722},
doi = {10.1109/FPT.2011.6132722},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/CrenneCGTD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vtc/BoveeNPT11,
author = {Ben Bovee and
Mohammad Nekoui and
Hossein Pishro{-}Nik and
Russell Tessier},
title = {Evaluation of the Universal Geocast Scheme for VANETs},
booktitle = {Proceedings of the 74th {IEEE} Vehicular Technology Conference, {VTC}
Fall 2011, 5-8 September 2011, San Francisco, CA, {USA}},
pages = {1--5},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/VETECF.2011.6092851},
doi = {10.1109/VETECF.2011.6092851},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/vtc/BoveeNPT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpt/2011,
editor = {Russell Tessier},
title = {2011 International Conference on Field-Programmable Technology, {FPT}
2011, New Delhi, India, December 12-14, 2011},
publisher = {{IEEE}},
year = {2011},
url = {https://ieeexplore.ieee.org/xpl/conhome/6126157/proceeding},
isbn = {978-1-4577-1741-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/2011.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/VadlamaniZBT10,
author = {Ramakrishna Vadlamani and
Jia Zhao and
Wayne P. Burleson and
Russell Tessier},
editor = {Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller and
Enrico Macii},
title = {Multicore soft error rate stabilization using adaptive dual modular
redundancy},
booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
March 8-12, 2010},
pages = {27--32},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DATE.2010.5457242},
doi = {10.1109/DATE.2010.5457242},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/VadlamaniZBT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ersa/TessierMP10,
author = {Russell Tessier and
Salma Mirza and
J. Blair Perot},
editor = {Toomas P. Plaks and
David Andrews and
Ronald F. DeMara and
Herman Lam and
Jooheung Lee and
Christian Plessl and
Greg Stitt},
title = {Reconfigurable Sparse Matrix-Vector Multiplication on FPGAs},
booktitle = {Proceedings of the 2010 International Conference on Engineering of
Reconfigurable Systems {\&} Algorithms, {ERSA} 2010, July 12-15,
2010, Las Vegas Nevada, {USA}},
pages = {77--83},
publisher = {{CSREA} Press},
year = {2010},
timestamp = {Wed, 14 Aug 2019 11:41:16 +0200},
biburl = {https://dblp.org/rec/conf/ersa/TessierMP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/UnnikrishnanVLDCGT10,
author = {Deepak Unnikrishnan and
Ramakrishna Vadlamani and
Yong Liao and
Abhishek Dwaraki and
J{\'{e}}r{\'{e}}mie Crenne and
Lixin Gao and
Russell Tessier},
editor = {Peter Y. K. Cheung and
John Wawrzynek},
title = {Scalable network virtualization using FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
February 21-23, 2010},
pages = {219--228},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1723112.1723150},
doi = {10.1145/1723112.1723150},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/UnnikrishnanVLDCGT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhaoDBT10,
author = {Jia Zhao and
Basab Datta and
Wayne P. Burleson and
Russell Tessier},
editor = {R. Iris Bahar and
Fabrizio Lombardi and
David Atienza and
Erik Brunvand},
title = {Thermal-aware voltage droop compensation for multi-core architectures},
booktitle = {Proceedings of the 20th {ACM} Great Lakes Symposium on {VLSI} 2009,
Providence, Rhode Island, USA, May 16-18 2010},
pages = {335--340},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1785481.1785558},
doi = {10.1145/1785481.1785558},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhaoDBT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sigcomm/YinUL0T10,
author = {Dong Yin and
Deepak Unnikrishnan and
Yong Liao and
Lixin Gao and
Russell Tessier},
editor = {C{\'{e}}dric Westphal and
Guru M. Parulkar and
Amin Vahdat},
title = {Customizing virtual networks with partial {FPGA} reconfiguration},
booktitle = {Proceedings of the Second {ACM} {SIGCOMM} Workshop on Virtualized
Infrastructure Systems and Architectures, {VISA} '10, New Delhi, India,
September 3, 2010},
pages = {57--64},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1851399.1851410},
doi = {10.1145/1851399.1851410},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sigcomm/YinUL0T10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fccm/2010,
editor = {Ron Sass and
Russell Tessier},
title = {18th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2010, Charlotte, North Carolina, USA, 2-4
May 2010},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://ieeexplore.ieee.org/xpl/conhome/5473908/proceeding},
isbn = {978-0-7695-4056-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fccm/2010.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/VaslinGDNTB09,
author = {Romain Vaslin and
Guy Gogniat and
Jean{-}Philippe Diguet and
Eduardo Braulio Wanderley Netto and
Russell Tessier and
Wayne P. Burleson},
title = {A security approach for off-chip memory in embedded microprocessor
systems},
journal = {Microprocess. Microsystems},
volume = {33},
number = {1},
pages = {37--45},
year = {2009},
url = {https://doi.org/10.1016/j.micpro.2008.08.008},
doi = {10.1016/J.MICPRO.2008.08.008},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/VaslinGDNTB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/XuT09,
author = {Weifeng Xu and
Russell Tessier},
title = {Tetris-XL: {A} performance-driven spill reduction technique for embedded
{VLIW} processors},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {6},
number = {3},
pages = {11:1--11:40},
year = {2009},
url = {https://doi.org/10.1145/1582710.1582713},
doi = {10.1145/1582710.1582713},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/XuT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MadduriVBT09,
author = {Sailaja Madduri and
Ramakrishna Vadlamani and
Wayne P. Burleson and
Russell Tessier},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {A monitor interconnect and support subsystem for multicore processors},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {761--766},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090766},
doi = {10.1109/DATE.2009.5090766},
timestamp = {Mon, 06 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MadduriVBT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/UnnikrishnanZT09,
author = {Deepak Unnikrishnan and
Jia Zhao and
Russell Tessier},
editor = {Kenneth L. Pocek and
Duncan A. Buell},
title = {Application Specific Customization and Scalability of Soft Multiprocessors},
booktitle = {{FCCM} 2009, 17th {IEEE} Symposium on Field Programmable Custom Computing
Machines, Napa, California, USA, 5-7 April 2009, Proceedings},
pages = {123--130},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/FCCM.2009.41},
doi = {10.1109/FCCM.2009.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/UnnikrishnanZT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChenTCTFDC09,
author = {Deming Chen and
Russell Tessier and
Kaustav Banerjee and
Mojy C. Chian and
Andr{\'{e}} DeHon and
Shinobu Fujita and
James Hutchby and
Steve Trimberger},
editor = {Paul Chow and
Peter Y. K. Cheung},
title = {{CMOS} vs Nano: comrades or rivals?},
booktitle = {Proceedings of the {ACM/SIGDA} 17th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2009, Monterey, California, USA,
February 22-24, 2009},
pages = {121--122},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1508128.1508147},
doi = {10.1145/1508128.1508147},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ChenTCTFDC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nss/WolfT09,
author = {Tilman Wolf and
Russell Tessier},
editor = {Yang Xiang and
Javier L{\'{o}}pez and
Haining Wang and
Wanlei Zhou},
title = {Design of a Secure Router System for Next-Generation Networks},
booktitle = {Third International Conference on Network and System Security, {NSS}
2009, Gold Coast, Queensland, Australia, October 19-21, 2009},
pages = {52--59},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/NSS.2009.70},
doi = {10.1109/NSS.2009.70},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nss/WolfT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AndrycTK09,
author = {Kevin Andryc and
Russell Tessier and
Patrick Kelly},
title = {An Interactive Approach to Timing Accurate {PCI-X} Simulation},
booktitle = {Proceedings of the Twentienth {IEEE/IFIP} International Symposium
on Rapid System Prototyping, Shortening the Path from Specification
to Prototype, {RSP} 2009, Paris, France, 23-26 June 2009},
pages = {181--187},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/RSP.2009.9},
doi = {10.1109/RSP.2009.9},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AndrycTK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/VaslinGDTUG08,
author = {Romain Vaslin and
Guy Gogniat and
Jean{-}Philippe Diguet and
Russell Tessier and
Deepak Unnikrishnan and
Kris Gaj},
editor = {Tarek A. El{-}Ghazawi and
Yao{-}Wen Chang and
Juinn{-}Dar Huang and
Proshanta Saha},
title = {Memory security management for reconfigurable embedded systems},
booktitle = {2008 International Conference on Field-Programmable Technology, {FPT}
2008, Taipei, Taiwan, December 7-10, 2008},
pages = {153--160},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPT.2008.4762378},
doi = {10.1109/FPT.2008.4762378},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpt/VaslinGDTUG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fteda/KuonTR07,
author = {Ian Kuon and
Russell Tessier and
Jonathan Rose},
title = {{FPGA} Architecture: Survey and Challenges},
journal = {Found. Trends Electron. Des. Autom.},
volume = {2},
number = {2},
pages = {135--253},
year = {2007},
url = {https://doi.org/10.1561/1000000005},
doi = {10.1561/1000000005},
timestamp = {Thu, 18 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/fteda/KuonTR07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TessierBNEG07,
author = {Russell Tessier and
Vaughn Betz and
David Neto and
Aaron Egier and
Thiagaraja Gopalsamy},
title = {Power-Efficient {RAM} Mapping Algorithms for {FPGA} Embedded Memory
Blocks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {26},
number = {2},
pages = {278--290},
year = {2007},
url = {https://doi.org/10.1109/TCAD.2006.887924},
doi = {10.1109/TCAD.2006.887924},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TessierBNEG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ersa/VaslinGDTB07,
author = {Romain Vaslin and
Guy Gogniat and
Jean{-}Philippe Diguet and
Russell Tessier and
Wayne P. Burleson},
editor = {Toomas P. Plaks},
title = {High-efficiency protection solution for off-chip memory in embedded
systems},
booktitle = {Proceedings of the 2007 International Conference on Engineering of
Reconfigurable Systems {\&} Algorithms, {ERSA} 2007, Las Vegas,
Nevada, USA, June 25-28, 2007},
pages = {117--123},
publisher = {{CSREA} Press},
year = {2007},
timestamp = {Mon, 06 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ersa/VaslinGDTB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/EisenbarthGPSWT07,
author = {Thomas Eisenbarth and
Tim G{\"{u}}neysu and
Christof Paar and
Ahmad{-}Reza Sadeghi and
Marko Wolf and
Russell Tessier},
editor = {Kenneth L. Pocek and
Duncan A. Buell},
title = {Establishing Chain of Trust in Reconfigurable Hardware},
booktitle = {{IEEE} Symposium on Field-Programmable Custom Computing Machines,
{FCCM} 2007, 23-25 April 2007, Napa, California, {USA}},
pages = {289--290},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/FCCM.2007.23},
doi = {10.1109/FCCM.2007.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/EisenbarthGPSWT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TinmaungHT07,
author = {Kevin Oo Tinmaung and
David Howland and
Russell Tessier},
editor = {Andr{\'{e}} DeHon and
Mike Hutton},
title = {Power-aware {FPGA} logic synthesis using binary decision diagrams},
booktitle = {Proceedings of the {ACM/SIGDA} 15th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2007, Monterey, California, USA,
February 18-20, 2007},
pages = {148--155},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1216919.1216945},
doi = {10.1145/1216919.1216945},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TinmaungHT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/XuT07,
author = {Weifeng Xu and
Russell Tessier},
editor = {Santosh Pande and
Zhiyuan Li},
title = {Tetris: a new register pressure control technique for {VLIW} processors},
booktitle = {Proceedings of the 2007 {ACM} {SIGPLAN/SIGBED} Conference on Languages,
Compilers, and Tools for Embedded Systems (LCTES'07), San Diego, California,
USA, June 13-15, 2007},
pages = {113--122},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1254766.1254783},
doi = {10.1145/1254766.1254783},
timestamp = {Sun, 02 Oct 2022 16:11:14 +0200},
biburl = {https://dblp.org/rec/conf/lctrts/XuT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/VaslinGNTB07,
author = {Romain Vaslin and
Guy Gogniat and
Eduardo Braulio Wanderley Netto and
Russell Tessier and
Wayne P. Burleson},
editor = {Gilles Sassatelli and
Manfred Glesner and
Christophe Bobda and
Pascal Benoit},
title = {Low latency Solution for Confidentiality and Integrity Checking in
Embedded Systems with Off-Chip Memory},
booktitle = {Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2007, Montpellier, France, June 2007},
pages = {146--153},
publisher = {Univ. Montpellier {II}},
year = {2007},
timestamp = {Wed, 02 Aug 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/VaslinGNTB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ejes/LeeserHT06,
author = {Miriam Leeser and
Scott Hauck and
Russell Tessier},
title = {Field-Programmable Gate Arrays in Embedded Systems},
journal = {{EURASIP} J. Embed. Syst.},
volume = {2006},
year = {2006},
url = {https://doi.org/10.1155/ES/2006/51312},
doi = {10.1155/ES/2006/51312},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ejes/LeeserHT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MenonXT06,
author = {Premachandran R. Menon and
Weifeng Xu and
Russell Tessier},
title = {Design-specific path delay testing in lookup-table-based FPGAs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {25},
number = {5},
pages = {867--877},
year = {2006},
url = {https://doi.org/10.1109/TCAD.2005.855955},
doi = {10.1109/TCAD.2005.855955},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MenonXT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/AtienoAGT06,
author = {Lilian Atieno and
Jonathan Allen and
Dennis Goeckel and
Russell Tessier},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {An adaptive Reed-Solomon errors-and-erasures decoder},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {150--158},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117224},
doi = {10.1145/1117201.1117224},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AtienoAGT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TessierBNG06,
author = {Russell Tessier and
Vaughn Betz and
David Neto and
Thiagaraja Gopalsamy},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {Power-aware {RAM} mapping for {FPGA} embedded memory blocks},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {189--198},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117229},
doi = {10.1145/1117201.1117229},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/TessierBNG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/TessierSRGB05,
author = {Russell Tessier and
Sriram Swaminathan and
Ramaswamy Ramaswamy and
Dennis Goeckel and
Wayne P. Burleson},
title = {A reconfigurable, power-efficient adaptive Viterbi decoder},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {13},
number = {4},
pages = {484--488},
year = {2005},
url = {https://doi.org/10.1109/TVLSI.2004.842930},
doi = {10.1109/TVLSI.2004.842930},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/TessierSRGB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/TessierJMNXB05,
author = {Russell Tessier and
David Jasinski and
Atul Maheshwari and
Aiyappan Natarajan and
Weifeng Xu and
Wayne P. Burleson},
title = {An energy-aware active smart card},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {13},
number = {10},
pages = {1190--1199},
year = {2005},
url = {https://doi.org/10.1109/TVLSI.2005.859471},
doi = {10.1109/TVLSI.2005.859471},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/TessierJMNXB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/igarss/JunyentCMFIABKKT05,
author = {Francesc Junyent and
Venkatachalam Chandrasekar and
David J. McLaughlin and
Stephen J. Frasier and
Edin Insanic and
Razi Ahmed and
Nitin Bharadwaj and
Eric J. Knapp and
Luko Krnan and
Russell Tessier},
title = {Salient features of radar nodes of the first generation NetRad System},
booktitle = {{IEEE} International Geoscience {\&} Remote Sensing Symposium,
{IGARSS} 2005, July 25-29, 2005, Seoul, Korea, Proceedings},
pages = {4},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/IGARSS.2005.1526198},
doi = {10.1109/IGARSS.2005.1526198},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/igarss/JunyentCMFIABKKT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/lgrs/FarquharsonJRFT04,
author = {Gordon Farquharson and
William N. Junek and
Arun Ramanathan and
Stephen J. Frasier and
Russell Tessier and
David J. McLaughlin and
Mark A. Sletten and
Jakov V. Toporkov},
title = {A pod-based dual-beam {SAR}},
journal = {{IEEE} Geosci. Remote. Sens. Lett.},
volume = {1},
number = {2},
pages = {62--65},
year = {2004},
url = {https://doi.org/10.1109/LGRS.2004.826553},
doi = {10.1109/LGRS.2004.826553},
timestamp = {Thu, 09 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/lgrs/FarquharsonJRFT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/MaheshwariBT04,
author = {Atul Maheshwari and
Wayne P. Burleson and
Russell Tessier},
title = {Trading off transient fault tolerance and power consumption in deep
submicron {(DSM)} {VLSI} circuits},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {12},
number = {3},
pages = {299--311},
year = {2004},
url = {https://doi.org/10.1109/TVLSI.2004.824302},
doi = {10.1109/TVLSI.2004.824302},
timestamp = {Fri, 10 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/MaheshwariBT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LiangLST04,
author = {Jian Liang and
Andrew Laffely and
Sriram Srinivasan and
Russell Tessier},
title = {An architecture and compiler for scalable on-chip communication},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {12},
number = {7},
pages = {711--726},
year = {2004},
url = {https://doi.org/10.1109/TVLSI.2004.830919},
doi = {10.1109/TVLSI.2004.830919},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/LiangLST04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/WoodsT04,
author = {Roger F. Woods and
Russell Tessier},
title = {Guest Editorial: Field Programmable Logic},
journal = {J. {VLSI} Signal Process.},
volume = {36},
number = {1},
pages = {5--6},
year = {2004},
url = {https://doi.org/10.1023/B:VLSI.0000008109.79717.12},
doi = {10.1023/B:VLSI.0000008109.79717.12},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/WoodsT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/JainLBTG04,
author = {Prashant Jain and
Andrew Laffely and
Wayne P. Burleson and
Russell Tessier and
Dennis Goeckel},
title = {Dynamically Parameterized Algorithms and Architectures to Exploit
Signal Variations},
journal = {J. {VLSI} Signal Process.},
volume = {36},
number = {1},
pages = {27--40},
year = {2004},
url = {https://doi.org/10.1023/B:VLSI.0000008068.26922.0b},
doi = {10.1023/B:VLSI.0000008068.26922.0B},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/JainLBTG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/LiangTG04,
author = {Jian Liang and
Russell Tessier and
Dennis Goeckel},
title = {A Dynamically-Reconfigurable, Power-Efficient Turbo Decoder},
booktitle = {12th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2004), 20-23 April 2004, Napa, CA, USA, Proceedings},
pages = {91--100},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/FCCM.2004.3},
doi = {10.1109/FCCM.2004.3},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/LiangTG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpga/2004,
editor = {Russell Tessier and
Herman Schmit},
title = {Proceedings of the {ACM/SIGDA} 12th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2004, Monterey, California, USA,
February 22-24, 2004},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/968280},
doi = {10.1145/968280},
isbn = {1-58113-829-6},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/2004.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KrishnamoorthyT03,
author = {Srini Krishnamoorthy and
Russell Tessier},
title = {Technology mapping algorithms for hybrid FPGAs containing lookup tables
and PLAs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {22},
number = {5},
pages = {545--559},
year = {2003},
url = {https://doi.org/10.1109/TCAD.2003.810743},
doi = {10.1109/TCAD.2003.810743},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KrishnamoorthyT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/XuRT03,
author = {Weifeng Xu and
Ramshankar Ramanarayanan and
Russell Tessier},
title = {Adaptive Fault Recovery for Networked Reconfigurable Systems},
booktitle = {11th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2003), 8-11 April 2003, Napa, CA, USA, Proceedings},
pages = {143},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/FPGA.2003.1227250},
doi = {10.1109/FPGA.2003.1227250},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/XuRT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/LiangTM03,
author = {Jian Liang and
Russell Tessier and
Oskar Mencer},
title = {Floating Point Unit Generation and Evaluation for FPGAs},
booktitle = {11th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2003), 8-11 April 2003, Napa, CA, USA, Proceedings},
pages = {185--194},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/FPGA.2003.1227254},
doi = {10.1109/FPGA.2003.1227254},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/LiangTM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NatarajanJBT03,
author = {Aiyappan Natarajan and
David Jasinski and
Wayne P. Burleson and
Russell Tessier},
editor = {Mircea R. Stan and
David Garrett and
Kazuo Nakajima},
title = {A hybrid adiabatic content addressable memory for ultra low-power
applications},
booktitle = {Proceedings of the 13th {ACM} Great Lakes Symposium on {VLSI} 2003,
Washington, DC, USA, April 28-29, 2003},
pages = {72--75},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/764808.764828},
doi = {10.1145/764808.764828},
timestamp = {Mon, 06 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NatarajanJBT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icip/LaffelyLTB03,
author = {Andrew Laffely and
Jian Liang and
Russell Tessier and
Wayne P. Burleson},
title = {Adaptive system on a chip {(ASOC):} a backbone for power-aware signal
processing cores},
booktitle = {Proceedings of the 2003 International Conference on Image Processing,
{ICIP} 2003, Barcelona, Catalonia, Spain, September 14-18, 2003},
pages = {105--108},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ICIP.2003.1247192},
doi = {10.1109/ICIP.2003.1247192},
timestamp = {Mon, 06 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icip/LaffelyLTB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/igarss/JunekRFFTMST03,
author = {William N. Junek and
Arun Ramanathan and
Gordon Farquharson and
Stephen J. Frasier and
Russell Tessier and
David J. McLaughlin and
Mark A. Sletten and
Jakov V. Toporkov},
title = {First observations with the UMass dual-beam InSAR},
booktitle = {2003 {IEEE} International Geoscience and Remote Sensing Symposium,
{IGARSS} 2003, Toulouse, France, July 21-15, 2003},
pages = {530--532},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/IGARSS.2003.1293832},
doi = {10.1109/IGARSS.2003.1293832},
timestamp = {Fri, 07 May 2021 10:04:02 +0200},
biburl = {https://dblp.org/rec/conf/igarss/JunekRFFTMST03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpga/2003,
editor = {Steve Trimberger and
Russell Tessier},
title = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817},
doi = {10.1145/611817},
isbn = {1-58113-651-X},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/2003.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KudlugiT02,
author = {Murali Kudlugi and
Russell Tessier},
title = {Static scheduling of multidomain circuits for fast functional verification},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {21},
number = {11},
pages = {1253--1268},
year = {2002},
url = {https://doi.org/10.1109/TCAD.2002.804086},
doi = {10.1109/TCAD.2002.804086},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KudlugiT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HarrisT02,
author = {Ian G. Harris and
Russell Tessier},
title = {Testing and diagnosis of interconnect faults in cluster-based {FPGA}
architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {21},
number = {11},
pages = {1337--1343},
year = {2002},
url = {https://doi.org/10.1109/TCAD.2002.804108},
doi = {10.1109/TCAD.2002.804108},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HarrisT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/Tessier02,
author = {Russell Tessier},
title = {Fast placement approaches for FPGAs},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {7},
number = {2},
pages = {284--305},
year = {2002},
url = {https://doi.org/10.1145/544536.544540},
doi = {10.1145/544536.544540},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/Tessier02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/VemuriKT02,
author = {Navin Vemuri and
Priyank Kalla and
Russell Tessier},
title = {BDD-based logic synthesis for LUT-based FPGAs},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {7},
number = {4},
pages = {501--525},
year = {2002},
url = {https://doi.org/10.1145/605440.605442},
doi = {10.1145/605440.605442},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/VemuriKT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/TessierJ02,
author = {Russell Tessier and
Snigdha Jana},
title = {Incremental compilation for parallel logic verification systems},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {10},
number = {5},
pages = {623--636},
year = {2002},
url = {https://doi.org/10.1109/TVLSI.2002.801614},
doi = {10.1109/TVLSI.2002.801614},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/TessierJ02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SwaminathanTGB02,
author = {Sriram Swaminathan and
Russell Tessier and
Dennis Goeckel and
Wayne P. Burleson},
editor = {Martine D. F. Schlag and
Steve Trimberger},
title = {A dynamically reconfigurable adaptive viterbi decoder},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2002, Monterey, CA, USA, February 24-26, 2002},
pages = {227--236},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/503048.503081},
doi = {10.1145/503048.503081},
timestamp = {Mon, 06 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/SwaminathanTGB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RamaswamyT02,
author = {Ramaswamy Ramaswamy and
Russell Tessier},
editor = {Manfred Glesner and
Peter Zipf and
Michel Renovell},
title = {The Integration of SystemC and Hardware-Assisted Verification},
booktitle = {Field-Programmable Logic and Applications, Reconfigurable Computing
Is Going Mainstream, 12th International Conference, {FPL} 2002, Montpellier,
France, September 2-4, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2438},
pages = {1007--1016},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-46117-5\_103},
doi = {10.1007/3-540-46117-5\_103},
timestamp = {Sat, 30 Sep 2023 09:41:27 +0200},
biburl = {https://dblp.org/rec/conf/fpl/RamaswamyT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/MaheshwariBT02,
author = {Atul Maheshwari and
Wayne P. Burleson and
Russell Tessier},
title = {Trading off Reliability and Power-Consumption in Ultra-low Power Systems},
booktitle = {3rd International Symposium on Quality of Electronic Design, {ISQED}
2002, San Jose, CA, USA, March 18-21, 2002},
pages = {361--366},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ISQED.2002.996773},
doi = {10.1109/ISQED.2002.996773},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/MaheshwariBT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/TessierB01,
author = {Russell Tessier and
Wayne P. Burleson},
title = {Reconfigurable Computing for Digital Signal Processing: {A} Survey},
journal = {J. {VLSI} Signal Process.},
volume = {28},
number = {1-2},
pages = {7--27},
year = {2001},
url = {https://doi.org/10.1023/A:1008155020711},
doi = {10.1023/A:1008155020711},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/TessierB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KudlugiST01,
author = {Murali Kudlugi and
Charles Selvidge and
Russell Tessier},
title = {Static Scheduling of Multiple Asynchronous Domains For Functional
Verification},
booktitle = {Proceedings of the 38th Design Automation Conference, {DAC} 2001,
Las Vegas, NV, USA, June 18-22, 2001},
pages = {647--652},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/378239.379040},
doi = {10.1145/378239.379040},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/KudlugiST01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/BurlesonTGSJEVT01,
author = {Wayne P. Burleson and
Russell Tessier and
Dennis Goeckel and
Sriram Swaminathan and
Prashant Jain and
Jeongseon Euh and
Subramanian Venkatraman and
Vidhya Thyagarajan},
title = {Dynamically parameterized algorithms and architectures to exploit
signal variations for improved performance and reduced power},
booktitle = {{IEEE} International Conference on Acoustics, Speech, and Signal Processing,
{ICASSP} 2001, 7-11 May, 2001, Salt Palace Convention Center, Salt
Lake City, Utah, USA, Proceedings},
pages = {901--904},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ICASSP.2001.941061},
doi = {10.1109/ICASSP.2001.941061},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icassp/BurlesonTGSJEVT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/KudlugiST01,
author = {Murali Kudlugi and
Charles Selvidge and
Russell Tessier},
editor = {Rolf Ernst},
title = {Static Scheduling of Multi-Domain Memories For Functional Verification},
booktitle = {Proceedings of the 2001 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 2001, San Jose, CA, USA, November 4-8, 2001},
pages = {2--9},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICCAD.2001.968590},
doi = {10.1109/ICCAD.2001.968590},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/KudlugiST01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/HarrisMT01,
author = {Ian G. Harris and
Premachandran R. Menon and
Russell Tessier},
title = {BIST-based delay path testing in {FPGA} architectures},
booktitle = {Proceedings {IEEE} International Test Conference 2001, Baltimore,
MD, USA, 30 October - 1 November 2001},
pages = {932--938},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/TEST.2001.966717},
doi = {10.1109/TEST.2001.966717},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/HarrisMT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpga/2001,
editor = {Scott Hauck and
Martine D. F. Schlag and
Russell Tessier},
title = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2001, Monterey, CA, USA, February 11-13, 2001},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/360276},
doi = {10.1145/360276},
isbn = {1-58113-341-3},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/2001.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/LiangST00,
author = {Jian Liang and
Sriram Swaminathan and
Russell Tessier},
title = {aSOC: {A} Scalable, Single-Chip Communications Architecture},
booktitle = {Proceedings of the 2000 International Conference on Parallel Architectures
and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania,
USA, October 15-19, 2000},
pages = {37--46},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/PACT.2000.888329},
doi = {10.1109/PACT.2000.888329},
timestamp = {Tue, 31 May 2022 13:36:12 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/LiangST00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HarrisT00,
author = {Ian G. Harris and
Russell Tessier},
editor = {Giovanni De Micheli},
title = {Interconnect testing in cluster-based {FPGA} architectures},
booktitle = {Proceedings of the 37th Conference on Design Automation, Los Angeles,
CA, USA, June 5-9, 2000},
pages = {49--54},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/337292.337310},
doi = {10.1145/337292.337310},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HarrisT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LakamrajuT00,
author = {Vijay Lakamraju and
Russell Tessier},
editor = {Steve Trimberger and
Scott Hauck},
title = {Tolerating operational faults in cluster-based FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
pages = {187--194},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/329166.329205},
doi = {10.1145/329166.329205},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LakamrajuT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KrishnamoorthyST00,
author = {Srini Krishnamoorthy and
Sriram Swaminathan and
Russell Tessier},
editor = {Reiner W. Hartenstein and
Herbert Gr{\"{u}}nbacher},
title = {Area-Optimized Technology Mapping for Hybrid FPGAs},
booktitle = {Field-Programmable Logic and Applications, The Roadmap to Reconfigurable
Computing, 10th International Workshop, {FPL} 2000, Villach, Austria,
August 27-30, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1896},
pages = {181--190},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44614-1\_21},
doi = {10.1007/3-540-44614-1\_21},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KrishnamoorthyST00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/TessierG00,
author = {Russell Tessier and
Heather Giza},
editor = {Reiner W. Hartenstein and
Herbert Gr{\"{u}}nbacher},
title = {Balancing Logic Utilization and Area Efficiency in FPGAs},
booktitle = {Field-Programmable Logic and Applications, The Roadmap to Reconfigurable
Computing, 10th International Workshop, {FPL} 2000, Villach, Austria,
August 27-30, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1896},
pages = {535--544},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44614-1\_58},
doi = {10.1007/3-540-44614-1\_58},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/TessierG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HarrisT00,
author = {Ian G. Harris and
Russell Tessier},
editor = {Ellen Sentovich},
title = {Diagnosis of Interconnect Faults in Cluster-Based {FPGA} Architectures},
booktitle = {Proceedings of the 2000 {IEEE/ACM} International Conference on Computer-Aided
Design, 2000, San Jose, California, USA, November 5-9, 2000},
pages = {472--475},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICCAD.2000.896517},
doi = {10.1109/ICCAD.2000.896517},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HarrisT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/ndltd/Tessier99,
author = {Russell Tessier},
title = {Fast place and route approaches for field-programmable gate arrays},
school = {Massachusetts Institute of Technology, Cambridge, MA, {USA}},
year = {1999},
url = {https://hdl.handle.net/1721.1/79976},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/ndltd/Tessier99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/Tessier99,
author = {Russell Tessier},
editor = {L. Miguel Silveira and
Srinivas Devadas and
Ricardo Augusto da Luz Reis},
title = {Frontier: {A} Fast Placement System for FPGAs},
booktitle = {{VLSI:} Systems on a Chip, {IFIP} {TC10/WG10.5} Tenth International
Conference on Very Large Scale Integration {(VLSI} '99), December
1-4, 1999, Lisbon, Portugal},
series = {{IFIP} Conference Proceedings},
volume = {162},
pages = {125--136},
publisher = {Kluwer},
year = {1999},
timestamp = {Mon, 14 Oct 2002 13:30:59 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/Tessier99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Tessier99,
author = {Russell Tessier},
title = {Incremental Compilation for Logic Emulation},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {236--241},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779059},
doi = {10.1109/IWRSP.1999.779059},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Tessier99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BabbTDHHA97,
author = {Jonathan Babb and
Russell Tessier and
Matthew Dahl and
Silvina Hanono and
David M. Hoki and
Anant Agarwal},
title = {Logic emulation with virtual wires},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {16},
number = {6},
pages = {609--626},
year = {1997},
url = {https://doi.org/10.1109/43.640619},
doi = {10.1109/43.640619},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BabbTDHHA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/WardADFHJLMMMNPPT93,
author = {Steve Ward and
Karim Abdalla and
Rajeev Dujari and
Michael Fetterman and
Frank Honor{\'{e}} and
Ricardo Jenez and
Philippe Laffont and
Kenneth Mackenzie and
Chris Metcalf and
Milan Minsky and
John Nguyen and
John Pezaris and
Gill A. Pratt and
Russell Tessier},
editor = {Yoichi Muraoka},
title = {The NuMesh: {A} Modular, Scalable Communications Substrate},
booktitle = {Proceedings of the 7th international conference on Supercomputing,
{ICS} 1993, Tokyo, Japan, July 20-22, 1993},
pages = {230--239},
publisher = {{ACM}},
year = {1993},
url = {https://doi.org/10.1145/165939.165973},
doi = {10.1145/165939.165973},
timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
biburl = {https://dblp.org/rec/conf/ics/WardADFHJLMMMNPPT93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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