BibTeX records: Tadayuki Taura

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@inproceedings{DBLP:conf/vlsic/KatoMHOSMFOYKOT20,
  author       = {Yuri Kato and
                  Yoshihisa Matoba and
                  Katsumi Honda and
                  Koji Ogawa and
                  Kan Shimizu and
                  Masataka Maehara and
                  Atsushi Fujiwara and
                  Aoi Odawara and
                  Chigusa Yamane and
                  Naohiko Kimizuka and
                  Jun Ogi and
                  Tadayuki Taura and
                  Ikuro Suzuki and
                  Yusuke Oike},
  title        = {High-Density and Large-Scale {MEA} System Featuring 236, 880 Electrodes
                  at 11.72{\(\mu\)}m Pitch for Neuronal Network Analysis},
  booktitle    = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
                  HI, USA, June 16-19, 2020},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/VLSICircuits18222.2020.9162947},
  doi          = {10.1109/VLSICIRCUITS18222.2020.9162947},
  timestamp    = {Mon, 24 Aug 2020 16:22:01 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/KatoMHOSMFOYKOT20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/MiuraSTTTOE19,
  author       = {Tsukasa Miura and
                  Masaki Sakakibara and
                  Hirotsugu Takahashi and
                  Tadayuki Taura and
                  Keiji Tatani and
                  Yusuke Oike and
                  Takayuki Ezaki},
  title        = {A 6.9 {\(\mu\)}m Pixel-Pitch 3D Stacked Global Shutter {CMOS} Image
                  Sensor with 3M Cu-Cu connections},
  booktitle    = {2019 International 3D Systems Integration Conference (3DIC), Sendai,
                  Japan, October 8-10, 2019},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/3DIC48104.2019.9058832},
  doi          = {10.1109/3DIC48104.2019.9058832},
  timestamp    = {Sun, 19 Apr 2020 18:46:53 +0200},
  biburl       = {https://dblp.org/rec/conf/3dic/MiuraSTTTOE19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SakakibaraOSTHK18,
  author       = {Masaki Sakakibara and
                  Koji Ogawa and
                  Shin Sakai and
                  Yasuhisa Tochigi and
                  Katsumi Honda and
                  Hidekazu Kikuchi and
                  Takuya Wada and
                  Yasunobu Kamikubo and
                  Tsukasa Miura and
                  Masahiko Nakamizo and
                  Naoki Jyo and
                  Ryo Hayashibara and
                  Shinya Miyata and
                  Satoshi Yamamoto and
                  Yoshiyuki Ota and
                  Hirotsugu Takahashi and
                  Tadayuki Taura and
                  Yusuke Oike and
                  Keiji Tatani and
                  Takayuki Ezaki and
                  Teruo Hirayama},
  title        = {A 6.9-{\(\mathrm{\mu}\)}m Pixel-Pitch Back-Illuminated Global Shutter
                  {CMOS} Image Sensor With Pixel-Parallel 14-Bit Subthreshold {ADC}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {53},
  number       = {11},
  pages        = {3017--3025},
  year         = {2018},
  url          = {https://doi.org/10.1109/JSSC.2018.2863947},
  doi          = {10.1109/JSSC.2018.2863947},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/SakakibaraOSTHK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SakakibaraOSTHK18,
  author       = {Masaki Sakakibara and
                  Koji Ogawa and
                  Shin Sakai and
                  Yasuhisa Tochigi and
                  Katsumi Honda and
                  Hidekazu Kikuchi and
                  Takuya Wada and
                  Yasunobu Kamikubo and
                  Tsukasa Miura and
                  Masahiko Nakamizo and
                  Naoki Jyo and
                  Ryo Hayashibara and
                  Yohei Furukawa and
                  Shinya Miyata and
                  Satoshi Yamamoto and
                  Yoshiyuki Ota and
                  Hirotsugu Takahashi and
                  Tadayuki Taura and
                  Yusuke Oike and
                  Keiji Tatani and
                  Takashi Nagano and
                  Takayuki Ezaki and
                  Teruo Hirayama},
  title        = {A back-illuminated global-shutter {CMOS} image sensor with pixel-parallel
                  14b subthreshold {ADC}},
  booktitle    = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2018, San Francisco, CA, USA, February 11-15, 2018},
  pages        = {80--82},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ISSCC.2018.8310193},
  doi          = {10.1109/ISSCC.2018.8310193},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SakakibaraOSTHK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SakakibaraOTKHTMOAFAEYNKYEH12,
  author       = {Masaki Sakakibara and
                  Yusuke Oike and
                  Takafumi Takatsuka and
                  Akihiko Kato and
                  Katsumi Honda and
                  Tadayuki Taura and
                  Takashi Machida and
                  Jun Okuno and
                  Atsuhiro Ando and
                  Taketo Fukuro and
                  Tomohiko Asatsuma and
                  Suzunori Endo and
                  Junpei Yamamoto and
                  Yasuhiro Nakano and
                  Takumi Kaneshige and
                  Ikuhiro Yamamura and
                  Takayuki Ezaki and
                  Teruo Hirayama},
  title        = {An 83dB-dynamic-range single-exposure global-shutter {CMOS} image
                  sensor with in-pixel dual storage},
  booktitle    = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2012, San Francisco, CA, USA, February 19-23, 2012},
  pages        = {380--382},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISSCC.2012.6177058},
  doi          = {10.1109/ISSCC.2012.6177058},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SakakibaraOTKHTMOAFAEYNKYEH12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/NittaMATYMSTKKY06,
  author       = {Yoshikazu Nitta and
                  Yoshinori Muramatsu and
                  Kiyotaka Amano and
                  Takayuki Toyama and
                  Jun Yamamoto and
                  Koji Mishina and
                  Atsushi Suzuki and
                  Tadayuki Taura and
                  Akihiko Kato and
                  Masaru Kikuchi and
                  Yukihiro Yasui and
                  Hideo Nomura and
                  Noriyuki Fukushima},
  title        = {High-Speed Digital Double Sampling with Analog {CDS} on Column Parallel
                  {ADC} Architecture for Low-Noise Active Pixel Sensor},
  booktitle    = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
                  2006, Digest of Technical Papers, an Francisco, CA, USA, February
                  6-9, 2006},
  pages        = {2024--2031},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISSCC.2006.1696261},
  doi          = {10.1109/ISSCC.2006.1696261},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/NittaMATYMSTKKY06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TanzawaUTSHTMTW02,
  author       = {Toru Tanzawa and
                  Akira Umezawa and
                  Tadayuki Taura and
                  Hitoshi Shiga and
                  Tokumasa Hara and
                  Yoshinori Takano and
                  Takeshi Miyaba and
                  Naoya Tokiwa and
                  Kentaro Watanabe and
                  Hiroshi Watanabe and
                  Kazunori Masuda and
                  Kiyomi Naruke and
                  Hideo Kato and
                  Shigeru Atsumi},
  title        = {A 44-mm\({}^{\mbox{2}}\) four-bank eight-word page-read 64-Mb flash
                  memory with flexible block redundancy and fast accurate word-line
                  voltage controller},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {37},
  number       = {11},
  pages        = {1485--1492},
  year         = {2002},
  url          = {https://doi.org/10.1109/JSSC.2002.802356},
  doi          = {10.1109/JSSC.2002.802356},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/TanzawaUTSHTMTW02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TanzawaUKTBMSTA01,
  author       = {Toru Tanzawa and
                  Akira Umezawa and
                  Masao Kuriyama and
                  Tadayuki Taura and
                  Hironori Banba and
                  Takeshi Miyaba and
                  Hitoshi Shiga and
                  Yoshinori Takano and
                  Shigeru Atsumi},
  title        = {Wordline voltage generating system for low-power low-voltage flash
                  memories},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {36},
  number       = {1},
  pages        = {55--63},
  year         = {2001},
  url          = {https://doi.org/10.1109/4.896229},
  doi          = {10.1109/4.896229},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/TanzawaUKTBMSTA01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TanzawaTTA00,
  author       = {Toru Tanzawa and
                  Yoshinori Takano and
                  Tadayuki Taura and
                  Shigeru Atsumi},
  title        = {Design of a sense circuit for low-voltage flash memories},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {35},
  number       = {10},
  pages        = {1415--1421},
  year         = {2000},
  url          = {https://doi.org/10.1109/4.871317},
  doi          = {10.1109/4.871317},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/TanzawaTTA00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/AtsumiUTTSTMMWI00,
  author       = {Shigeru Atsumi and
                  Akira Umezawa and
                  Tooru Tanzawa and
                  Tadayuki Taura and
                  Hitoshi Shiga and
                  Yoshinori Takano and
                  Takeshi Miyaba and
                  Michiharu Matsui and
                  Hiroshi Watanabe and
                  Kazuaki Isobe and
                  Shota Kitamura and
                  Seiji Yamada and
                  Masanobu Saito and
                  Seiichi Mori and
                  Toshiharu Watanabe},
  title        = {A channel-erasing 1.8-V-only 32-Mb {NOR} flash {EEPROM} with a bitline
                  direct sensing scheme},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {35},
  number       = {11},
  pages        = {1648--1654},
  year         = {2000},
  url          = {https://doi.org/10.1109/4.881211},
  doi          = {10.1109/4.881211},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/AtsumiUTTSTMMWI00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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