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ORCIDBibTeX records: Konstantinos Tatas
@inproceedings{DBLP:conf/mocast/SamarasTL23,
author = {V. Samaras and
Konstantinos Tatas and
Antonios Lontos},
title = {A Low-Cost Real-Time Cyber Physical System for Overcoming Excess Braking
Issues In Race Cars},
booktitle = {12th International Conference on Modern Circuits and Systems Technologies,
{MOCAST} 2023, Athens, Greece, June 28-30, 2023},
pages = {1--4},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/MOCAST57943.2023.10176943},
doi = {10.1109/MOCAST57943.2023.10176943},
timestamp = {Fri, 04 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mocast/SamarasTL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mocast/Tatas21,
author = {Konstantinos Tatas},
title = {Towards an Analytical Model of Latency in Deflection Routing: {A}
Stochastic Process Approach for Bufferless NoCs},
booktitle = {10th International Conference on Modern Circuits and Systems Technologies,
{MOCAST} 2021, Thessaloniki, Greece, July 5-7, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/MOCAST52088.2021.9493370},
doi = {10.1109/MOCAST52088.2021.9493370},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mocast/Tatas21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mocast/TatasAAZ21,
author = {Konstantinos Tatas and
Ahmad Al{-}Zoubi and
A. Antoniou and
D. Zolotareva},
title = {iPONICS: IoT Monitoring and Control for Hydroponics},
booktitle = {10th International Conference on Modern Circuits and Systems Technologies,
{MOCAST} 2021, Thessaloniki, Greece, July 5-7, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/MOCAST52088.2021.9493387},
doi = {10.1109/MOCAST52088.2021.9493387},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mocast/TatasAAZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jifs/Al-ZoubiTK20,
author = {Ahmad Al{-}Zoubi and
Konstantinos Tatas and
Costas Kyriacou},
title = {Fuzzy classification of OpenCL programs targeting heterogeneous systems},
journal = {J. Intell. Fuzzy Syst.},
volume = {39},
number = {5},
pages = {7189--7202},
year = {2020},
url = {https://doi.org/10.3233/JIFS-200616},
doi = {10.3233/JIFS-200616},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jifs/Al-ZoubiTK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cloudcom/Al-ZoubiTK18,
author = {Ahmad Al{-}Zoubi and
Konstantinos Tatas and
Costas Kyriacou},
title = {Towards Dynamic Multi-task Schedulling of OpenCL Programs on Emerging
{CPU-GPU-FPGA} Heterogeneous Platforms: {A} Fuzzy Logic Approach},
booktitle = {2018 {IEEE} International Conference on Cloud Computing Technology
and Science, CloudCom 2018, Nicosia, Cyprus, December 10-13, 2018},
pages = {247--250},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/CloudCom2018.2018.00055},
doi = {10.1109/CLOUDCOM2018.2018.00055},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cloudcom/Al-ZoubiTK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mocast/Al-ZoubiTK18,
author = {Ahmad Al{-}Zoubi and
Konstantinos Tatas and
Costas Kyriacou},
title = {Design space exploration of the {KNN} imputation on {FPGA}},
booktitle = {7th International Conference on Modern Circuits and Systems Technologies,
{MOCAST} 2018, Thessaloniki, Greece, May 7-9, 2018},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/MOCAST.2018.8376606},
doi = {10.1109/MOCAST.2018.8376606},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mocast/Al-ZoubiTK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mocast/Tatas18,
author = {Konstantinos Tatas},
title = {High-performance 3D NoC bufferless router with approximate priority
comparison},
booktitle = {7th International Conference on Modern Circuits and Systems Technologies,
{MOCAST} 2018, Thessaloniki, Greece, May 7-9, 2018},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/MOCAST.2018.8376617},
doi = {10.1109/MOCAST.2018.8376617},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mocast/Tatas18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/TatasC17,
author = {Konstantinos Tatas and
Chrysostomos Chrysostomou},
title = {Hardware implementation of dynamic fuzzy logic based routing in Network-on-Chip},
journal = {Microprocess. Microsystems},
volume = {52},
pages = {80--88},
year = {2017},
url = {https://doi.org/10.1016/j.micpro.2017.05.008},
doi = {10.1016/J.MICPRO.2017.05.008},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/TatasC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/TatasSK17,
author = {Konstantinos Tatas and
Savvas Sava and
Costas Kyriacou},
title = {3DBUFFBLESS: {A} novel buffered-bufferless hybrid router for 3D Networks-on-Chip},
booktitle = {27th International Symposium on Power and Timing Modeling, Optimization
and Simulation, {PATMOS} 2017, Thessaloniki, Greece, September 25-27,
2017},
pages = {1--8},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/PATMOS.2017.8106980},
doi = {10.1109/PATMOS.2017.8106980},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/TatasSK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/TatasC16,
author = {Konstantinos Tatas and
Chrysostomos Chrysostomou},
editor = {Paris Kitsos},
title = {Adaptive Networks-on-Chip Routing with Fuzzy Logic Control},
booktitle = {2016 Euromicro Conference on Digital System Design, {DSD} 2016, Limassol,
Cyprus, August 31 - September 2, 2016},
pages = {138--145},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/DSD.2016.69},
doi = {10.1109/DSD.2016.69},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/TatasC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/TatasSK14,
author = {Konstantinos Tatas and
S. Sawa and
Costas Kyriacou},
title = {Low-cost fault-tolerant routing for regular topology NoCs},
booktitle = {21st {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2014, Marseille, France, December 7-10, 2014},
pages = {566--569},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ICECS.2014.7050048},
doi = {10.1109/ICECS.2014.7050048},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/TatasSK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijaras/TatasSBKS13,
author = {Konstantinos Tatas and
Kostas Siozios and
Alexandros Bartzas and
Costas Kyriacou and
Dimitrios Soudris},
title = {A Novel Prototyping and Evaluation Framework for NoC-Based MPSoC},
journal = {Int. J. Adapt. Resilient Auton. Syst.},
volume = {4},
number = {3},
pages = {1--24},
year = {2013},
url = {https://doi.org/10.4018/jaras.2013070101},
doi = {10.4018/JARAS.2013070101},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijaras/TatasSBKS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/bcfic/TatasC12,
author = {Konstantinos Tatas and
Chrysostomos Chrysostomou},
title = {A novel fuzzy logic based bufferless routing algorithm for low-power
NoCs},
booktitle = {2nd Baltic Congress on Future Internet Communications, {BCFIC} 2012,
Vilnius, Lithuania, April 25-27, 2012},
pages = {106--112},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/BCFIC.2012.6217988},
doi = {10.1109/BCFIC.2012.6217988},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/bcfic/TatasC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cse/ChrysostomouTR12,
author = {Chrysostomos Chrysostomou and
Konstantinos Tatas and
A. R. Runcan},
title = {A Dynamic Fuzzy Logic Based Routing Scheme for Bufferless NoCs},
booktitle = {15th {IEEE} International Conference on Computational Science and
Engineering, {CSE} 2012, Paphos, Cyprus, December 5-7, 2012},
pages = {295--302},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ICCSE.2012.48},
doi = {10.1109/ICCSE.2012.48},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cse/ChrysostomouTR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ppl/TatasKETW08,
author = {Konstantinos Tatas and
Costas Kyriacou and
Paraskevas Evripidou and
Pedro Trancoso and
Stephan Wong},
title = {Rapid Prototyping of the Data-Driven Chip-Multiprocessor (d\({}^{\mbox{2}}\)-CMP)
Using FPGAs},
journal = {Parallel Process. Lett.},
volume = {18},
number = {2},
pages = {291--306},
year = {2008},
url = {https://doi.org/10.1142/S0129626408003399},
doi = {10.1142/S0129626408003399},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ppl/TatasKETW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/TatasKST07,
author = {Konstantinos Tatas and
George Koutroumpezis and
Dimitrios Soudris and
Adonios Thanailakis},
title = {Architecture design of a coarse-grain reconfigurable multiply-accumulate
unit for data-intensive applications},
journal = {Integr.},
volume = {40},
number = {2},
pages = {74--93},
year = {2007},
url = {https://doi.org/10.1016/j.vlsi.2006.02.011},
doi = {10.1016/J.VLSI.2006.02.011},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/TatasKST07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/KroupisZDTAST06,
author = {Nikolas Kroupis and
Nikolaos D. Zervas and
Minas Dasygenis and
Konstantinos Tatas and
Antonios Argyriou and
Dimitrios Soudris and
Antonios Thanailakis},
title = {Behavioral-Level Performance and Power Exploration of Data-Intensive
Applications Mapped on Programmable Processors},
journal = {J. {VLSI} Signal Process.},
volume = {44},
number = {1-2},
pages = {153--171},
year = {2006},
url = {https://doi.org/10.1007/s11265-006-7513-6},
doi = {10.1007/S11265-006-7513-6},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/KroupisZDTAST06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SioziosTST06,
author = {Kostas Siozios and
Konstantinos Tatas and
Dimitrios Soudris and
Antonios Thanailakis},
editor = {Steven J. E. Wilton and
Andr{\'{e}} DeHon},
title = {A novel methodology for designing high-performance and low-energy
{FPGA} routing architecture},
booktitle = {Proceedings of the {ACM/SIGDA} 14th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2006, Monterey, California, USA,
February 22-24, 2006},
pages = {224},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1117201.1117236},
doi = {10.1145/1117201.1117236},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SioziosTST06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/SioziosTST06,
author = {Kostas Siozios and
Konstantinos Tatas and
Dimitrios Soudris and
Adonios Thanailakis},
title = {Platform-based {FPGA} architecture: designing high-performance and
low-power routing structure for realizing {DSP} applications},
booktitle = {20th International Parallel and Distributed Processing Symposium {(IPDPS}
2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/IPDPS.2006.1639462},
doi = {10.1109/IPDPS.2006.1639462},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/SioziosTST06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/SioziosKTVKPPSTNS05,
author = {Kostas Siozios and
George Koutroumpezis and
Konstantinos Tatas and
Nikolaos Vassiliadis and
Vasilios Kalenteridis and
Haroula Pournara and
Ilias Pappas and
Dimitrios Soudris and
Antonios Thanailakis and
Spiridon Nikolaidis and
Stilianos Siskos},
title = {A Novel {FPGA} Architecture and an Integrated Framework of {CAD} Tools
for Implementing Applications},
journal = {{IEICE} Trans. Inf. Syst.},
volume = {88-D},
number = {7},
pages = {1369--1380},
year = {2005},
url = {https://doi.org/10.1093/ietisy/e88-d.7.1369},
doi = {10.1093/IETISY/E88-D.7.1369},
timestamp = {Tue, 04 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/SioziosKTVKPPSTNS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/TatasSST05,
author = {Konstantinos Tatas and
Dimitrios Soudris and
D. Siomos and
Adonios Thanailakis},
title = {A Novel Division Algorithm and Architectures for Parallel and Sequential
Processing},
journal = {J. Circuits Syst. Comput.},
volume = {14},
number = {2},
pages = {281--296},
year = {2005},
url = {https://doi.org/10.1142/S0218126605002295},
doi = {10.1142/S0218126605002295},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsc/TatasSST05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jec/TatasST05,
author = {Konstantinos Tatas and
Dimitrios Soudris and
Adonios Thanailakis},
title = {Memory power optimization of hardware implementations of multimedia
applications onto {FPGA} platforms},
journal = {J. Embed. Comput.},
volume = {1},
number = {3},
pages = {353--362},
year = {2005},
url = {http://content.iospress.com/articles/journal-of-embedded-computing/jec00038},
timestamp = {Fri, 07 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jec/TatasST05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/KalenteridisPSTVPKNSS05,
author = {Vasilios Kalenteridis and
Haroula Pournara and
Kostas Siozios and
Konstantinos Tatas and
Nikolaos Vassiliadis and
Ilias Pappas and
George Koutroumpezis and
Spiridon Nikolaidis and
Stilianos Siskos and
D. J. Soudris},
title = {A complete platform and toolset for system implementation on fine-grain
reconfigurable hardware},
journal = {Microprocess. Microsystems},
volume = {29},
number = {6},
pages = {247--259},
year = {2005},
url = {https://doi.org/10.1016/j.micpro.2004.09.001},
doi = {10.1016/J.MICPRO.2004.09.001},
timestamp = {Tue, 04 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/KalenteridisPSTVPKNSS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SoudrisNSTSKVKPPT05,
author = {Dimitrios Soudris and
Spiridon Nikolaidis and
Stilianos Siskos and
Konstantinos Tatas and
Kostas Siozios and
George Koutroumpezis and
Nikolaos Vassiliadis and
Vasilios Kalenteridis and
Haroula Pournara and
Ilias Pappas and
Adonios Thanailakis},
editor = {Tingao Tang},
title = {{AMDREL:} a novel low-energy {FPGA} architecture and supporting {CAD}
tool design flow},
booktitle = {Proceedings of the 2005 Conference on Asia South Pacific Design Automation,
{ASP-DAC} 2005, Shanghai, China, January 18-21, 2005},
pages = {3--4},
publisher = {{ACM} Press},
year = {2005},
url = {https://doi.org/10.1145/1120725.1120887},
doi = {10.1145/1120725.1120887},
timestamp = {Tue, 04 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SoudrisNSTSKVKPPT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SioziosTKST05,
author = {Kostas Siozios and
Konstantinos Tatas and
George Koutroumpezis and
D. J. Soudris and
Adonios Thanailakis},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {An Integrated Framework for Architecture Level Exploration of Reconfigurable
Platform},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {658--661},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515807},
doi = {10.1109/FPL.2005.1515807},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SioziosTKST05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/SioziosKTST05,
author = {Kostas Siozios and
George Koutroumpezis and
Konstantinos Tatas and
Dimitrios Soudris and
Adonios Thanailakis},
title = {{DAGGER:} {A} Novel Generic Methodology for {FPGA} Bitstream Generation
and Its Software Tool Implementation},
booktitle = {19th International Parallel and Distributed Processing Symposium {(IPDPS}
2005), {CD-ROM} / Abstracts Proceedings, 4-8 April 2005, Denver, CO,
{USA}},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/IPDPS.2005.158},
doi = {10.1109/IPDPS.2005.158},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/SioziosKTST05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SioziosKTST04,
author = {Kostas Siozios and
George Koutroumpezis and
Konstantinos Tatas and
Dimitrios Soudris and
Adonios Thanailakis},
editor = {J{\"{u}}rgen Becker and
Marco Platzner and
Serge Vernalde},
title = {A Novel {FPGA} Configuration Bitstream Generation Algorithm and Tool
Development},
booktitle = {Field Programmable Logic and Application, 14th International Conference
, {FPL} 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3203},
pages = {1116--1118},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30117-2\_142},
doi = {10.1007/978-3-540-30117-2\_142},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SioziosKTST04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/KalenteridisPSTKPNSST04,
author = {Vasilios Kalenteridis and
Haroula Pournara and
Kostas Siozios and
Konstantinos Tatas and
George Koutroumpezis and
Ilias Pappas and
Spiridon Nikolaidis and
Stilianos Siskos and
D. J. Soudris and
Adonios Thanailakis},
title = {An Integrated {FPGA} Design Framework: Custom Designed {FPGA} Platform
and Application Mapping Toolset Development},
booktitle = {18th International Parallel and Distributed Processing Symposium {(IPDPS}
2004), {CD-ROM} / Abstracts Proceedings, 26-30 April 2004, Santa Fe,
New Mexico, {USA}},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/IPDPS.2004.1303112},
doi = {10.1109/IPDPS.2004.1303112},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/KalenteridisPSTKPNSST04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TheochariTSMPBT04,
author = {Evaggelia Theochari and
Konstantinos Tatas and
Dimitrios Soudris and
Kostas Masselos and
Konstantinos Potamianos and
Spyros Blionas and
Antonios Thanailakis},
title = {A reusable {IP} {FFT} core for {DSP} applications},
booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems,
{ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
pages = {621--624},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/ISCAS.2004.1328823},
doi = {10.1109/ISCAS.2004.1328823},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TheochariTSMPBT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/rti/TatasDKAST03,
author = {Konstantinos Tatas and
Minas Dasygenis and
Nikolas Kroupis and
Antonios Argyriou and
Dimitrios Soudris and
Antonios Thanailakis},
title = {Data memory power optimization and performance exploration of embedded
systems for implementing motion estimation algorithms},
journal = {Real Time Imaging},
volume = {9},
number = {6},
pages = {371--386},
year = {2003},
url = {https://doi.org/10.1016/j.rti.2003.09.006},
doi = {10.1016/J.RTI.2003.09.006},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/rti/TatasDKAST03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/TatasSST03,
author = {Konstantinos Tatas and
Kostas Siozios and
Dimitrios Soudris and
Adonios Thanailakis},
editor = {Peter Y. K. Cheung and
George A. Constantinides and
Jos{\'{e}} T. de Sousa},
title = {Power-Efficient Implementations of Multimedia Applications on Reconfigurable
Platforms},
booktitle = {Field Programmable Logic and Application, 13th International Conference,
{FPL} 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2778},
pages = {1032--1035},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-45234-8\_113},
doi = {10.1007/978-3-540-45234-8\_113},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/TatasSST03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SoudrisSTPT03,
author = {Dimitrios Soudris and
K. Sgouropoulos and
Konstantinos Tatas and
Vasilis F. Pavlidis and
Adonios Thanailakis},
title = {A methodology for implementing {FIR} filters and {CAD} tool development
for designing RNS-based systems},
booktitle = {Proceedings of the 2003 International Symposium on Circuits and Systems,
{ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
pages = {129--132},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ISCAS.2003.1206208},
doi = {10.1109/ISCAS.2003.1206208},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SoudrisSTPT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/TatasSSTMPB03,
author = {Konstantinos Tatas and
Kostas Siozios and
Dimitrios Soudris and
Adonios Thanailakis and
Kostas Masselos and
Konstantinos Potamianos and
Spyros Blionas},
editor = {Jorge Juan{-}Chico and
Enrico Macii},
title = {Power Optimization Methdology for Multimedia Applications Implementation
on Reconfigurable Platforms},
booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
and Simulation, 13th International Workshop, {PATMOS} 2003, Torino,
Italy, September 10-12, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2799},
pages = {430--439},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-39762-5\_49},
doi = {10.1007/978-3-540-39762-5\_49},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/TatasSSTMPB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/TatasSVSNST03,
author = {Konstantinos Tatas and
Kostas Siozios and
Nikolaos Vassiliadis and
D. J. Soudris and
Spiridon Nikolaidis and
Stilianos Siskos and
Adonios Thanailakis},
editor = {Jorge Juan{-}Chico and
Enrico Macii},
title = {{FPGA} Architecture Design and Toolset for Logic Implementation},
booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
and Simulation, 13th International Workshop, {PATMOS} 2003, Torino,
Italy, September 10-12, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2799},
pages = {607--616},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-39762-5\_67},
doi = {10.1007/978-3-540-39762-5\_67},
timestamp = {Tue, 04 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/TatasSVSNST03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KoutroumpezisTSBMT02,
author = {George Koutroumpezis and
Konstantinos Tatas and
Dimitrios Soudris and
Spyros Blionas and
Kostas Masselos and
Adonios Thanailakis},
editor = {Manfred Glesner and
Peter Zipf and
Michel Renovell},
title = {Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain
Implementations},
booktitle = {Field-Programmable Logic and Applications, Reconfigurable Computing
Is Going Mainstream, 12th International Conference, {FPL} 2002, Montpellier,
France, September 2-4, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2438},
pages = {1027--1036},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-46117-5\_105},
doi = {10.1007/3-540-46117-5\_105},
timestamp = {Sat, 30 Sep 2023 09:41:27 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KoutroumpezisTSBMT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/TatasSSDT02,
author = {Konstantinos Tatas and
D. J. Soudris and
D. Siomos and
Minas Dasygenis and
Adonios Thanailakis},
title = {A novel division algorithm for parallel and sequential processing},
booktitle = {Proceedings of the 2002 9th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2002, Dubrovnik, Croatia, September
15-18, 2002},
pages = {553--556},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/ICECS.2002.1046225},
doi = {10.1109/ICECS.2002.1046225},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/TatasSSDT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/SoudrisDMTT02,
author = {Dimitrios Soudris and
Minas Dasygenis and
K. Mitroglou and
Konstantinos Tatas and
Adonios Thanailakis},
title = {A full adder based methodology for scaling operation in residue number
system},
booktitle = {Proceedings of the 2002 9th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2002, Dubrovnik, Croatia, September
15-18, 2002},
pages = {891--894},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/ICECS.2002.1046391},
doi = {10.1109/ICECS.2002.1046391},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/SoudrisDMTT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/DasigenisKATSZ01,
author = {Minas Dasygenis and
Nikolas Kroupis and
Antonios Argyriou and
Konstantinos Tatas and
Dimitrios Soudris and
Nikolaos D. Zervas},
title = {Data and instruction memory exploration of embedded systems for multimedia
applications},
booktitle = {{IEEE} International Conference on Acoustics, Speech, and Signal Processing,
{ICASSP} 2001, 7-11 May, 2001, Salt Palace Convention Center, Salt
Lake City, Utah, USA, Proceedings},
pages = {1149--1152},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ICASSP.2001.941125},
doi = {10.1109/ICASSP.2001.941125},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icassp/DasigenisKATSZ01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icip/KroupisDATSTZG01,
author = {Nikolas Kroupis and
Minas Dasygenis and
Antonios Argyriou and
Konstantinos Tatas and
Dimitrios Soudris and
Antonios Thanailakis and
Nikolaos D. Zervas and
Constantinos E. Goutis},
title = {Power, performance and area exploration of block matching algorithms
mapped on programmable processors},
booktitle = {Proceedings of the 2001 International Conference on Image Processing,
{ICIP} 2001, Thessaloniki, Greece, October 7-10, 2001},
pages = {728--731},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ICIP.2001.958222},
doi = {10.1109/ICIP.2001.958222},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icip/KroupisDATSTZG01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/TatasADSZ01,
author = {Konstantinos Tatas and
Antonios Argyriou and
Minas Dasygenis and
Dimitrios Soudris and
Nikolaos D. Zervas},
title = {Memory Hierarchy Optimization of Multimedia Applications on Programmable
Embedded Cores 1},
booktitle = {2nd International Symposium on Quality of Electronic Design {(ISQED}
2001), 26-28 March 2001, San Jose, CA, {USA}},
pages = {456--461},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ISQED.2001.915271},
doi = {10.1109/ISQED.2001.915271},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/TatasADSZ01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/SoudrisZADTGT00,
author = {Dimitrios Soudris and
Nikolaos D. Zervas and
Antonios Argyriou and
Minas Dasygenis and
Konstantinos Tatas and
Constantinos E. Goutis and
Adonios Thanailakis},
editor = {Dimitrios Soudris and
Peter Pirsch and
Erich Barke},
title = {Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time
Multimedia Applications},
booktitle = {Integrated Circuit Design, Power and Timing Modeling, Optimization
and Simulation, 10th International Workshop, {PATMOS} 2000, G{\"{o}}ttingen,
Germany, September 13-15, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1918},
pages = {243--254},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-45373-3\_26},
doi = {10.1007/3-540-45373-3\_26},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/SoudrisZADTGT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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