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BibTeX records: Stephen A. Szygenda
@inproceedings{DBLP:conf/ismvl/ThorntonMSN14, author = {Mitchell A. Thornton and Theodore W. Manikas and Stephen A. Szygenda and Shinobu Nagayama}, title = {System Probability Distribution Modeling Using MDDs}, booktitle = {{IEEE} 44th International Symposium on Multiple-Valued Logic, {ISMVL} 2014, Bremen, Germany, May 19-21, 2014}, pages = {196--201}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ISMVL.2014.42}, doi = {10.1109/ISMVL.2014.42}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/ThorntonMSN14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijbis/LawlerHST08, author = {Chad M. Lawler and Michael A. Harper and Stephen A. Szygenda and Mitchell A. Thornton}, title = {Components of disaster-tolerant computing: analysis of disaster recovery, {IT} application downtime and executive visibility}, journal = {Int. J. Bus. Inf. Syst.}, volume = {3}, number = {3}, pages = {317--331}, year = {2008}, url = {https://doi.org/10.1504/IJBIS.2008.017288}, doi = {10.1504/IJBIS.2008.017288}, timestamp = {Sat, 25 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijbis/LawlerHST08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/sj/IbarraSS08, author = {Gerard Ibarra and Jerrell T. Stracener and Stephen A. Szygenda}, title = {A Systems Engineering Approach for Identifying the Most Critical Links of a Highway System: {A} Framework Consisting of a Methodology and Mathematical Model}, journal = {{IEEE} Syst. J.}, volume = {2}, number = {2}, pages = {198--208}, year = {2008}, url = {https://doi.org/10.1109/JSYST.2008.924128}, doi = {10.1109/JSYST.2008.924128}, timestamp = {Fri, 11 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/sj/IbarraSS08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/MarczynskiTS04, author = {Ralph Marczynski and Mitchell A. Thornton and Stephen A. Szygenda}, title = {Test vector generation and classification using {FSM} traversals}, booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems, {ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004}, pages = {309--312}, publisher = {{IEEE}}, year = {2004}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/MarczynskiTS04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isvlsi/LiTS04, author = {Lun Li and Mitchell A. Thornton and Stephen A. Szygenda}, title = {A Genetic Approach for Conjunction Scheduling in Symbolic Equivalence Checking}, booktitle = {2004 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI} 2004), Emerging Trends in {VLSI} Systems Design, 19-20 February 2004, Lafayette, LA, {USA}}, pages = {32--38}, publisher = {{IEEE} Computer Society}, year = {2004}, url = {https://doi.org/10.1109/ISVLSI.2004.1339505}, doi = {10.1109/ISVLSI.2004.1339505}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isvlsi/LiTS04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/simulation/KangS03, author = {Sungho Kang and Stephen A. Szygenda}, title = {Accurate Logic Simulation by Overcoming the Unknown Value Propagation Problem}, journal = {Simul.}, volume = {79}, number = {2}, pages = {59--68}, year = {2003}, url = {https://doi.org/10.1177/0037549703254811}, doi = {10.1177/0037549703254811}, timestamp = {Mon, 08 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/simulation/KangS03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/anss/ShaikhS97, author = {Saghir A. Shaikh and Stephen A. Szygenda}, title = {Exploiting Component/Event-Level Parallelism in Concurrent Fault and Design Error Simulation}, booktitle = {Proceedings 30st Annual Simulation Symposium {(SS} '97), April 7-9, 1997, Atlanta, GA, {USA}}, pages = {64--74}, publisher = {{IEEE} Computer Society}, year = {1997}, url = {https://doi.org/10.1109/SIMSYM.1997.586486}, doi = {10.1109/SIMSYM.1997.586486}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/anss/ShaikhS97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/anss/HurSGKS97, author = {Youngmin Hur and Saghir A. Shaikh and Silvian Goldenberg and D. Kacprzak and Stephen A. Szygenda}, title = {Concurrent Fault and Design Error Simulation in Interactive Simulation Automation System}, booktitle = {Proceedings 30st Annual Simulation Symposium {(SS} '97), April 7-9, 1997, Atlanta, GA, {USA}}, pages = {168--176}, publisher = {{IEEE} Computer Society}, year = {1997}, url = {https://doi.org/10.1109/SIMSYM.1997.586527}, doi = {10.1109/SIMSYM.1997.586527}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/anss/HurSGKS97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/graphicsinterface/WileyCSFH97, author = {Charles Wiley and A. T. Campbell III and Stephen A. Szygenda and Donald S. Fussell and Fred Hudson}, editor = {Wayne A. Davis and Marilyn M. Mantei and R. Victor Klassen}, title = {Multiresolution {BSP} Trees Applied to Terrain, Transparency, and General Objects}, booktitle = {Proceedings of the Graphics Interface 1997 Conference, May 21-23, 1997, Kelowna, BC, Canada}, pages = {88--96}, publisher = {Canadian Human-Computer Communications Society}, year = {1997}, timestamp = {Tue, 01 Mar 2005 14:18:19 +0100}, biburl = {https://dblp.org/rec/conf/graphicsinterface/WileyCSFH97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/FehrSO96, author = {E. Scott Fehr and Stephen A. Szygenda and Granville E. Ott}, title = {An Integrated Hardware Array for Very High Speed Logic Simulation}, journal = {{VLSI} Design}, volume = {4}, number = {2}, pages = {107--118}, year = {1996}, url = {https://doi.org/10.1155/1996/13931}, doi = {10.1155/1996/13931}, timestamp = {Mon, 07 Nov 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsi/FehrSO96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/KangHS96, author = {Sungho Kang and Youngmin Hur and Stephen A. Szygenda}, title = {A Hardware Accelerator for Fault Simulation Utilizing a Reconfigurable Array Architecture}, journal = {{VLSI} Design}, volume = {4}, number = {2}, pages = {119--133}, year = {1996}, url = {https://doi.org/10.1155/1996/60318}, doi = {10.1155/1996/60318}, timestamp = {Mon, 07 Nov 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsi/KangHS96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/anss/HurS96, author = {Youngmin Hur and Stephen A. Szygenda}, title = {A Simulation Tool for Design Error Models Utilizing Error Compression and Sampling}, booktitle = {Proceedings 29st Annual Simulation Symposium {(SS} '96), April 8-11, 1996, New Orleans, LA, {USA}}, pages = {212--220}, publisher = {{IEEE} Computer Society}, year = {1996}, url = {https://doi.org/10.1109/SIMSYM.1996.492169}, doi = {10.1109/SIMSYM.1996.492169}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/anss/HurS96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/esm/HurS96, author = {Youngmin Hur and Stephen A. Szygenda}, editor = {Andr{\'{a}}s J{\'{a}}vor and Axel Lehmann and Istvan Moln{\'{a}}r}, title = {A Graphical Simulation and Automatic Model Generation System}, booktitle = {Modelling and Simulation, ESM96, June 2-6, 1996, Budapest University of Economic Sciences}, pages = {278--282}, publisher = {SCS, The Society for Computer Simulation International}, year = {1996}, timestamp = {Mon, 27 Feb 2023 10:45:50 +0100}, biburl = {https://dblp.org/rec/conf/esm/HurS96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/pdpta/ShaikhGS96, author = {Saghir A. Shaikh and Silvian Goldenberg and Stephen A. Szygenda}, editor = {Hamid R. Arabnia}, title = {CON\({}^{\mbox{2}}\)FERS: {A} Concurrent Concurrent Fault and Design Error Simulator}, booktitle = {Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, {PDPTA} 1996, August 9-11, 1996, Sunnyvale, California, {USA}}, pages = {109--112}, publisher = {{CSREA} Press}, year = {1996}, timestamp = {Wed, 21 Apr 2004 11:30:43 +0200}, biburl = {https://dblp.org/rec/conf/pdpta/ShaikhGS96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/anss/HurS95, author = {Youngmin Hur and Stephen A. Szygenda}, title = {Special purpose array processor for digital logic simulation}, booktitle = {Proceedings 28st Annual Simulation Symposium {(SS} '95), April 25-28, 1995, Santa Barbara, California, {USA}}, pages = {297--302}, publisher = {{IEEE} Computer Society}, year = {1995}, url = {https://doi.org/10.1109/SIMSYM.1995.393569}, doi = {10.1109/SIMSYM.1995.393569}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/anss/HurS95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hpca/HurSFOK95, author = {Youngmin Hur and Stephen A. Szygenda and E. Scott Fehr and Granville E. Ott and Sungho Kang}, title = {Massively Parallel Array Processor for Logic, Fault, and Design Error Simulation}, booktitle = {Proceedings of the 1st {IEEE} Symposium on High-Performance Computer Architecture {(HPCA} 1995), Raleigh, North Carolina, USA, January 22-25, 1995}, pages = {340--347}, publisher = {{IEEE} Computer Society}, year = {1995}, url = {https://doi.org/10.1109/HPCA.1995.386529}, doi = {10.1109/HPCA.1995.386529}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hpca/HurSFOK95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/GraysonSS95, author = {Brian Grayson and Saghir A. Shaikh and Stephen A. Szygenda}, title = {Statistics on concurrent fault and design error simulation}, booktitle = {1995 International Conference on Computer Design {(ICCD} '95), {VLSI} in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings}, pages = {622--627}, publisher = {{IEEE} Computer Society}, year = {1995}, url = {https://doi.org/10.1109/ICCD.1995.528933}, doi = {10.1109/ICCD.1995.528933}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/GraysonSS95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/dt/KangS94, author = {Sungho Kang and Stephen A. Szygenda}, title = {Design Validation: Comparing Theoretical and Empirical Results of Design Error Modeling}, journal = {{IEEE} Des. Test Comput.}, volume = {11}, number = {1}, pages = {18--26}, year = {1994}, url = {https://doi.org/10.1109/54.262319}, doi = {10.1109/54.262319}, timestamp = {Sun, 17 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/dt/KangS94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijait/ChangS94, author = {Shuchih Ernest Chang and Stephen A. Szygenda}, title = {Automatic Functional Model Generation for Parallel Fault and Design Error Simulations}, journal = {Int. J. Artif. Intell. Tools}, volume = {3}, number = {2}, pages = {127--156}, year = {1994}, url = {https://doi.org/10.1142/S021821309400008X}, doi = {10.1142/S021821309400008X}, timestamp = {Tue, 12 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijait/ChangS94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/simulation/KangS94, author = {Sungho Kang and Stephen A. Szygenda}, title = {Automatic Simulator Generation System}, journal = {Simul.}, volume = {63}, number = {6}, pages = {360--368}, year = {1994}, url = {https://doi.org/10.1177/003754979406300602}, doi = {10.1177/003754979406300602}, timestamp = {Mon, 08 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/simulation/KangS94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/KangS94, author = {Sungho Kang and Stephen A. Szygenda}, title = {The simulation automation system (SAS); concepts, implementation, and results}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {2}, number = {1}, pages = {89--99}, year = {1994}, url = {https://doi.org/10.1109/92.273154}, doi = {10.1109/92.273154}, timestamp = {Wed, 11 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/KangS94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/chdl/KangS93, author = {Sungho Kang and Stephen A. Szygenda}, editor = {David Agnew and Luc J. M. Claesen and Raul Camposano}, title = {Automatic {VHDL} Model Generation System}, booktitle = {Computer Hardware Description Languages and their Applications, Proceedings of the 11th {IFIP} {WG10.2} International Conference on Computer Hardware Description Languages and their Applications - {CHDL} '93, sponsored by {IFIP} {WG10.2} and in cooperation with {IEEE} COMPSOC, Ottawa, Ontario, Canada, 26-28 April, 1993}, series = {{IFIP} Transactions}, volume = {{A-32}}, pages = {353--360}, publisher = {North-Holland}, year = {1993}, timestamp = {Thu, 03 Jan 2002 11:54:34 +0100}, biburl = {https://dblp.org/rec/conf/chdl/KangS93.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/WileyLS93, author = {Charles Wiley and K. M. Lau and Stephen A. Szygenda}, title = {m3D: {A} Multidimensional Dynamic Configurable Router}, booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS} 1993, Chicago, Illinois, USA, May 3-6, 1993}, pages = {1857--1860}, publisher = {{IEEE}}, year = {1993}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/WileyLS93.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/anss/ChuangSB92, author = {Cheng{-}I Chuang and Stephen A. Szygenda and James D. Baker}, title = {The automatic element routine generator: an automatic programming tool for functional simulator design}, booktitle = {Proceedings 25th Annual Simulation Symposium {(ANSS-25} 1992), Orlando, Florida, USA, 1992}, pages = {84--90}, publisher = {{IEEE} Computer Society}, year = {1992}, url = {https://doi.org/10.1109/SIMSYM.1992.227574}, doi = {10.1109/SIMSYM.1992.227574}, timestamp = {Mon, 09 Aug 2021 14:54:01 +0200}, biburl = {https://dblp.org/rec/conf/anss/ChuangSB92.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/eurodac/KangS92, author = {Sungho Kang and Stephen A. Szygenda}, editor = {Gerald Musgrave}, title = {New design error modeling and metrics for design validation}, booktitle = {Proceedings of the conference on European design automation, {EURO-DAC} '92, Hamburg, Germany, September 7-10, 1992}, pages = {472--477}, publisher = {{IEEE} Computer Society Press}, year = {1992}, url = {https://doi.org/10.1109/EURDAC.1992.246201}, doi = {10.1109/EURDAC.1992.246201}, timestamp = {Wed, 16 Oct 2019 14:14:54 +0200}, biburl = {https://dblp.org/rec/conf/eurodac/KangS92.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/KangS92, author = {Sungho Kang and Stephen A. Szygenda}, title = {Modeling and Simulation of Design Errors}, booktitle = {Proceedings 1992 {IEEE} International Conference on Computer Design: {VLSI} in Computer {\&} Processors, {ICCD} '92, Cambridge, MA, USA, October 11-14, 1992}, pages = {443--446}, publisher = {{IEEE} Computer Society}, year = {1992}, url = {https://doi.org/10.1109/ICCD.1992.276310}, doi = {10.1109/ICCD.1992.276310}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/KangS92.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/cad/KongS90, author = {Jin{-}Hyeung Kong and Stephen A. Szygenda}, title = {MixMOS: a mixed-level simulator for digital {MOS} circuits using a new algebraic approach}, journal = {Comput. Aided Des.}, volume = {22}, number = {10}, pages = {618--632}, year = {1990}, url = {https://doi.org/10.1016/0010-4485(90)90009-2}, doi = {10.1016/0010-4485(90)90009-2}, timestamp = {Thu, 13 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/cad/KongS90.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ieaaie/KarimS88, author = {Asad Karim and Stephen A. Szygenda}, title = {{SMARTGEN:} The Implementation of an Expert System for the Generation of Digital Logic Diagnostic Tests}, booktitle = {Proceedings of the First International Conference on Industrial {\&} Engineering Applications of Artificial Intelligence {\&} Expert Systems, {IEA/AIE} 1988, June 1-3, 1988, Tullahoma, TN, {USA.} ACM, 1988 - Volume 1}, pages = {355--360}, publisher = {{ACM}}, year = {1988}, url = {https://doi.org/10.1145/51909.51949}, doi = {10.1145/51909.51949}, timestamp = {Wed, 17 Jul 2019 17:09:14 +0200}, biburl = {https://dblp.org/rec/conf/ieaaie/KarimS88.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fjcc/SzygendaW87, author = {Stephen A. Szygenda and M. Wilson}, editor = {Stephen A. Szygenda}, title = {Technology transfer: commercializing university research}, booktitle = {Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow}, pages = {696--699}, publisher = {{ACM}}, year = {1987}, url = {http://dl.acm.org/citation.cfm?id=42150}, timestamp = {Fri, 29 Sep 2017 17:14:39 +0200}, biburl = {https://dblp.org/rec/conf/fjcc/SzygendaW87.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/fjcc/1987, editor = {Stephen A. Szygenda}, title = {Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow}, publisher = {{ACM}}, year = {1987}, url = {http://dl.acm.org/citation.cfm?id=42040}, isbn = {0-8186-0811-0}, timestamp = {Fri, 29 Sep 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fjcc/1987.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/isca/1982, editor = {Stephen A. Szygenda and John Hughes and Matt Blanton and Terry J. Wagner and Dennis J. Frailey and Tom Gunter and Chuck McLeavy and G. Jack Lipovski and Miroslaw Malek}, title = {9th International Symposium on Computer Architecture {(ISCA} 1982), Austin, TX, USA, April 26-29, 1982}, publisher = {{IEEE} Computer Society}, year = {1982}, url = {https://dl.acm.org/doi/10.5555/800048}, doi = {10.5555/800048}, timestamp = {Thu, 15 Jul 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isca/1982.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/dac/1978, editor = {Stephen A. Szygenda}, title = {Proceedings of the 15th Design Automation Conference, {DAC} '78, Las Vegas, Nevada, USA, June 19-21, 1978}, publisher = {{ACM}}, year = {1978}, url = {http://dl.acm.org/citation.cfm?id=800095}, timestamp = {Thu, 01 Mar 2012 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/1978.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/afips/BoseS77, author = {Ajoy K. Bose and Stephen A. Szygenda}, title = {Design of a diagnosable and fault-tolerant input/output controller}, booktitle = {American Federation of Information Processing Societies: 1977 National Computer Conference, June 13-16, 1977, Dallas, Texas, {USA}}, series = {{AFIPS} Conference Proceedings}, volume = {46}, pages = {795--800}, publisher = {{AFIPS} Press}, year = {1977}, url = {https://doi.org/10.1145/1499402.1499547}, doi = {10.1145/1499402.1499547}, timestamp = {Wed, 14 Apr 2021 16:50:07 +0200}, biburl = {https://dblp.org/rec/conf/afips/BoseS77.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/BoseS77, author = {Ajoy K. Bose and Stephen A. Szygenda}, editor = {Judith G. Brinsfield and Stephen A. Szygenda and David W. Hightower}, title = {Detection of static and dynamic hazards in logic nets}, booktitle = {Proceedings of the 14th Design Automation Conference, {DAC} '77, New Orleans, Louisiana, USA, June 20-22, 1977}, pages = {220--224}, publisher = {{ACM}}, year = {1977}, url = {http://dl.acm.org/citation.cfm?id=809129}, timestamp = {Thu, 01 Mar 2012 19:06:51 +0100}, biburl = {https://dblp.org/rec/conf/dac/BoseS77.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/dac/1977, editor = {Judith G. Brinsfield and Stephen A. Szygenda and David W. Hightower}, title = {Proceedings of the 14th Design Automation Conference, {DAC} '77, New Orleans, Louisiana, USA, June 20-22, 1977}, publisher = {{ACM}}, year = {1977}, url = {http://dl.acm.org/citation.cfm?id=800262}, timestamp = {Thu, 01 Mar 2012 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/1977.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/SzygendaT76, author = {Stephen A. Szygenda and Edward W. Thompson}, title = {Modeling and Digital Simulation for Design Verification and Diagnosis}, journal = {{IEEE} Trans. Computers}, volume = {25}, number = {12}, pages = {1242--1253}, year = {1976}, url = {https://doi.org/10.1109/TC.1976.1674591}, doi = {10.1109/TC.1976.1674591}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tc/SzygendaT76.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icse/BillawalaST76, author = {N. Billawala and Stephen A. Szygenda and Ewald W. Thomson}, editor = {Raymond T. Yeh and C. V. Ramamoorthy}, title = {A Data Structure and Drive Mechanism for a Table-Driven Simulation System Employing Multilevel Structural Representations of Digital Systems}, booktitle = {Proceedings of the 2nd International Conference on Software Engineering, San Francisco, California, USA, October 13-15, 1976}, pages = {151--157}, publisher = {{IEEE} Computer Society}, year = {1976}, url = {http://dl.acm.org/citation.cfm?id=807667}, timestamp = {Mon, 14 May 2012 18:17:17 +0200}, biburl = {https://dblp.org/rec/conf/icse/BillawalaST76.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/dac/1976, editor = {Donald J. Humcke and J. Michael Galey and Stephen A. Szygenda and Pat O. Pistilli and Nitta P. Dooner and Judith G. Brinsfield and J. S. Olila}, title = {Proceedings of the 13th Design Automation Conference, {DAC} '76, San Francisco, California, USA, June 28-30, 1976}, publisher = {{ACM}}, year = {1976}, url = {http://dl.acm.org/citation.cfm?id=800146}, timestamp = {Thu, 01 Mar 2012 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/1976.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/computer/Szygenda75, author = {Stephen A. Szygenda}, title = {Digital Systems Simulation}, journal = {Computer}, volume = {8}, number = {3}, pages = {23}, year = {1975}, url = {https://doi.org/10.1109/C-M.1975.218897}, doi = {10.1109/C-M.1975.218897}, timestamp = {Wed, 12 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/computer/Szygenda75.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/computer/SzygendaT75, author = {Stephen A. Szygenda and Edward W. Thompson}, title = {Digital Logic Simulation in a Time-Based, Table-Driven Environment}, journal = {Computer}, volume = {8}, number = {3}, pages = {24--36}, year = {1975}, url = {https://doi.org/10.1109/C-M.1975.218898}, doi = {10.1109/C-M.1975.218898}, timestamp = {Wed, 12 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/computer/SzygendaT75.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/computer/ThompsonS75, author = {Edward W. Thompson and Stephen A. Szygenda}, title = {Digital Logic Simulation in a Time-Based, Table-Driven Environment}, journal = {Computer}, volume = {8}, number = {3}, pages = {38--49}, year = {1975}, url = {https://doi.org/10.1109/C-M.1975.218900}, doi = {10.1109/C-M.1975.218900}, timestamp = {Wed, 12 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/computer/ThompsonS75.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/ThompsonS75, author = {Edward W. Thompson and Stephen A. Szygenda}, editor = {Robert B. Hitchcock Sr. and Donald J. Humcke and Stephen A. Szygenda}, title = {Three levels of accuracy for the simulation of different fault types in digital systems}, booktitle = {Proceedings of the 12th Design Automation Conference, {DAC} '75, Boston, Massachusetts, USA, June 23-25, 1975}, pages = {105--113}, publisher = {{ACM}}, year = {1975}, url = {http://dl.acm.org/citation.cfm?id=809057}, timestamp = {Thu, 01 Mar 2012 19:09:34 +0100}, biburl = {https://dblp.org/rec/conf/dac/ThompsonS75.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/dac/1975, editor = {Robert B. Hitchcock Sr. and Donald J. Humcke and Stephen A. Szygenda}, title = {Proceedings of the 12th Design Automation Conference, {DAC} '75, Boston, Massachusetts, USA, June 23-25, 1975}, publisher = {{ACM}}, year = {1975}, url = {http://dl.acm.org/citation.cfm?id=800261}, timestamp = {Thu, 01 Mar 2012 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/1975.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/ThompsonSBP74, author = {Edward W. Thompson and Stephen A. Szygenda and N. Billawala and R. Pierce}, editor = {Herbert M. Wall and Robert B. Hitchcock Sr. and Stephen P. Krosner and J. Michael Galey and Nitta P. Dooner and Donald J. Humcke and Pat O. Pistilli}, title = {Timing analysis for digital fault simulation using assignable delays}, booktitle = {Proceedings of the 11th Design Automation Workshop, {DAC} '74, Denver, Colorado, USA, June 11-19, 1974}, pages = {266--272}, publisher = {{ACM}}, year = {1974}, url = {http://dl.acm.org/citation.cfm?id=811402}, timestamp = {Thu, 01 Mar 2012 19:13:33 +0100}, biburl = {https://dblp.org/rec/conf/dac/ThompsonSBP74.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/wsc/SzygendaLF74, author = {Stephen A. Szygenda and Anthony A. Lekkos and John L. Fike}, editor = {Harold Joseph Highland and Michael F. Morris and Harold Steinberg and Donald O. Walter and Fred Silver and Susan L. Solomon and Joseph Annino and Dennis M. Gilbert}, title = {Implemented techniques for handling spikes in an assignable delay simulator}, booktitle = {Proceedings of the 7th conference on Winter simulation, {WSC} 1974, Washington, DC, USA, January 14-16, 1974}, pages = {721--722}, publisher = {{ACM}}, year = {1974}, url = {https://doi.org/10.1145/800290.811330}, doi = {10.1145/800290.811330}, timestamp = {Wed, 04 May 2022 13:02:28 +0200}, biburl = {https://dblp.org/rec/conf/wsc/SzygendaLF74.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/anss/FikeS73, author = {John L. Fike and Stephen A. Szygenda}, editor = {Michael F. Morris and Paul F. Roth and Philip J. Kiviat and Harold Joseph Highland}, title = {Techniques and modules for element specification in a time - delay logic simulator}, booktitle = {Proceedings of the 1st Symposium on Simulation of Computer Systems, {ANSS} 1973, Gaithersburg, Maryland, USA, June 19-20, 1973}, pages = {276--287}, publisher = {{IEEE}}, year = {1973}, url = {https://dl.acm.org/citation.cfm?id=807248}, timestamp = {Tue, 31 Aug 2021 15:29:34 +0200}, biburl = {https://dblp.org/rec/conf/anss/FikeS73.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/SzygendaL73, author = {Stephen A. Szygenda and Anthony A. Lekkos}, editor = {J. Michael Galey and Herbert M. Wall and Robert B. Hitchcock Sr. and Ben E. Britt and Richard E. Merwin and Donald J. Humcke and David B. Smithhisler}, title = {Integrated techniques for functional and gate-level digital logic simulation}, booktitle = {Proceedings of the 10th Design Automation Workshop, {DAC} '73, Portland, Oregon, USA, June 25-27, 1973}, pages = {159--172}, publisher = {{ACM}}, year = {1973}, url = {http://dl.acm.org/citation.cfm?id=804011}, timestamp = {Fri, 02 Mar 2012 08:59:31 +0100}, biburl = {https://dblp.org/rec/conf/dac/SzygendaL73.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/HemphillS73, author = {John M. Hemphill and Stephen A. Szygenda}, editor = {G. Jack Lipovski and Stephen A. Szygenda}, title = {Deriving Design Guidelines for Diagnosable Computer Systems}, booktitle = {Proceedings of the 1st Annual Symposium on Computer Architecture, Gainesville, FL, USA, December 1973}, pages = {131--135}, publisher = {{ACM}}, year = {1973}, url = {https://doi.org/10.1145/800123.803978}, doi = {10.1145/800123.803978}, timestamp = {Tue, 20 Jul 2021 13:44:00 +0200}, biburl = {https://dblp.org/rec/conf/isca/HemphillS73.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/isca/1973, editor = {G. Jack Lipovski and Stephen A. Szygenda}, title = {Proceedings of the 1st Annual Symposium on Computer Architecture, Gainesville, FL, USA, December 1973}, publisher = {{ACM}}, year = {1973}, url = {https://doi.org/10.1145/800123}, doi = {10.1145/800123}, isbn = {978-1-4503-7428-6}, timestamp = {Tue, 20 Jul 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isca/1973.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/acm/HemmingS72, author = {Cliff W. Hemming Jr. and Stephen A. Szygenda}, editor = {John J. Donovan and Rosemary Shields}, title = {Modular requirements for digital logic simulation at a predefined functional level}, booktitle = {Proceedings of the {ACM} annual conference, {ACM} 1972, Boston, MA, USA, August 1972, Volume 1}, pages = {380--389}, publisher = {{ACM}}, year = {1972}, url = {https://doi.org/10.1145/800193.569948}, doi = {10.1145/800193.569948}, timestamp = {Tue, 13 Apr 2021 15:14:35 +0200}, biburl = {https://dblp.org/rec/conf/acm/HemmingS72.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/afips/SzygendaT72, author = {Stephen A. Szygenda and Edward W. Thompson}, title = {Fault insertion techniques and models for digital logic simulation}, booktitle = {American Federation of Information Processing Societies: Proceedings of the {AFIPS} '72 Fall Joint Computer Conference, December 5-7, 1972, Anaheim, California, {USA} - Part {II}}, series = {{AFIPS} Conference Proceedings}, volume = {41}, pages = {875--884}, publisher = {{AFIPS} / {ACM} / Thomson Book Company, Washington {D.C.}}, year = {1972}, url = {https://doi.org/10.1145/1480083.1480112}, doi = {10.1145/1480083.1480112}, timestamp = {Wed, 14 Apr 2021 16:50:07 +0200}, biburl = {https://dblp.org/rec/conf/afips/SzygendaT72.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/Szygenda72, author = {Stephen A. Szygenda}, editor = {Harlow Freitag and J. Michael Galey and Robert B. Hitchcock Sr. and J. M. Saindon and Herbert M. Wall and Donald J. Humcke and J. R. Hanne}, title = {{TEGAS2} - anatomy of a general purpose {TEST} {GENERATION} {AND} {SIMULATION} system for digital logic}, booktitle = {Proceedings of the 9th Design Automation Workshop, {DAC} '72, Dallas, Texas, USA, June 26-28, 1972}, pages = {116--127}, publisher = {{ACM}}, year = {1972}, url = {https://doi.org/10.1145/800153.804937}, doi = {10.1145/800153.804937}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/Szygenda72.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/afips/SzygendaF71, author = {Stephen A. Szygenda and Michael J. Flynn}, title = {Coding techniques for failure recovery in a distributive modular memory organization}, booktitle = {American Federation of Information Processing Societies: {AFIPS} Conference Proceedings: 1971 Spring Joint Computer Conference, Atlantic City, NJ, USA, May 18-20, 1971}, series = {{AFIPS} Conference Proceedings}, volume = {38}, pages = {459--466}, publisher = {{AFIPS}}, year = {1971}, url = {https://doi.org/10.1145/1478786.1478851}, doi = {10.1145/1478786.1478851}, timestamp = {Wed, 14 Apr 2021 16:50:07 +0200}, biburl = {https://dblp.org/rec/conf/afips/SzygendaF71.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/wsc/SzygendaHH71, author = {Stephen A. Szygenda and Cliff W. Hemming Jr. and John M. Hemphill}, editor = {Michel Araten and Joseph M. Sussman and Leo J. Boelhouwer}, title = {Time flow mechanisms for use in digital logic simulation}, booktitle = {Proceedings of the 5th conference on Winter simulation, {WSC} 1971, New York, NY, USA, December 8-10, 1971}, pages = {488--495}, publisher = {{ACM}}, year = {1971}, url = {https://doi.org/10.1145/800294.811476}, doi = {10.1145/800294.811476}, timestamp = {Thu, 10 Jun 2021 16:58:01 +0200}, biburl = {https://dblp.org/rec/conf/wsc/SzygendaHH71.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/afips/SzygendaRT70, author = {Stephen A. Szygenda and David M. Rouse and Edward W. Thompson}, editor = {Harry L. Cooke}, title = {A model and implementation of a universal time delay simulator for large digital nets}, booktitle = {American Federation of Information Processing Societies: {AFIPS} Conference Proceedings: 1970 Spring Joint Computer Conference, Atlantic City, NJ, USA, May 5-7, 1970}, series = {{AFIPS} Conference Proceedings}, volume = {36}, pages = {207--216}, publisher = {{AFIPS} Press}, year = {1970}, url = {https://doi.org/10.1145/1476936.1476973}, doi = {10.1145/1476936.1476973}, timestamp = {Wed, 14 Apr 2021 16:50:07 +0200}, biburl = {https://dblp.org/rec/conf/afips/SzygendaRT70.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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