default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDBibTeX records: Chauchin Su
@inproceedings{DBLP:conf/date/LinSHNTH19,
author = {Ting{-}You Lin and
Chauchin Su and
Chung{-}Chih Hung and
Karuna Nidhi and
Chily Tu and
Shao{-}Chang Huang},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {Package and Chip Accelerated Aging Methods for Power {MOSFET} Reliability
Evaluation},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {1661--1666},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8714895},
doi = {10.23919/DATE.2019.8714895},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/LinSHNTH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sensors/LinHS17,
author = {Ting{-}You Lin and
Yingchieh Ho and
Chauchin Su},
title = {{LDMOS} Channel Thermometer Based on a Thermal Resistance Sensor for
Balancing Temperature in Monolithic Power ICs},
journal = {Sensors},
volume = {17},
number = {6},
pages = {1397},
year = {2017},
url = {https://doi.org/10.3390/s17061397},
doi = {10.3390/S17061397},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/sensors/LinHS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isocc/TsengLYHS16,
author = {Yuhwai Tseng and
Ting{-}You Lin and
Songwen Yau and
Yingchieh Ho and
Chauchin Su},
title = {A 0.5V/22 {\(\mu\)}W low power transceiver {IC} for use in {ESC} intra-body
communication system},
booktitle = {International SoC Design Conference, {ISOCC} 2016, Jeju, South Korea,
October 23-26, 2016},
pages = {71--72},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ISOCC.2016.7799738},
doi = {10.1109/ISOCC.2016.7799738},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isocc/TsengLYHS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HsuHCSL14,
author = {Shu{-}Yu Hsu and
Yingchieh Ho and
Po{-}Yao Chang and
Chauchin Su and
Chen{-}Yi Lee},
title = {A 48.6-to-105.2 {\(\mathrm{\mu}\)}W Machine Learning Assisted Cardiac
Sensor SoC for Mobile Healthcare Applications},
journal = {{IEEE} J. Solid State Circuits},
volume = {49},
number = {4},
pages = {801--811},
year = {2014},
url = {https://doi.org/10.1109/JSSC.2013.2297406},
doi = {10.1109/JSSC.2013.2297406},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/HsuHCSL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/HoKS14,
author = {Yingchieh Ho and
Chou{-}Ming Kuo and
Chauchin Su},
title = {A low-power analog-to-digital converter with digitalized amplifier
for {PAM} systems},
booktitle = {{IEEE} 57th International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2014, College Station, TX, USA, August 3-6, 2014},
pages = {109--112},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/MWSCAS.2014.6908364},
doi = {10.1109/MWSCAS.2014.6908364},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/HoKS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HoYCS13,
author = {Yingchieh Ho and
Yu{-}Sheng Yang and
Chiachi Chang and
Chauchin Su},
title = {A Near-Threshold 480 MHz 78 {\(\mathrm{\mu}\)}W All-Digital {PLL}
With a Bootstrapped {DCO}},
journal = {{IEEE} J. Solid State Circuits},
volume = {48},
number = {11},
pages = {2805--2814},
year = {2013},
url = {https://doi.org/10.1109/JSSC.2013.2280409},
doi = {10.1109/JSSC.2013.2280409},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/HoYCS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esticas/HoCS12,
author = {Yingchieh Ho and
Hung{-}Kai Chen and
Chauchin Su},
title = {Energy-Effective Sub-Threshold Interconnect Design Using High-Boosting
Predrivers},
journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
volume = {2},
number = {2},
pages = {307--313},
year = {2012},
url = {https://doi.org/10.1109/JETCAS.2012.2193841},
doi = {10.1109/JETCAS.2012.2193841},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/esticas/HoCS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/ChenHS12,
author = {Hung{-}Kai Chen and
Yingchieh Ho and
Chauchin Su},
title = {Cumulative Differential Nonlinearity Testing of ADCs},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {95-A},
number = {10},
pages = {1768--1775},
year = {2012},
url = {https://doi.org/10.1587/transfun.E95.A.1768},
doi = {10.1587/TRANSFUN.E95.A.1768},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieicet/ChenHS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HoS12,
author = {Yingchieh Ho and
Chauchin Su},
title = {A 0.1-0.3 {V} 40-123 fJ/bit/ch On-Chip Data Link With ISI-Suppressed
Bootstrapped Repeaters},
journal = {{IEEE} J. Solid State Circuits},
volume = {47},
number = {5},
pages = {1242--1251},
year = {2012},
url = {https://doi.org/10.1109/JSSC.2012.2186722},
doi = {10.1109/JSSC.2012.2186722},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/HoS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tbcas/TsengHKS12,
author = {Yuhwai Tseng and
Yingchieh Ho and
Shuoting Kao and
Chauchin Su},
title = {A 0.09 {\(\mathrm{\mu}\)}W Low Power Front-End Biopotential Amplifier
for Biosignal Recording},
journal = {{IEEE} Trans. Biomed. Circuits Syst.},
volume = {6},
number = {5},
pages = {508--516},
year = {2012},
url = {https://doi.org/10.1109/TBCAS.2012.2188029},
doi = {10.1109/TBCAS.2012.2188029},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tbcas/TsengHKS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/HoCS12,
author = {Yingchieh Ho and
Chiachi Chang and
Chauchin Su},
title = {Design of a Subthreshold-Supply Bootstrapped {CMOS} Inverter Based
on an Active Leakage-Current Reduction Technique},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {59-II},
number = {1},
pages = {55--59},
year = {2012},
url = {https://doi.org/10.1109/TCSII.2011.2174674},
doi = {10.1109/TCSII.2011.2174674},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/HoCS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/HsuHTLCLHCYLYCS12,
author = {Shu{-}Yu Hsu and
Yingchieh Ho and
Yuhwai Tseng and
Ting{-}You Lin and
Po{-}Yao Chang and
Jen{-}Wei Lee and
Ju{-}Hung Hsiao and
Siou{-}Ming Chuang and
Tze{-}Zheng Yang and
Po{-}Chun Liu and
Ten{-}Fang Yang and
Ray{-}Jade Chen and
Chauchin Su and
Chen{-}Yi Lee},
title = {A sub-100{\(\mathrm{\mu}\)}W multi-functional cardiac signal processor
for mobile healthcare applications},
booktitle = {Symposium on {VLSI} Circuits, {VLSIC} 2012, Honolulu, HI, USA, June
13-15, 2012},
pages = {156--157},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/VLSIC.2012.6243837},
doi = {10.1109/VLSIC.2012.6243837},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/HsuHTLCLHCYLYCS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/HoYS11,
author = {Yingchieh Ho and
Yu{-}Sheng Yang and
Chauchin Su},
title = {A 0.2-0.6 {V} ring oscillator design using bootstrap technique},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2011, Jeju,
South Korea, November 14-16, 2011},
pages = {333--336},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ASSCC.2011.6123581},
doi = {10.1109/ASSCC.2011.6123581},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/asscc/HoYS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/TsengSL10,
author = {Yuhwai Tseng and
Chauchin Su and
Chien{-}Nan Jimmy Liu},
title = {Measuring the Transmission Characteristic of the Human Body in an
Electrostatic-Coupling Intra Body Communication System Using a Square
Test Stimulus},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {93-A},
number = {3},
pages = {664--668},
year = {2010},
url = {https://doi.org/10.1587/transfun.E93.A.664},
doi = {10.1587/TRANSFUN.E93.A.664},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/TsengSL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/TsengSL10a,
author = {Yuhwai Tseng and
Chauchin Su and
Chien{-}Nan Jimmy Liu},
title = {Measurement and Evaluation of the Bioelectrical Impedance of the Human
Body by Deconvolution of a Square Wave},
journal = {{IEICE} Trans. Inf. Syst.},
volume = {93-D},
number = {6},
pages = {1656--1660},
year = {2010},
url = {https://doi.org/10.1587/transinf.E93.D.1656},
doi = {10.1587/TRANSINF.E93.D.1656},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/TsengSL10a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tim/HsuS10,
author = {Jen{-}Chien Hsu and
Chauchin Su},
title = {Timing Jitter and Modulation Profile Extraction for Spread-Spectrum
Clocks},
journal = {{IEEE} Trans. Instrum. Meas.},
volume = {59},
number = {4},
pages = {847--856},
year = {2010},
url = {https://doi.org/10.1109/TIM.2009.2025992},
doi = {10.1109/TIM.2009.2025992},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tim/HsuS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LinHFS10,
author = {Hung{-}Wen Lin and
Yingchieh Ho and
YingLin Fa and
Chauchin Su},
title = {A 5Gb/s pulse signaling interface for low power on-chip data communication},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
30 - June 2, 2010, Paris, France},
pages = {201--204},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISCAS.2010.5537978},
doi = {10.1109/ISCAS.2010.5537978},
timestamp = {Fri, 05 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/LinHFS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/TsengSL09,
author = {Yuhwai Tseng and
Chauchin Su and
Chien{-}Nan Jimmy Liu},
title = {Analysis and Design of Wide-Band Digital Transmission in an Electrostatic-Coupling
Intra-Body Communication System},
journal = {{IEICE} Trans. Commun.},
volume = {92-B},
number = {11},
pages = {3557--3563},
year = {2009},
url = {https://doi.org/10.1587/transcom.E92.B.3557},
doi = {10.1587/TRANSCOM.E92.B.3557},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/TsengSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LuSL09,
author = {Hungwen Lu and
Chauchin Su and
Chien{-}Nan Jimmy Liu},
title = {A Tree-Topology Multiplexer for Multiphase Clock System},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {56-I},
number = {1},
pages = {124--131},
year = {2009},
url = {https://doi.org/10.1109/TCSI.2008.926578},
doi = {10.1109/TCSI.2008.926578},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LuSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LuWSL09,
author = {Hungwen Lu and
Hsin{-}Wen Wang and
Chauchin Su and
Chien{-}Nan Jimmy Liu},
title = {Design of an All-Digital {LVDS} Driver},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {56-I},
number = {8},
pages = {1635--1644},
year = {2009},
url = {https://doi.org/10.1109/TCSI.2008.2008279},
doi = {10.1109/TCSI.2008.2008279},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LuWSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LiLSC09,
author = {Katherine Shu{-}Min Li and
Chung{-}Len Lee and
Chauchin Su and
Jwu E. Chen},
title = {A Unified Detection Scheme for Crosstalk Effects in Interconnection
Bus},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {17},
number = {2},
pages = {306--311},
year = {2009},
url = {https://doi.org/10.1109/TVLSI.2008.2004548},
doi = {10.1109/TVLSI.2008.2004548},
timestamp = {Tue, 07 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/LiLSC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LuSL08,
author = {Hungwen Lu and
Chauchin Su and
Chien{-}Nan Jimmy Liu},
title = {A Scalable Digitalized Buffer for Gigabit {I/O}},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {55-II},
number = {10},
pages = {1026--1030},
year = {2008},
url = {https://doi.org/10.1109/TCSII.2008.925661},
doi = {10.1109/TCSII.2008.925661},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LuSL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcsv/WangCLLLS08,
author = {Chih{-}Hu Wang and
Bor{-}Sen Chen and
Bore{-}Kuen Lee and
Tsu{-}Tian Lee and
Chien{-}Nan Jimmy Liu and
Chauchin Su},
title = {Long-Range Prediction for Real-Time {MPEG} Video Traffic: An H\({}_{\mbox{infty}}\)
Filter Approach},
journal = {{IEEE} Trans. Circuits Syst. Video Technol.},
volume = {18},
number = {12},
pages = {1771--1775},
year = {2008},
url = {https://doi.org/10.1109/TCSVT.2008.2004926},
doi = {10.1109/TCSVT.2008.2004926},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcsv/WangCLLLS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tim/HsuS08,
author = {Jen{-}Chien Hsu and
Chauchin Su},
title = {{BIST} for Measuring Clock Jitter of Charge-Pump Phase-Locked Loops},
journal = {{IEEE} Trans. Instrum. Meas.},
volume = {57},
number = {2},
pages = {276--285},
year = {2008},
url = {https://doi.org/10.1109/TIM.2007.910109},
doi = {10.1109/TIM.2007.910109},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tim/HsuS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/LuSL08,
author = {Hungwen Lu and
Chauchin Su and
Chien{-}Nan Liu},
title = {A scalable digitalized buffer for gigabit {I/O}},
booktitle = {Proceedings of the {IEEE} 2008 Custom Integrated Circuits Conference,
{CICC} 2008, DoubleTree Hotel, San Jose, California, USA, September
21-24, 2008},
pages = {241--244},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/CICC.2008.4672068},
doi = {10.1109/CICC.2008.4672068},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/LuSL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/LiLSEC07,
author = {Katherine Shu{-}Min Li and
Chung{-}Len Lee and
Chauchin Su and
Jwu E. Chen},
title = {{IEEE} Standard 1500 Compatible Oscillation Ring Test Methodology
for Interconnect Delay and Crosstalk Detection},
journal = {J. Electron. Test.},
volume = {23},
number = {4},
pages = {341--355},
year = {2007},
url = {https://doi.org/10.1007/s10836-007-0759-5},
doi = {10.1007/S10836-007-0759-5},
timestamp = {Tue, 07 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/LiLSEC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiCLSC07,
author = {Katherine Shu{-}Min Li and
Yao{-}Wen Chang and
Chung{-}Len Lee and
Chauchin Su and
Jwu E. Chen},
title = {Multilevel Full-Chip Routing With Testability and Yield Enhancement},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {26},
number = {9},
pages = {1625--1636},
year = {2007},
url = {https://doi.org/10.1109/TCAD.2007.895587},
doi = {10.1109/TCAD.2007.895587},
timestamp = {Tue, 07 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiCLSC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChenS07,
author = {Hung{-}Kai Chen and
Chauchin Su},
title = {A Test and Diagnosis Methodology for {RF} Transceivers},
booktitle = {16th Asian Test Symposium, {ATS} 2007, Beijing, China, October 8-11,
2007},
pages = {135--138},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ATS.2007.29},
doi = {10.1109/ATS.2007.29},
timestamp = {Fri, 11 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ChenS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/TsengLS06,
author = {Wenliang Tseng and
Chien{-}Nan Jimmy Liu and
Chauchin Su},
title = {Passive Reduced-Order Macro-Modeling for Linear Time-Delay Interconnect
Systems},
journal = {{IEICE} Trans. Electron.},
volume = {89-C},
number = {11},
pages = {1713--1718},
year = {2006},
url = {https://doi.org/10.1093/ietele/e89-c.11.1713},
doi = {10.1093/IETELE/E89-C.11.1713},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/TsengLS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiSCLC06,
author = {Katherine Shu{-}Min Li and
Chauchin Su and
Yao{-}Wen Chang and
Chung{-}Len Lee and
Jwu E. Chen},
title = {{IEEE} Standard 1500 Compatible Interconnect Diagnosis for Delay and
Crosstalk Faults},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {25},
number = {11},
pages = {2513--2525},
year = {2006},
url = {https://doi.org/10.1109/TCAD.2006.881330},
doi = {10.1109/TCAD.2006.881330},
timestamp = {Tue, 07 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiSCLC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LiCSLC06,
author = {Katherine Shu{-}Min Li and
Yao{-}Wen Chang and
Chauchin Su and
Chung{-}Len Lee and
Jwu E. Chen},
editor = {Fumiyasu Hirose},
title = {{IEEE} standard 1500 compatible interconnect diagnosis for delay and
crosstalk faults},
booktitle = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation:
{ASP-DAC} 2006, Yokohama, Japan, January 24-27, 2006},
pages = {366--371},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ASPDAC.2006.1594710},
doi = {10.1109/ASPDAC.2006.1594710},
timestamp = {Tue, 07 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/LiCSLC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChouHS06,
author = {Maohsuan Chou and
Jen{-}Chien Hsu and
Chauchin Su},
title = {A Digital {BIST} Methodology for Spread Spectrum Clock Generators},
booktitle = {15th Asian Test Symposium, {ATS} 2006, Fukuoka, Japan, November 20-23,
2006},
pages = {251--254},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ATS.2006.261028},
doi = {10.1109/ATS.2006.261028},
timestamp = {Mon, 07 Nov 2022 17:39:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ChouHS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/smc/WangLTFSL06,
author = {Chih{-}Hu Wang and
Bore{-}Kuen Lee and
Wei{-}Hang Tseng and
Chung{-}Hsi Fu and
Chauchin Su and
Chien{-}Nan Jimmy Liu},
title = {Estimation of Loss Coefficients of Nonlinear Rubber Using Iterative
H{\(\infty\)} Filter},
booktitle = {Proceedings of the {IEEE} International Conference on Systems, Man
and Cybernetics, Taipei, Taiwan, October 8-11, 2006},
pages = {960--965},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ICSMC.2006.384524},
doi = {10.1109/ICSMC.2006.384524},
timestamp = {Wed, 16 Oct 2019 14:14:51 +0200},
biburl = {https://dblp.org/rec/conf/smc/WangLTFSL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LiLSC05,
author = {Katherine Shu{-}Min Li and
Chung{-}Len Lee and
Chauchin Su and
Jwu E. Chen},
editor = {Tingao Tang},
title = {Oscillation ring based interconnect test scheme for {SOC}},
booktitle = {Proceedings of the 2005 Conference on Asia South Pacific Design Automation,
{ASP-DAC} 2005, Shanghai, China, January 18-21, 2005},
pages = {184--187},
publisher = {{ACM} Press},
year = {2005},
url = {https://doi.org/10.1145/1120725.1120800},
doi = {10.1145/1120725.1120800},
timestamp = {Tue, 07 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/LiLSC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LiLJSC05,
author = {Katherine Shu{-}Min Li and
Chung{-}Len Lee and
Tagin Jiang and
Chauchin Su and
Jwu E. Chen},
title = {Finite State Machine Synthesis for At-Speed Oscillation Testability},
booktitle = {14th Asian Test Symposium {(ATS} 2005), 18-21 December 2005, Calcutta,
India},
pages = {360--365},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ATS.2005.60},
doi = {10.1109/ATS.2005.60},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/LiLJSC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenHLS05,
author = {Wei{-}Ta Chen and
Jen{-}Chien Hsu and
Hong{-}Wen Lune and
Chauchin Su},
title = {A spread spectrum clock generator for {SATA-II}},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {2643--2646},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1465169},
doi = {10.1109/ISCAS.2005.1465169},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChenHLS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/slip/LiLCSC05,
author = {Katherine Shu{-}Min Li and
Chung{-}Len Lee and
Yao{-}Wen Chang and
Chauchin Su and
Jwu E. Chen},
editor = {Igor L. Markov and
Mike Hutton},
title = {Multilevel full-chip routing with testability and yield enhancement},
booktitle = {The Seventh International Workshop on System-Level Interconnect Prediction
{(SLIP} 2005), San Francisco, CA, USA, April 2-3, 2005, Proceedings},
pages = {29--36},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1053355.1053362},
doi = {10.1145/1053355.1053362},
timestamp = {Tue, 07 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/slip/LiLCSC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LiLSC04,
author = {Katherine Shu{-}Min Li and
Chung{-}Len Lee and
Chauchin Su and
Jwu E. Chen},
title = {A Unified Approach to Detecting Crosstalk Faults of Interconnects
in Deep Sub-Micron {VLSI}},
booktitle = {13th Asian Test Symposium {(ATS} 2004), 15-17 November 2004, Kenting,
Taiwan},
pages = {145--150},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ATS.2004.19},
doi = {10.1109/ATS.2004.19},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/LiLSC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SuWWT03,
author = {Chauchin Su and
Wei{-}Juo Wang and
Chih{-}Hu Wang and
I. S. Tseng},
editor = {Hiroto Yasuura},
title = {A novel {LCD} driver testing technique using logic test channels},
booktitle = {Proceedings of the 2003 Asia and South Pacific Design Automation Conference,
{ASP-DAC} '03, Kitakyushu, Japan, January 21-24, 2003},
pages = {657--662},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/1119772.1119920},
doi = {10.1145/1119772.1119920},
timestamp = {Thu, 11 Mar 2021 17:04:51 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/SuWWT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SuWWT03,
author = {Chauchin Su and
Chih{-}Hu Wang and
Wei{-}Juo Wang and
I. S. Tseng},
title = {1149.4 Based On-Line Quiescent State Monitoring Technique},
booktitle = {21st {IEEE} {VLSI} Test Symposium {(VTS} 2003), 27 April - 1 May 2003,
Napa Valley, CA, {USA}},
pages = {197--202},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/VTEST.2003.1197651},
doi = {10.1109/VTEST.2003.1197651},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SuWWT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/LeeS02,
author = {Kuen{-}Jong Lee and
Chau{-}Chin Su},
title = {Guest Editorial},
journal = {J. Electron. Test.},
volume = {18},
number = {1},
pages = {15--16},
year = {2002},
url = {https://doi.org/10.1023/A:1013719704988},
doi = {10.1023/A:1013719704988},
timestamp = {Fri, 11 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/LeeS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/LuLSC02,
author = {Chih{-}Wen Lu and
Chung{-}Len Lee and
Chauchin Su and
Jwu{-}E Chen},
title = {Analysis of Application of the {IDDQ} Technique to the Deep Sub-Micron
{VLSI} Testing},
journal = {J. Electron. Test.},
volume = {18},
number = {1},
pages = {89--97},
year = {2002},
url = {https://doi.org/10.1023/A:1013784124552},
doi = {10.1023/A:1013784124552},
timestamp = {Tue, 07 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/LuLSC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChenWS02,
author = {Hung{-}Kai Chen and
Chih{-}Hu Wang and
Chau{-}Chin Su},
title = {A Self Calibrated {ADC} {BIST} Methodology},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {117--122},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011121},
doi = {10.1109/VTS.2002.1011121},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChenWS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/LinLSC01,
author = {Jun{-}Weir Lin and
Chung{-}Len Lee and
Chauchin Su and
Jwu E. Chen},
title = {Fault Diagnosis for Linear Analog Circuits},
journal = {J. Electron. Test.},
volume = {17},
number = {6},
pages = {483--494},
year = {2001},
url = {https://doi.org/10.1023/A:1012816621144},
doi = {10.1023/A:1012816621144},
timestamp = {Tue, 07 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/LinLSC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/SuCJ01,
author = {Chauchin Su and
Yue{-}Tsang Chen and
Shyh{-}Jye Jou},
title = {Intrinsic response for analog module testing using an analog testability
bus},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {6},
number = {2},
pages = {226--243},
year = {2001},
url = {https://doi.org/10.1145/375977.375981},
doi = {10.1145/375977.375981},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/SuCJ01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SuHZL01,
author = {Chauchin Su and
Shih{-}Ching Hsiao and
Hau{-}Zen Zhau and
Chung{-}Len Lee},
editor = {Satoshi Goto},
title = {A computer aided engineering system for memory {BIST}},
booktitle = {Proceedings of {ASP-DAC} 2001, Asia and South Pacific Design Automation
Conference 2001, January 30-February 2, 2001, Yokohama, Japan},
pages = {492--495},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/370155.370518},
doi = {10.1145/370155.370518},
timestamp = {Tue, 07 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/SuHZL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SuT01,
author = {Chauchin Su and
Wenliang Tseng},
title = {Configuration free SoC interconnect {BIST} methodology},
booktitle = {Proceedings {IEEE} International Test Conference 2001, Baltimore,
MD, USA, 30 October - 1 November 2001},
pages = {1033--1038},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/TEST.2001.966729},
doi = {10.1109/TEST.2001.966729},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SuT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChenS01,
author = {Yue{-}Tsang Chen and
Chauchin Su},
title = {Test Waveform Shaping in Mixed Signal Test Bus by Pre-Equalization},
booktitle = {19th {IEEE} {VLSI} Test Symposium {(VTS} 2001), Test and Diagnosis
in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA,
{USA}},
pages = {260--265},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/VTS.2001.923448},
doi = {10.1109/VTS.2001.923448},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChenS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/ChangLCS00,
author = {Yeong{-}Jar Chang and
Chung{-}Len Lee and
Jwu E. Chen and
Chauchin Su},
title = {A Behavior-Level Fault Model for the Closed-Loop Operational Amplifier},
journal = {J. Inf. Sci. Eng.},
volume = {16},
number = {5},
pages = {751--766},
year = {2000},
url = {http://www.iis.sinica.edu.tw/page/jise/2000/200009\_06.html},
timestamp = {Tue, 07 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jise/ChangLCS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/SuCC00,
author = {Chauchin Su and
Yue{-}Tsang Chen and
Shenshung Chiang},
title = {Impulse Response Fault Model and Fault Extraction for Functional Level
Analog Circuit Diagnosis},
journal = {J. Inf. Sci. Eng.},
volume = {16},
number = {5},
pages = {767--781},
year = {2000},
url = {http://www.iis.sinica.edu.tw/page/jise/2000/200009\_07.html},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jise/SuCC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SuC00,
author = {Chauchin Su and
Yue{-}Tsang Chen},
title = {Intrinsic response extraction for the removal of the parasiticeffects
in analog test buses},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {19},
number = {4},
pages = {437--445},
year = {2000},
url = {https://doi.org/10.1109/43.838993},
doi = {10.1109/43.838993},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SuC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LinLSC00,
author = {Jun{-}Weir Lin and
Chung{-}Len Lee and
Chauchin Su and
Jwu E. Chen},
title = {Fault diagnosis for linear analog circuits},
booktitle = {9th Asian Test Symposium {(ATS} 2000), 4-6 December 2000, Taipei,
Taiwan},
pages = {25--30},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ATS.2000.893598},
doi = {10.1109/ATS.2000.893598},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/LinLSC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HuangLLCS00,
author = {Yin{-}Chao Huang and
Chung{-}Len Lee and
Jun{-}Weir Lin and
Jwu E. Chen and
Chauchin Su},
title = {A methodology for fault model development for hierarchical linear
systems},
booktitle = {9th Asian Test Symposium {(ATS} 2000), 4-6 December 2000, Taipei,
Taiwan},
pages = {90--95},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ATS.2000.893608},
doi = {10.1109/ATS.2000.893608},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/HuangLLCS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/LuSLC00,
author = {Chih{-}Wen Lu and
Chauchin Su and
Chung{-}Len Lee and
Jwu E. Chen},
title = {Is {IDDQ} testing not applicable for deep submicron {VLSI} in year
2011?},
booktitle = {9th Asian Test Symposium {(ATS} 2000), 4-6 December 2000, Taipei,
Taiwan},
pages = {338--343},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ATS.2000.893646},
doi = {10.1109/ATS.2000.893646},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/LuSLC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SuCHCL00,
author = {Chauchin Su and
Yue{-}Tsang Chen and
Mu{-}Jeng Huang and
Gen{-}Nan Chen and
Chung{-}Len Lee},
editor = {Ivo Bolsens},
title = {All Digital Built-in Delay and Crosstalk Measurement for On-Chip Buses},
booktitle = {2000 Design, Automation and Test in Europe {(DATE} 2000), 27-30 March
2000, Paris, France},
pages = {527--531},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2000},
url = {https://doi.org/10.1109/DATE.2000.840836},
doi = {10.1109/DATE.2000.840836},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SuCHCL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SuC00,
author = {Chauchin Su and
Yue{-}Tsang Chen},
title = {Crosstalk Effect Removal for Analog Measurement in Analog Test Bus},
booktitle = {18th {IEEE} {VLSI} Test Symposium {(VTS} 2000), 30 April - 4 May 2000,
Montreal, Canada},
pages = {403--410},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/VTEST.2000.843871},
doi = {10.1109/VTEST.2000.843871},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SuC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/SuJ99,
author = {Chauchin Su and
Shyh{-}Jye Jou},
title = {Decentralized {BIST} Methodology for System Level Interconnects},
journal = {J. Electron. Test.},
volume = {15},
number = {3},
pages = {255--265},
year = {1999},
url = {https://doi.org/10.1023/A:1008336824268},
doi = {10.1023/A:1008336824268},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/SuJ99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/SuCL99,
author = {Chauchin Su and
Yue{-}Tsang Chen and
Chung{-}Len Lee},
title = {Analog Metrology and Stimulus Selection in a Noisy Environment},
booktitle = {8th Asian Test Symposium {(ATS} '99), 16-18 November 1999, Shanghai,
China},
pages = {233--238},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ATS.1999.810756},
doi = {10.1109/ATS.1999.810756},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/SuCL99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/SuC98,
author = {Chauchin Su and
Yue{-}Tsung Chen},
title = {Comprehensive Interconnect {BIST} Methodology for Virtual Socket Interface},
booktitle = {7th Asian Test Symposium {(ATS} '98), 2-4 December 1998, Singapore},
pages = {259},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ATS.1998.741622},
doi = {10.1109/ATS.1998.741622},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/SuC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ChenS98,
author = {Yue{-}Tsang Chen and
Chauchin Su},
title = {Analog Module Metrology Using {MNABST-1} {P1149.4} Test Chip},
booktitle = {7th Asian Test Symposium {(ATS} '98), 2-4 December 1998, Singapore},
pages = {378--382},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ATS.1998.741642},
doi = {10.1109/ATS.1998.741642},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ChenS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/Su98,
author = {Chauchin Su},
editor = {Hiroto Yasuura},
title = {A linear optimal test generation algorithm for interconnect testing},
booktitle = {Proceedings of the 1998 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1998, San Jose, CA, USA, November 8-12, 1998},
pages = {290--295},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1145/288548.288626},
doi = {10.1145/288548.288626},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/Su98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SuJC98,
author = {Chauchin Su and
Shung{-}Won Jeng and
Yue{-}Tsang Chen},
title = {Boundary scan {BIST} methodology for reconfigurable systems},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {774--783},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743260},
doi = {10.1109/TEST.1998.743260},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SuJC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/JouCYS97,
author = {Shyh{-}Jye Jou and
Chang{-}Yu Chen and
En{-}Chung Yang and
Chau{-}Chin Su},
title = {A pipelined multiplier-accumulator using a high-speed, low-power static
and dynamic full adder design},
journal = {{IEEE} J. Solid State Circuits},
volume = {32},
number = {1},
pages = {114--118},
year = {1997},
url = {https://doi.org/10.1109/4.553190},
doi = {10.1109/4.553190},
timestamp = {Thu, 07 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/JouCYS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SuCJ97,
author = {Chauchin Su and
Kathy Y. Chen and
Shyh{-}Jye Jou},
title = {Structural approach for performance driven {ECC} circuit synthesis},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {89--94},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600065},
doi = {10.1109/ASPDAC.1997.600065},
timestamp = {Wed, 21 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SuCJ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/SuCCT97,
author = {Chauchin Su and
Yi{-}Ren Cheng and
Yue{-}Tsang Chen and
Shing Tenchen},
title = {Analog signal metrology for mixed signal ICs},
booktitle = {6th Asian Test Symposium {(ATS} '97), 17-18 November 1997, Akita,
Japan},
pages = {194},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ATS.1997.643958},
doi = {10.1109/ATS.1997.643958},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/SuCCT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SuCJ97,
author = {Chauchin Su and
Yue{-}Tsang Chen and
Shyh{-}Jye Jou},
title = {Parasitic Effect Removal for Analog Measurement in {P1149.4} Environment},
booktitle = {Proceedings {IEEE} International Test Conference 1997, Washington,
DC, USA, November 3-5, 1997},
pages = {499--508},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/TEST.1997.639656},
doi = {10.1109/TEST.1997.639656},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SuCJ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/SuHJT96,
author = {Chauchin Su and
Shyh{-}Shen Hwang and
Shyh{-}Jye Jou and
Yuan{-}Tzu Ting},
title = {Syndrome Simulation And Syndrome Test For Unscanned Interconnects},
booktitle = {5th Asian Test Symposium {(ATS} '96), November 20-22, 1996, Hsinchu,
Taiwan},
pages = {62--67},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ATS.1996.555138},
doi = {10.1109/ATS.1996.555138},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/SuHJT96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SuJT96,
author = {Chauchin Su and
Shyh{-}Jye Jou and
Yuan{-}Tzu Ting},
title = {Decentralized {BIST} for 1149.1 and 1149.5 Based Interconnects},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {120--125},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494136},
doi = {10.1109/EDTC.1996.494136},
timestamp = {Fri, 20 May 2022 15:52:30 +0200},
biburl = {https://dblp.org/rec/conf/date/SuJT96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/SuCJT96,
author = {Chauchin Su and
Yue{-}Tsang Chen and
Shyh{-}Jye Jou and
Yuan{-}Tzu Ting},
editor = {Rob A. Rutenbar and
Ralph H. J. M. Otten},
title = {Metrology for analog module testing using analog testability bus},
booktitle = {Proceedings of the 1996 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1996, San Jose, CA, USA, November 10-14, 1996},
pages = {594--599},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1996},
url = {https://doi.org/10.1109/ICCAD.1996.569916},
doi = {10.1109/ICCAD.1996.569916},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/SuCJT96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/SuCJ95,
author = {Chauchin Su and
Shenshung Chiang and
Shyh{-}Jye Jou},
editor = {Richard L. Rudell},
title = {Impulse response fault model and fault extraction for functional level
analog circuit diagnosis},
booktitle = {Proceedings of the 1995 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1995, San Jose, California, USA, November 5-9, 1995},
pages = {631--636},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1995},
url = {https://doi.org/10.1109/ICCAD.1995.480195},
doi = {10.1109/ICCAD.1995.480195},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/SuCJ95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HsiehJS95,
author = {Wen{-}Hsing Hsieh and
Shyh{-}Jye Jou and
Chauchin Su},
title = {A Parallel Event-Driven {MOS} Timing Simulator on Distributed-Memory
Multiprocessors},
booktitle = {1995 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1995, Seattle, Washington, USA, April 30 - May 3, 1995},
pages = {574--577},
publisher = {{IEEE}},
year = {1995},
url = {https://doi.org/10.1109/ISCAS.1995.521578},
doi = {10.1109/ISCAS.1995.521578},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HsiehJS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JouLS95,
author = {Shyh{-}Jye Jou and
Kou{-}Fong Liu and
Chauchin Su},
title = {Circuits Design Optimization Using Symbolic Approach},
booktitle = {1995 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1995, Seattle, Washington, USA, April 30 - May 3, 1995},
pages = {1396--1399},
publisher = {{IEEE}},
year = {1995},
url = {https://doi.org/10.1109/ISCAS.1995.520408},
doi = {10.1109/ISCAS.1995.520408},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JouLS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/Su94,
author = {Chauchin Su},
editor = {Robert Werner},
title = {Random Testing of Interconnects in {A} Boundary Scan Environment},
booktitle = {{EDAC} - The European Conference on Design Automation, {ETC} - European
Test Conference, {EUROASIC} - The European Event in {ASIC} Design,
Proceedings, February 28 - March 3, 1994, Paris, France},
pages = {226--231},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/EDTC.1994.326873},
doi = {10.1109/EDTC.1994.326873},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/Su94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JouPSW94,
author = {Shyh{-}Jye Jou and
Mei{-}Fang Perng and
Chauchin Su and
C. K. Wang},
title = {Hierarchical Techniques for Symbolic Analysis of Large Electronic
Circuits},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {21--24},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.408745},
doi = {10.1109/ISCAS.1994.408745},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JouPSW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SuHJ94,
author = {Chauchin Su and
Kychin Hwang and
Shyh{-}Jye Jou},
title = {An I\({}_{\mbox{DDQ}}\) Based Built-in Concurrent Test Technique for
Interconnects in a Boundary-Scan Environment},
booktitle = {Proceedings {IEEE} International Test Conference 1994, {TEST:} The
Next 25 Years, Washington, DC, USA, October 2-6, 1994},
pages = {670--676},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/TEST.1994.528012},
doi = {10.1109/TEST.1994.528012},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SuHJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChangS93,
author = {Chiyuan Chang and
Chauchin Su},
title = {A Universal {BIST} Methodology for Interconnects},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1615--1618},
publisher = {{IEEE}},
year = {1993},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChangS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SuW93,
author = {Chauchin Su and
Jyrghong Wang},
title = {ECCSyn: a Synthesis Tool for {ECC} Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1706--1709},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SuW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SuH93,
author = {Chauchin Su and
Kychin Hwang},
title = {A Serial-Scan Test-Vector-Compression Methodology},
booktitle = {Proceedings {IEEE} International Test Conference 1993, Designing,
Testing, and Diagnostics - Join Them, Baltimore, Maryland, USA, October
17-21, 1993},
pages = {981--988},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/TEST.1993.470601},
doi = {10.1109/TEST.1993.470601},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SuH93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SuK90,
author = {Chau{-}Chin Su and
Charles R. Kime},
title = {Multiple path sensitization for hierarchical circuit testing},
booktitle = {Proceedings {IEEE} International Test Conference 1990, Washington,
D.C., USA, September 10-14, 1990},
pages = {152--161},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/TEST.1990.114013},
doi = {10.1109/TEST.1990.114013},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SuK90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SuK90a,
author = {Chau{-}Chin Su and
Charles R. Kime},
title = {Computer-aided design of pseudoexhaustive {BIST} for semiregular circuits},
booktitle = {Proceedings {IEEE} International Test Conference 1990, Washington,
D.C., USA, September 10-14, 1990},
pages = {680--689},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/TEST.1990.114083},
doi = {10.1109/TEST.1990.114083},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SuK90a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-08-22 20:46 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
