Stop the war!
Остановите войну!
for scientists:
default search action
BibTeX records: Jürgen Schlöffel
@article{DBLP:journals/jssc/VivetTLSBBDLPDC17, author = {Pascal Vivet and Yvain Thonnart and Romain Lemaire and Cristiano Santos and Edith Beign{\'{e}} and Christian Bernard and Florian Darve and Didier Lattard and Ivan Miro Panades and Denis Dutoit and Fabien Clermidy and S{\'{e}}verine Cheramy and Abbas Sheibanyrad and Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and Eric Flamand and Jean Michailos and Alexandre Arriordaz and Lee Wang and Juergen Schloeffel}, title = {A 4 {\texttimes} 4 {\texttimes} 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links}, journal = {{IEEE} J. Solid State Circuits}, volume = {52}, number = {1}, pages = {33--49}, year = {2017}, url = {https://doi.org/10.1109/JSSC.2016.2611497}, doi = {10.1109/JSSC.2016.2611497}, timestamp = {Sun, 30 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/VivetTLSBBDLPDC17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ets/DuruptVS16, author = {Jean Durupt and Pascal Vivet and Juergen Schloeffel}, title = {{IJTAG} supported 3D {DFT} using chiplet-footprints for testing multi-chips active interposer system}, booktitle = {21th {IEEE} European Test Symposium, {ETS} 2016, Amsterdam, Netherlands, May 23-27, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/ETS.2016.7519310}, doi = {10.1109/ETS.2016.7519310}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/ets/DuruptVS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isvlsi/FkihVFRNS15, author = {Yassine Fkih and Pascal Vivet and Marie{-}Lise Flottes and Bruno Rouzeyre and Giorgio Di Natale and Juergen Schloeffel}, title = {3D {DFT} Challenges and Solutions}, booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015, Montpellier, France, July 8-10, 2015}, pages = {603--608}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/ISVLSI.2015.11}, doi = {10.1109/ISVLSI.2015.11}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isvlsi/FkihVFRNS15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/HapkeRGRRHKSF14, author = {Friedrich Hapke and Wilfried Redemund and Andreas Glowatz and Janusz Rajski and Michael Reese and Marek Hustava and Martin Keim and Juergen Schloeffel and Anja Fast}, title = {Cell-Aware Test}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {33}, number = {9}, pages = {1396--1409}, year = {2014}, url = {https://doi.org/10.1109/TCAD.2014.2323216}, doi = {10.1109/TCAD.2014.2323216}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/HapkeRGRRHKSF14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ets/HapkeABBSGPBMPSRGFR14, author = {Friedrich Hapke and Ralf Arnold and Matthias Beck and M. Baby and S. Straehle and J. F. Goncalves and A. Panait and R. Behr and Gwenol{\'{e}} Maugard and A. Prashanthi and Juergen Schloeffel and Wilfried Redemund and Andreas Glowatz and Anja Fast and Janusz Rajski}, editor = {Giorgio Di Natale}, title = {Cell-aware experiences in a high-quality automotive test suite}, booktitle = {19th {IEEE} European Test Symposium, {ETS} 2014, Paderborn, Germany, May 26-30, 2014}, pages = {1--6}, publisher = {{IEEE}}, year = {2014}, url = {https://doi.org/10.1109/ETS.2014.6847814}, doi = {10.1109/ETS.2014.6847814}, timestamp = {Wed, 21 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/ets/HapkeABBSGPBMPSRGFR14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isvlsi/FkihVRFNS14, author = {Yassine Fkih and Pascal Vivet and Bruno Rouzeyre and Marie{-}Lise Flottes and Giorgio Di Natale and Juergen Schloeffel}, title = {2D to 3D Test Pattern Retargeting Using {IEEE} {P1687} Based 3D {DFT} Architectures}, booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2014, Tampa, FL, USA, July 9-11, 2014}, pages = {386--391}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ISVLSI.2014.83}, doi = {10.1109/ISVLSI.2014.83}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isvlsi/FkihVRFNS14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ets/HapkeS12, author = {Friedrich Hapke and J{\"{u}}rgen Schl{\"{o}}ffel}, title = {Introduction to the defect-oriented cell-aware test methodology for significant reduction of {DPPM} rates}, booktitle = {17th {IEEE} European Test Symposium, {ETS} 2012, Annecy, France, May 28 - June 1 2012}, pages = {1--6}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/ETS.2012.6233046}, doi = {10.1109/ETS.2012.6233046}, timestamp = {Tue, 28 Apr 2020 11:43:43 +0200}, biburl = {https://dblp.org/rec/conf/ets/HapkeS12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/HapkeRRORRGSR12, author = {Friedrich Hapke and Michael Reese and Jason Rivers and A. Over and V. Ravikumar and Wilfried Redemund and Andreas Glowatz and J{\"{u}}rgen Schl{\"{o}}ffel and Janusz Rajski}, title = {Cell-aware Production test results from a 32-nm notebook processor}, booktitle = {2012 {IEEE} International Test Conference, {ITC} 2012, Anaheim, CA, USA, November 5-8, 2012}, pages = {1--9}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/TEST.2012.6401533}, doi = {10.1109/TEST.2012.6401533}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/HapkeRRORRGSR12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/HapkeSRGRRRR11, author = {Friedrich Hapke and J{\"{u}}rgen Schl{\"{o}}ffel and Wilfried Redemund and Andreas Glowatz and Janusz Rajski and Michael Reese and J. Rearick and Jason Rivers}, editor = {Bill Eklow and R. D. (Shawn) Blanton}, title = {Cell-aware analysis for small-delay effects and production test results from different fault models}, booktitle = {2011 {IEEE} International Test Conference, {ITC} 2011, Anaheim, CA, USA, September 20-22, 2011}, pages = {1--8}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/TEST.2011.6139151}, doi = {10.1109/TEST.2011.6139151}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/HapkeSRGRRRR11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/et/EggersglussFGHSD10, author = {Stephan Eggersgl{\"{u}}{\ss} and G{\"{o}}rschwin Fey and Andreas Glowatz and Friedrich Hapke and J{\"{u}}rgen Schl{\"{o}}ffel and Rolf Drechsler}, title = {{MONSOON:} SAT-Based {ATPG} for Path Delay Faults Using Multiple-Valued Logics}, journal = {J. Electron. Test.}, volume = {26}, number = {3}, pages = {307--322}, year = {2010}, url = {https://doi.org/10.1007/s10836-010-5146-y}, doi = {10.1007/S10836-010-5146-Y}, timestamp = {Fri, 11 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/et/EggersglussFGHSD10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ets/TilleEKSD10, author = {Daniel Tille and Stephan Eggersgl{\"{u}}{\ss} and Rene Krenz{-}Baath and J{\"{u}}rgen Schl{\"{o}}ffel and Rolf Drechsler}, title = {Improving {CNF} representations in SAT-based {ATPG} for industrial circuits using BDDs}, booktitle = {15th European Test Symposium, {ETS} 2010, Prague, Czech Republic, May 24-28, 2010}, pages = {176--181}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/ETSYM.2010.5512763}, doi = {10.1109/ETSYM.2010.5512763}, timestamp = {Tue, 28 Apr 2020 11:43:44 +0200}, biburl = {https://dblp.org/rec/conf/ets/TilleEKSD10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/HapkeRSKGWHE10, author = {Friedrich Hapke and Wilfried Redemund and J{\"{u}}rgen Schl{\"{o}}ffel and Rene Krenz{-}Baath and Andreas Glowatz and Michael Wittke and Hamidreza Hashempour and Stefan Eichenberger}, editor = {Ron Press and Erik H. Volkerink}, title = {Defect-oriented cell-internal testing}, booktitle = {2011 {IEEE} International Test Conference, {ITC} 2010, Austin, TX, USA, November 2-4, 2010}, pages = {285--294}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/TEST.2010.5699229}, doi = {10.1109/TEST.2010.5699229}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/HapkeRSKGWHE10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/it/DrechslerEFST09, author = {Rolf Drechsler and Stephan Eggersgl{\"{u}}{\ss} and G{\"{o}}rschwin Fey and J{\"{u}}rgen Schl{\"{o}}ffel and Daniel Tille}, title = {Effiziente Erf{\"{u}}llbarkeitsalgorithmen f{\"{u}}r die Generierung von Testmustern (Efficient Satisfiability Solving Algorithms for Test Pattern Generation)}, journal = {it Inf. Technol.}, volume = {51}, number = {2}, pages = {102--111}, year = {2009}, url = {https://doi.org/10.1524/itit.2009.0529}, doi = {10.1524/ITIT.2009.0529}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/it/DrechslerEFST09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/todaes/EngelkeBRSBP09, author = {Piet Engelke and Bernd Becker and Michel Renovell and J{\"{u}}rgen Schl{\"{o}}ffel and Bettina Braitling and Ilia Polian}, title = {{SUPERB:} Simulator utilizing parallel evaluation of resistive bridges}, journal = {{ACM} Trans. Design Autom. Electr. Syst.}, volume = {14}, number = {4}, pages = {56:1--56:21}, year = {2009}, url = {https://doi.org/10.1145/1562514.1596831}, doi = {10.1145/1562514.1596831}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/todaes/EngelkeBRSBP09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/HapkeKGSHEHA09, author = {Friedrich Hapke and Rene Krenz{-}Baath and Andreas Glowatz and J{\"{u}}rgen Schl{\"{o}}ffel and Hamidreza Hashempour and Stefan Eichenberger and Camelia Hora and Dan Adolfsson}, editor = {Gordon W. Roberts and Bill Eklow}, title = {Defect-oriented cell-aware {ATPG} and fault simulation for industrial cell libraries and designs}, booktitle = {2009 {IEEE} International Test Conference, {ITC} 2009, Austin, TX, USA, November 1-6, 2009}, pages = {1--10}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/TEST.2009.5355741}, doi = {10.1109/TEST.2009.5355741}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/HapkeKGSHEHA09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vts/HakmiHWSHG09, author = {Abdul Wahid Hakmi and Stefan Holst and Hans{-}Joachim Wunderlich and J{\"{u}}rgen Schl{\"{o}}ffel and Friedrich Hapke and Andreas Glowatz}, title = {Restrict Encoding for Mixed-Mode {BIST}}, booktitle = {27th {IEEE} {VLSI} Test Symposium, {VTS} 2009, May 3-7, 2009, Santa Cruz, California, {USA}}, pages = {179--184}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/VTS.2009.43}, doi = {10.1109/VTS.2009.43}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vts/HakmiHWSHG09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/DrechslerEFGHST08, author = {Rolf Drechsler and Stephan Eggersgl{\"{u}}{\ss} and G{\"{o}}rschwin Fey and Andreas Glowatz and Friedrich Hapke and J{\"{u}}rgen Schl{\"{o}}ffel and Daniel Tille}, title = {On Acceleration of SAT-Based {ATPG} for Industrial Designs}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {27}, number = {7}, pages = {1329--1333}, year = {2008}, url = {https://doi.org/10.1109/TCAD.2008.923107}, doi = {10.1109/TCAD.2008.923107}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/DrechslerEFGHST08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/EngelkePSB08, author = {Piet Engelke and Ilia Polian and J{\"{u}}rgen Schl{\"{o}}ffel and Bernd Becker}, editor = {Donatella Sciuto}, title = {Resistive Bridging Fault Simulation of Industrial Circuits}, booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany, March 10-14, 2008}, pages = {628--633}, publisher = {{ACM}}, year = {2008}, url = {https://doi.org/10.1109/DATE.2008.4484747}, doi = {10.1109/DATE.2008.4484747}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/EngelkePSB08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/iet-cdt/GhermanWSG07, author = {Valentin Gherman and Hans{-}Joachim Wunderlich and J{\"{u}}rgen Schl{\"{o}}ffel and Michael Garbers}, title = {Deterministic logic {BIST} for transition fault testing}, journal = {{IET} Comput. Digit. Tech.}, volume = {1}, number = {3}, pages = {180--186}, year = {2007}, url = {https://doi.org/10.1049/iet-cdt:20060131}, doi = {10.1049/IET-CDT:20060131}, timestamp = {Tue, 14 Jul 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/iet-cdt/GhermanWSG07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ets/Krenz-BaathGS07, author = {Rene Krenz{-}Baath and Andreas Glowatz and J{\"{u}}rgen Schl{\"{o}}ffel}, title = {Computation and Application of Absolute Dominators in Industrial Designs}, booktitle = {12th European Test Symposium, {ETS} 2007, Freiburg, Germany, May 20, 2007}, pages = {137--144}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/ETS.2007.15}, doi = {10.1109/ETS.2007.15}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ets/Krenz-BaathGS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/glvlsi/GhermanWMSG07, author = {Valentin Gherman and Hans{-}Joachim Wunderlich and R. D. Mascarenhas and J{\"{u}}rgen Schl{\"{o}}ffel and Michael Garbers}, editor = {Hai Zhou and Enrico Macii and Zhiyuan Yan and Yehia Massoud}, title = {Synthesis of irregular combinational functions with large don't care sets}, booktitle = {Proceedings of the 17th {ACM} Great Lakes Symposium on {VLSI} 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007}, pages = {287--292}, publisher = {{ACM}}, year = {2007}, url = {https://doi.org/10.1145/1228784.1228856}, doi = {10.1145/1228784.1228856}, timestamp = {Wed, 16 Aug 2023 21:16:32 +0200}, biburl = {https://dblp.org/rec/conf/glvlsi/GhermanWMSG07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/EggersglussTFDGHS07, author = {Stephan Eggersgl{\"{u}}{\ss} and Daniel Tille and G{\"{o}}rschwin Fey and Rolf Drechsler and Andreas Glowatz and Friedrich Hapke and J{\"{u}}rgen Schl{\"{o}}ffel}, title = {Experimental Studies on SAT-Based {ATPG} for Gate Delay Faults}, booktitle = {37th International Symposium on Multiple-Valued Logic, {ISMVL} 2007, 13-16 May 2007, Oslo, Norway}, pages = {6}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/ISMVL.2007.21}, doi = {10.1109/ISMVL.2007.21}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/EggersglussTFDGHS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/HakmiWZGHSS07, author = {Abdul Wahid Hakmi and Hans{-}Joachim Wunderlich and Christian G. Zoellin and Andreas Glowatz and Friedrich Hapke and J{\"{u}}rgen Schl{\"{o}}ffel and Laurent Souef}, editor = {Jill Sibert and Janusz Rajski}, title = {Programmable deterministic Built-In Self-Test}, booktitle = {2007 {IEEE} International Test Conference, {ITC} 2007, Santa Clara, California, USA, October 21-26, 2007}, pages = {1--9}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/TEST.2007.4437611}, doi = {10.1109/TEST.2007.4437611}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/HakmiWZGHSS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memocode/EggersglussFDGHS07, author = {Stephan Eggersgl{\"{u}}{\ss} and G{\"{o}}rschwin Fey and Rolf Drechsler and Andreas Glowatz and Friedrich Hapke and J{\"{u}}rgen Schl{\"{o}}ffel}, title = {Combining Multi-Valued Logics in SAT-based {ATPG} for Path Delay Faults}, booktitle = {5th {ACM} {\&} {IEEE} International Conference on Formal Methods and Models for Co-Design {(MEMOCODE} 2007), May 30 - June 1st, Nice, France}, pages = {181--187}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/MEMCOD.2007.371226}, doi = {10.1109/MEMCOD.2007.371226}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memocode/EggersglussFDGHS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/TangWEPBSHW06, author = {Yuyi Tang and Hans{-}Joachim Wunderlich and Piet Engelke and Ilia Polian and Bernd Becker and J{\"{u}}rgen Schl{\"{o}}ffel and Friedrich Hapke and Michael Wittke}, title = {X-masking during logic {BIST} and its impact on defect coverage}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {14}, number = {2}, pages = {193--202}, year = {2006}, url = {https://doi.org/10.1109/TVLSI.2005.863742}, doi = {10.1109/TVLSI.2005.863742}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/TangWEPBSHW06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/VrankenGGSH06, author = {Harald P. E. Vranken and Sandeep Kumar Goel and Andreas Glowatz and J{\"{u}}rgen Schl{\"{o}}ffel and Friedrich Hapke}, editor = {Ellen Sentovich}, title = {Fault detection and diagnosis with parity trees for space compaction of test responses}, booktitle = {Proceedings of the 43rd Design Automation Conference, {DAC} 2006, San Francisco, CA, USA, July 24-28, 2006}, pages = {1095--1098}, publisher = {{ACM}}, year = {2006}, url = {https://doi.org/10.1145/1146909.1147185}, doi = {10.1145/1146909.1147185}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/VrankenGGSH06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ets/GhermanWSG06, author = {Valentin Gherman and Hans{-}Joachim Wunderlich and J{\"{u}}rgen Schl{\"{o}}ffel and Michael Garbers}, title = {Deterministic Logic {BIST} for Transition Fault Testing}, booktitle = {11th European Test Symposium, {ETS} 2006, Southhampton, UK, May 21-24, 2006}, pages = {123--130}, publisher = {{IEEE} Computer Society}, year = {2006}, url = {https://doi.org/10.1109/ETS.2006.12}, doi = {10.1109/ETS.2006.12}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ets/GhermanWSG06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/PalitWDAS05, author = {Ajoy Kumar Palit and Lei Wu and Kishore K. Duganapalli and Walter Anheier and J{\"{u}}rgen Schl{\"{o}}ffel}, title = {A New, Flexible and Very Accurate Crosstalk Fault Model to Analyze the Effects of Coupling Noise between the Interconnects on Signal Integrity Losses in Deep Submicron Chips}, booktitle = {14th Asian Test Symposium {(ATS} 2005), 18-21 December 2005, Calcutta, India}, pages = {22--27}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/ATS.2005.13}, doi = {10.1109/ATS.2005.13}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/PalitWDAS05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isvlsi/ShiFDGHS05, author = {Junhao Shi and G{\"{o}}rschwin Fey and Rolf Drechsler and Andreas Glowatz and Friedrich Hapke and J{\"{u}}rgen Schl{\"{o}}ffel}, title = {{PASSAT:} Efficient SAT-Based Test Pattern Generation for Industrial Circuits}, booktitle = {2005 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI} 2005), New Frontiers in {VLSI} Design, 11-12 May 2005, Tampa, FL, {USA}}, pages = {212--217}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/ISVLSI.2005.55}, doi = {10.1109/ISVLSI.2005.55}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isvlsi/ShiFDGHS05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsid/PalitMAS05, author = {Ajoy Kumar Palit and Volker Meyer and Walter Anheier and J{\"{u}}rgen Schl{\"{o}}ffel}, title = {{ABCD} Modeling of Crosstalk Coupling Noise to Analyze the Signal Integrity Losses on the Victim Interconnect in {DSM} Chips}, booktitle = {18th International Conference on {VLSI} Design {(VLSI} Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India}, pages = {354--359}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/ICVD.2005.40}, doi = {10.1109/ICVD.2005.40}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsid/PalitMAS05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vts/HakmiWGGS05, author = {Abdul Wahid Hakmi and Hans{-}Joachim Wunderlich and Valentin Gherman and Michael Garbers and J{\"{u}}rgen Schl{\"{o}}ffel}, title = {Implementing a Scheme for External Deterministic Self-Test}, booktitle = {23rd {IEEE} {VLSI} Test Symposium {(VTS} 2005), 1-5 May 2005, Palm Springs, CA, {USA}}, pages = {101--106}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/VTS.2005.50}, doi = {10.1109/VTS.2005.50}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vts/HakmiWGGS05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dft/PalitMAS04, author = {Ajoy Kumar Palit and Volker Meyer and Walter Anheier and J{\"{u}}rgen Schl{\"{o}}ffel}, title = {Modeling and Analysis of Crosstalk Coupling Effect on the Victim Interconnect Using the {ABCD} Network Model}, booktitle = {19th {IEEE} International Symposium on Defect and Fault-Tolerance in {VLSI} Systems {(DFT} 2004), 10-13 October 2004, Cannes, France, Proceedings}, pages = {174--182}, publisher = {{IEEE} Computer Society}, year = {2004}, url = {https://doi.ieeecomputersociety.org/10.1109/DFT.2004.38}, doi = {10.1109/DFT.2004.38}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dft/PalitMAS04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/HerrmannBSS00, author = {Andreas Herrmann and Erich Barke and Mathias Silvant and J{\"{u}}rgen Schl{\"{o}}ffel}, editor = {Dimitrios Soudris and Peter Pirsch and Erich Barke}, title = {{PARCOURS} - Substrate Crosstalk Analysis for Complex Mixed-Signal-Circuits}, booktitle = {Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation, 10th International Workshop, {PATMOS} 2000, G{\"{o}}ttingen, Germany, September 13-15, 2000, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {1918}, pages = {306--315}, publisher = {Springer}, year = {2000}, url = {https://doi.org/10.1007/3-540-45373-3\_32}, doi = {10.1007/3-540-45373-3\_32}, timestamp = {Tue, 14 May 2019 10:00:54 +0200}, biburl = {https://dblp.org/rec/conf/patmos/HerrmannBSS00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.